1 ; RUN: llc -mcpu=pwr6 -mattr=+altivec < %s | FileCheck %s 2 3 ; Check vector comparisons using altivec. For non-native types, just basic 4 ; comparison instruction check is done. For altivec supported type (16i8, 5 ; 8i16, 4i32, and 4f32) all the comparisons operators (==, !=, >, >=, <, <=) 6 ; are checked. 7 8 9 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" 10 target triple = "powerpc64-unknown-linux-gnu" 11 12 define <2 x i8> @v2si8_cmp(<2 x i8> %x, <2 x i8> %y) nounwind readnone { 13 %cmp = icmp eq <2 x i8> %x, %y 14 %sext = sext <2 x i1> %cmp to <2 x i8> 15 ret <2 x i8> %sext 16 } 17 ; CHECK-LABEL: v2si8_cmp: 18 ; CHECK: vcmpequb {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 19 20 21 define <4 x i8> @v4si8_cmp(<4 x i8> %x, <4 x i8> %y) nounwind readnone { 22 %cmp = icmp eq <4 x i8> %x, %y 23 %sext = sext <4 x i1> %cmp to <4 x i8> 24 ret <4 x i8> %sext 25 } 26 ; CHECK-LABEL: v4si8_cmp: 27 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 28 29 30 define <8 x i8> @v8si8_cmp(<8 x i8> %x, <8 x i8> %y) nounwind readnone { 31 %cmp = icmp eq <8 x i8> %x, %y 32 %sext = sext <8 x i1> %cmp to <8 x i8> 33 ret <8 x i8> %sext 34 } 35 ; CHECK-LABEL: v8si8_cmp: 36 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 37 38 39 ; Additional tests for v16i8 since it is a altivec native type 40 41 define <16 x i8> @v16si8_cmp_eq(<16 x i8> %x, <16 x i8> %y) nounwind readnone { 42 %cmp = icmp eq <16 x i8> %x, %y 43 %sext = sext <16 x i1> %cmp to <16 x i8> 44 ret <16 x i8> %sext 45 } 46 ; CHECK-LABEL: v16si8_cmp_eq: 47 ; CHECK: vcmpequb 2, 2, 3 48 49 define <16 x i8> @v16si8_cmp_ne(<16 x i8> %x, <16 x i8> %y) nounwind readnone { 50 entry: 51 %cmp = icmp ne <16 x i8> %x, %y 52 %sext = sext <16 x i1> %cmp to <16 x i8> 53 ret <16 x i8> %sext 54 } 55 ; CHECK-LABEL: v16si8_cmp_ne: 56 ; CHECK: vcmpequb [[RET:[0-9]+]], 2, 3 57 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]] 58 59 define <16 x i8> @v16si8_cmp_le(<16 x i8> %x, <16 x i8> %y) nounwind readnone { 60 entry: 61 %cmp = icmp sle <16 x i8> %x, %y 62 %sext = sext <16 x i1> %cmp to <16 x i8> 63 ret <16 x i8> %sext 64 } 65 ; CHECK-LABEL: v16si8_cmp_le: 66 ; CHECK: vcmpequb [[RCMPEQ:[0-9]+]], 2, 3 67 ; CHECK-NEXT: vcmpgtsb [[RCMPLE:[0-9]+]], 3, 2 68 ; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]] 69 70 define <16 x i8> @v16ui8_cmp_le(<16 x i8> %x, <16 x i8> %y) nounwind readnone { 71 entry: 72 %cmp = icmp ule <16 x i8> %x, %y 73 %sext = sext <16 x i1> %cmp to <16 x i8> 74 ret <16 x i8> %sext 75 } 76 ; CHECK-LABEL: v16ui8_cmp_le: 77 ; CHECK: vcmpequb [[RCMPEQ:[0-9]+]], 2, 3 78 ; CHECK-NEXT: vcmpgtub [[RCMPLE:[0-9]+]], 3, 2 79 ; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]] 80 81 define <16 x i8> @v16si8_cmp_lt(<16 x i8> %x, <16 x i8> %y) nounwind readnone { 82 entry: 83 %cmp = icmp slt <16 x i8> %x, %y 84 %sext = sext <16 x i1> %cmp to <16 x i8> 85 ret <16 x i8> %sext 86 } 87 ; CHECK-LABEL: v16si8_cmp_lt: 88 ; CHECK: vcmpgtsb 2, 3, 2 89 90 define <16 x i8> @v16ui8_cmp_lt(<16 x i8> %x, <16 x i8> %y) nounwind readnone { 91 entry: 92 %cmp = icmp ult <16 x i8> %x, %y 93 %sext = sext <16 x i1> %cmp to <16 x i8> 94 ret <16 x i8> %sext 95 } 96 ; CHECK-LABEL: v16ui8_cmp_lt: 97 ; CHECK: vcmpgtub 2, 3, 2 98 99 define <16 x i8> @v16si8_cmp_gt(<16 x i8> %x, <16 x i8> %y) nounwind readnone { 100 entry: 101 %cmp = icmp sgt <16 x i8> %x, %y 102 %sext = sext <16 x i1> %cmp to <16 x i8> 103 ret <16 x i8> %sext 104 } 105 ; CHECK-LABEL: v16si8_cmp_gt: 106 ; CHECK: vcmpgtsb 2, 2, 3 107 108 define <16 x i8> @v16ui8_cmp_gt(<16 x i8> %x, <16 x i8> %y) nounwind readnone { 109 entry: 110 %cmp = icmp ugt <16 x i8> %x, %y 111 %sext = sext <16 x i1> %cmp to <16 x i8> 112 ret <16 x i8> %sext 113 } 114 ; CHECK-LABEL: v16ui8_cmp_gt: 115 ; CHECK: vcmpgtub 2, 2, 3 116 117 define <16 x i8> @v16si8_cmp_ge(<16 x i8> %x, <16 x i8> %y) nounwind readnone { 118 entry: 119 %cmp = icmp sge <16 x i8> %x, %y 120 %sext = sext <16 x i1> %cmp to <16 x i8> 121 ret <16 x i8> %sext 122 } 123 ; CHECK-LABEL: v16si8_cmp_ge: 124 ; CHECK: vcmpequb [[RCMPEQ:[0-9]+]], 2, 3 125 ; CHECK-NEXT: vcmpgtsb [[RCMPGT:[0-9]+]], 2, 3 126 ; CHECK-NEXT: vor 2, [[RCMPGT]], [[RCMPEQ]] 127 128 define <16 x i8> @v16ui8_cmp_ge(<16 x i8> %x, <16 x i8> %y) nounwind readnone { 129 entry: 130 %cmp = icmp uge <16 x i8> %x, %y 131 %sext = sext <16 x i1> %cmp to <16 x i8> 132 ret <16 x i8> %sext 133 } 134 ; CHECK-LABEL: v16ui8_cmp_ge: 135 ; CHECK: vcmpequb [[RCMPEQ:[0-9]+]], 2, 3 136 ; CHECK-NEXT: vcmpgtub [[RCMPGT:[0-9]+]], 2, 3 137 ; CHECK-NEXT: vor 2, [[RCMPGT]], [[RCMPEQ]] 138 139 140 define <32 x i8> @v32si8_cmp(<32 x i8> %x, <32 x i8> %y) nounwind readnone { 141 %cmp = icmp eq <32 x i8> %x, %y 142 %sext = sext <32 x i1> %cmp to <32 x i8> 143 ret <32 x i8> %sext 144 } 145 ; CHECK-LABEL: v32si8_cmp: 146 ; CHECK: vcmpequb {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 147 ; CHECK: vcmpequb {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 148 149 150 define <2 x i16> @v2si16_cmp(<2 x i16> %x, <2 x i16> %y) nounwind readnone { 151 %cmp = icmp eq <2 x i16> %x, %y 152 %sext = sext <2 x i1> %cmp to <2 x i16> 153 ret <2 x i16> %sext 154 } 155 ; CHECK-LABEL: v2si16_cmp: 156 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 157 158 159 define <4 x i16> @v4si16_cmp(<4 x i16> %x, <4 x i16> %y) nounwind readnone { 160 %cmp = icmp eq <4 x i16> %x, %y 161 %sext = sext <4 x i1> %cmp to <4 x i16> 162 ret <4 x i16> %sext 163 } 164 ; CHECK-LABEL: v4si16_cmp: 165 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 166 167 168 ; Additional tests for v8i16 since it is an altivec native type 169 170 define <8 x i16> @v8si16_cmp_eq(<8 x i16> %x, <8 x i16> %y) nounwind readnone { 171 entry: 172 %cmp = icmp eq <8 x i16> %x, %y 173 %sext = sext <8 x i1> %cmp to <8 x i16> 174 ret <8 x i16> %sext 175 } 176 ; CHECK-LABEL: v8si16_cmp_eq: 177 ; CHECK: vcmpequh 2, 2, 3 178 179 define <8 x i16> @v8si16_cmp_ne(<8 x i16> %x, <8 x i16> %y) nounwind readnone { 180 entry: 181 %cmp = icmp ne <8 x i16> %x, %y 182 %sext = sext <8 x i1> %cmp to <8 x i16> 183 ret <8 x i16> %sext 184 } 185 ; CHECK-LABEL: v8si16_cmp_ne: 186 ; CHECK: vcmpequh [[RET:[0-9]+]], 2, 3 187 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]] 188 189 define <8 x i16> @v8si16_cmp_le(<8 x i16> %x, <8 x i16> %y) nounwind readnone { 190 entry: 191 %cmp = icmp sle <8 x i16> %x, %y 192 %sext = sext <8 x i1> %cmp to <8 x i16> 193 ret <8 x i16> %sext 194 } 195 ; CHECK-LABEL: v8si16_cmp_le: 196 ; CHECK: vcmpequh [[RCMPEQ:[0-9]+]], 2, 3 197 ; CHECK-NEXT: vcmpgtsh [[RCMPLE:[0-9]+]], 3, 2 198 ; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]] 199 200 define <8 x i16> @v8ui16_cmp_le(<8 x i16> %x, <8 x i16> %y) nounwind readnone { 201 entry: 202 %cmp = icmp ule <8 x i16> %x, %y 203 %sext = sext <8 x i1> %cmp to <8 x i16> 204 ret <8 x i16> %sext 205 } 206 ; CHECK-LABEL: v8ui16_cmp_le: 207 ; CHECK: vcmpequh [[RCMPEQ:[0-9]+]], 2, 3 208 ; CHECK-NEXT: vcmpgtuh [[RCMPLE:[0-9]+]], 3, 2 209 ; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]] 210 211 define <8 x i16> @v8si16_cmp_lt(<8 x i16> %x, <8 x i16> %y) nounwind readnone { 212 entry: 213 %cmp = icmp slt <8 x i16> %x, %y 214 %sext = sext <8 x i1> %cmp to <8 x i16> 215 ret <8 x i16> %sext 216 } 217 ; CHECK-LABEL: v8si16_cmp_lt: 218 ; CHECK: vcmpgtsh 2, 3, 2 219 220 define <8 x i16> @v8ui16_cmp_lt(<8 x i16> %x, <8 x i16> %y) nounwind readnone { 221 entry: 222 %cmp = icmp ult <8 x i16> %x, %y 223 %sext = sext <8 x i1> %cmp to <8 x i16> 224 ret <8 x i16> %sext 225 } 226 ; CHECK-LABEL: v8ui16_cmp_lt: 227 ; CHECK: vcmpgtuh 2, 3, 2 228 229 define <8 x i16> @v8si16_cmp_gt(<8 x i16> %x, <8 x i16> %y) nounwind readnone { 230 entry: 231 %cmp = icmp sgt <8 x i16> %x, %y 232 %sext = sext <8 x i1> %cmp to <8 x i16> 233 ret <8 x i16> %sext 234 } 235 ; CHECK-LABEL: v8si16_cmp_gt: 236 ; CHECK: vcmpgtsh 2, 2, 3 237 238 define <8 x i16> @v8ui16_cmp_gt(<8 x i16> %x, <8 x i16> %y) nounwind readnone { 239 entry: 240 %cmp = icmp ugt <8 x i16> %x, %y 241 %sext = sext <8 x i1> %cmp to <8 x i16> 242 ret <8 x i16> %sext 243 } 244 ; CHECK-LABEL: v8ui16_cmp_gt: 245 ; CHECK: vcmpgtuh 2, 2, 3 246 247 define <8 x i16> @v8si16_cmp_ge(<8 x i16> %x, <8 x i16> %y) nounwind readnone { 248 entry: 249 %cmp = icmp sge <8 x i16> %x, %y 250 %sext = sext <8 x i1> %cmp to <8 x i16> 251 ret <8 x i16> %sext 252 } 253 ; CHECK-LABEL: v8si16_cmp_ge: 254 ; CHECK: vcmpequh [[RCMPEQ:[0-9]+]], 2, 3 255 ; CHECK-NEXT: vcmpgtsh [[RCMPGT:[0-9]+]], 2, 3 256 ; CHECK-NEXT: vor 2, [[RCMPGT]], [[RCMPEQ]] 257 258 define <8 x i16> @v8ui16_cmp_ge(<8 x i16> %x, <8 x i16> %y) nounwind readnone { 259 entry: 260 %cmp = icmp uge <8 x i16> %x, %y 261 %sext = sext <8 x i1> %cmp to <8 x i16> 262 ret <8 x i16> %sext 263 } 264 ; CHECK-LABEL: v8ui16_cmp_ge: 265 ; CHECK: vcmpequh [[RCMPEQ:[0-9]+]], 2, 3 266 ; CHECK-NEXT: vcmpgtuh [[RCMPGT:[0-9]+]], 2, 3 267 ; CHECK-NEXT: vor 2, [[RCMPGT]], [[RCMPEQ]] 268 269 270 define <16 x i16> @v16si16_cmp(<16 x i16> %x, <16 x i16> %y) nounwind readnone { 271 %cmp = icmp eq <16 x i16> %x, %y 272 %sext = sext <16 x i1> %cmp to <16 x i16> 273 ret <16 x i16> %sext 274 } 275 ; CHECK-LABEL: v16si16_cmp: 276 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 277 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 278 279 280 define <32 x i16> @v32si16_cmp(<32 x i16> %x, <32 x i16> %y) nounwind readnone { 281 %cmp = icmp eq <32 x i16> %x, %y 282 %sext = sext <32 x i1> %cmp to <32 x i16> 283 ret <32 x i16> %sext 284 } 285 ; CHECK-LABEL: v32si16_cmp: 286 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 287 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 288 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 289 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 290 291 292 define <2 x i32> @v2si32_cmp(<2 x i32> %x, <2 x i32> %y) nounwind readnone { 293 %cmp = icmp eq <2 x i32> %x, %y 294 %sext = sext <2 x i1> %cmp to <2 x i32> 295 ret <2 x i32> %sext 296 } 297 ; CHECK-LABEL: v2si32_cmp: 298 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 299 300 301 ; Additional tests for v4si32 since it is an altivec native type 302 303 define <4 x i32> @v4si32_cmp_eq(<4 x i32> %x, <4 x i32> %y) nounwind readnone { 304 entry: 305 %cmp = icmp eq <4 x i32> %x, %y 306 %sext = sext <4 x i1> %cmp to <4 x i32> 307 ret <4 x i32> %sext 308 } 309 ; CHECK-LABEL: v4si32_cmp_eq: 310 ; CHECK: vcmpequw 2, 2, 3 311 312 define <4 x i32> @v4si32_cmp_ne(<4 x i32> %x, <4 x i32> %y) nounwind readnone { 313 entry: 314 %cmp = icmp ne <4 x i32> %x, %y 315 %sext = sext <4 x i1> %cmp to <4 x i32> 316 ret <4 x i32> %sext 317 } 318 ; CHECK-LABEL: v4si32_cmp_ne: 319 ; CHECK: vcmpequw [[RCMP:[0-9]+]], 2, 3 320 ; CHECK-NEXT: vnor 2, [[RCMP]], [[RCMP]] 321 322 define <4 x i32> @v4si32_cmp_le(<4 x i32> %x, <4 x i32> %y) nounwind readnone { 323 entry: 324 %cmp = icmp sle <4 x i32> %x, %y 325 %sext = sext <4 x i1> %cmp to <4 x i32> 326 ret <4 x i32> %sext 327 } 328 ; CHECK-LABEL: v4si32_cmp_le: 329 ; CHECK: vcmpequw [[RCMPEQ:[0-9]+]], 2, 3 330 ; CHECK-NEXT: vcmpgtsw [[RCMPLE:[0-9]+]], 3, 2 331 ; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]] 332 333 define <4 x i32> @v4ui32_cmp_le(<4 x i32> %x, <4 x i32> %y) nounwind readnone { 334 entry: 335 %cmp = icmp ule <4 x i32> %x, %y 336 %sext = sext <4 x i1> %cmp to <4 x i32> 337 ret <4 x i32> %sext 338 } 339 ; CHECK-LABEL: v4ui32_cmp_le: 340 ; CHECK: vcmpequw [[RCMPEQ:[0-9]+]], 2, 3 341 ; CHECK-NEXT: vcmpgtuw [[RCMPLE:[0-9]+]], 3, 2 342 ; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]] 343 344 define <4 x i32> @v4si32_cmp_lt(<4 x i32> %x, <4 x i32> %y) nounwind readnone { 345 entry: 346 %cmp = icmp slt <4 x i32> %x, %y 347 %sext = sext <4 x i1> %cmp to <4 x i32> 348 ret <4 x i32> %sext 349 } 350 ; CHECK-LABEL: v4si32_cmp_lt: 351 ; CHECK: vcmpgtsw 2, 3, 2 352 353 define <4 x i32> @v4ui32_cmp_lt(<4 x i32> %x, <4 x i32> %y) nounwind readnone { 354 entry: 355 %cmp = icmp ult <4 x i32> %x, %y 356 %sext = sext <4 x i1> %cmp to <4 x i32> 357 ret <4 x i32> %sext 358 } 359 ; CHECK-LABEL: v4ui32_cmp_lt: 360 ; CHECK: vcmpgtuw 2, 3, 2 361 362 define <4 x i32> @v4si32_cmp_gt(<4 x i32> %x, <4 x i32> %y) nounwind readnone { 363 entry: 364 %cmp = icmp sgt <4 x i32> %x, %y 365 %sext = sext <4 x i1> %cmp to <4 x i32> 366 ret <4 x i32> %sext 367 } 368 ; CHECK-LABEL: v4si32_cmp_gt: 369 ; CHECK: vcmpgtsw 2, 2, 3 370 371 define <4 x i32> @v4ui32_cmp_gt(<4 x i32> %x, <4 x i32> %y) nounwind readnone { 372 entry: 373 %cmp = icmp ugt <4 x i32> %x, %y 374 %sext = sext <4 x i1> %cmp to <4 x i32> 375 ret <4 x i32> %sext 376 } 377 ; CHECK-LABEL: v4ui32_cmp_gt: 378 ; CHECK: vcmpgtuw 2, 2, 3 379 380 define <4 x i32> @v4si32_cmp_ge(<4 x i32> %x, <4 x i32> %y) nounwind readnone { 381 entry: 382 %cmp = icmp sge <4 x i32> %x, %y 383 %sext = sext <4 x i1> %cmp to <4 x i32> 384 ret <4 x i32> %sext 385 } 386 ; CHECK-LABEL: v4si32_cmp_ge: 387 ; CHECK: vcmpequw [[RCMPEQ:[0-9]+]], 2, 3 388 ; CHECK-NEXT: vcmpgtsw [[RCMPGT:[0-9]+]], 2, 3 389 ; CHECK-NEXT: vor 2, [[RCMPGT]], [[RCMPEQ]] 390 391 define <4 x i32> @v4ui32_cmp_ge(<4 x i32> %x, <4 x i32> %y) nounwind readnone { 392 entry: 393 %cmp = icmp uge <4 x i32> %x, %y 394 %sext = sext <4 x i1> %cmp to <4 x i32> 395 ret <4 x i32> %sext 396 } 397 ; CHECK-LABEL: v4ui32_cmp_ge: 398 ; CHECK: vcmpequw [[RCMPEQ:[0-9]+]], 2, 3 399 ; CHECK-NEXT: vcmpgtuw [[RCMPGT:[0-9]+]], 2, 3 400 ; CHECK-NEXT: vor 2, [[RCMPGT]], [[RCMPEQ]] 401 402 403 define <8 x i32> @v8si32_cmp(<8 x i32> %x, <8 x i32> %y) nounwind readnone { 404 %cmp = icmp eq <8 x i32> %x, %y 405 %sext = sext <8 x i1> %cmp to <8 x i32> 406 ret <8 x i32> %sext 407 } 408 ; CHECK-LABEL: v8si32_cmp: 409 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 410 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 411 412 413 define <16 x i32> @v16si32_cmp(<16 x i32> %x, <16 x i32> %y) nounwind readnone { 414 %cmp = icmp eq <16 x i32> %x, %y 415 %sext = sext <16 x i1> %cmp to <16 x i32> 416 ret <16 x i32> %sext 417 } 418 ; CHECK-LABEL: v16si32_cmp: 419 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 420 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 421 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 422 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 423 424 425 define <32 x i32> @v32si32_cmp(<32 x i32> %x, <32 x i32> %y) nounwind readnone { 426 %cmp = icmp eq <32 x i32> %x, %y 427 %sext = sext <32 x i1> %cmp to <32 x i32> 428 ret <32 x i32> %sext 429 } 430 ; CHECK-LABEL: v32si32_cmp: 431 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 432 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 433 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 434 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 435 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 436 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 437 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 438 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 439 440 441 define <2 x float> @v2f32_cmp(<2 x float> %x, <2 x float> %y) nounwind readnone { 442 entry: 443 %cmp = fcmp oeq <2 x float> %x, %y 444 %sext = sext <2 x i1> %cmp to <2 x i32> 445 %0 = bitcast <2 x i32> %sext to <2 x float> 446 ret <2 x float> %0 447 } 448 ; CHECK-LABEL: v2f32_cmp: 449 ; CHECK: vcmpeqfp {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 450 451 452 ; Additional tests for v4f32 since it is a altivec native type 453 454 define <4 x float> @v4f32_cmp_eq(<4 x float> %x, <4 x float> %y) nounwind readnone { 455 entry: 456 %cmp = fcmp oeq <4 x float> %x, %y 457 %sext = sext <4 x i1> %cmp to <4 x i32> 458 %0 = bitcast <4 x i32> %sext to <4 x float> 459 ret <4 x float> %0 460 } 461 ; CHECK-LABEL: v4f32_cmp_eq: 462 ; CHECK: vcmpeqfp 2, 2, 3 463 464 define <4 x float> @v4f32_cmp_ne(<4 x float> %x, <4 x float> %y) nounwind readnone { 465 entry: 466 %cmp = fcmp une <4 x float> %x, %y 467 %sext = sext <4 x i1> %cmp to <4 x i32> 468 %0 = bitcast <4 x i32> %sext to <4 x float> 469 ret <4 x float> %0 470 } 471 ; CHECK-LABEL: v4f32_cmp_ne: 472 ; CHECK: vcmpeqfp [[RET:[0-9]+]], 2, 3 473 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]] 474 475 define <4 x float> @v4f32_cmp_le(<4 x float> %x, <4 x float> %y) nounwind readnone { 476 entry: 477 %cmp = fcmp ole <4 x float> %x, %y 478 %sext = sext <4 x i1> %cmp to <4 x i32> 479 %0 = bitcast <4 x i32> %sext to <4 x float> 480 ret <4 x float> %0 481 } 482 ; CHECK-LABEL: v4f32_cmp_le: 483 ; CHECK: vcmpeqfp [[RCMPEQ:[0-9]+]], 2, 3 484 ; CHECK-NEXT: vcmpgtfp [[RCMPLE:[0-9]+]], 3, 2 485 ; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]] 486 487 define <4 x float> @v4f32_cmp_lt(<4 x float> %x, <4 x float> %y) nounwind readnone { 488 entry: 489 %cmp = fcmp olt <4 x float> %x, %y 490 %sext = sext <4 x i1> %cmp to <4 x i32> 491 %0 = bitcast <4 x i32> %sext to <4 x float> 492 ret <4 x float> %0 493 } 494 ; CHECK-LABEL: v4f32_cmp_lt: 495 ; CHECK: vcmpgtfp 2, 3, 2 496 497 define <4 x float> @v4f32_cmp_ge(<4 x float> %x, <4 x float> %y) nounwind readnone { 498 entry: 499 %cmp = fcmp oge <4 x float> %x, %y 500 %sext = sext <4 x i1> %cmp to <4 x i32> 501 %0 = bitcast <4 x i32> %sext to <4 x float> 502 ret <4 x float> %0 503 } 504 ; CHECK-LABEL: v4f32_cmp_ge: 505 ; CHECK: vcmpgefp 2, 2, 3 506 507 define <4 x float> @v4f32_cmp_gt(<4 x float> %x, <4 x float> %y) nounwind readnone { 508 entry: 509 %cmp = fcmp ogt <4 x float> %x, %y 510 %sext = sext <4 x i1> %cmp to <4 x i32> 511 %0 = bitcast <4 x i32> %sext to <4 x float> 512 ret <4 x float> %0 513 } 514 ; CHECK-LABEL: v4f32_cmp_gt: 515 ; CHECK: vcmpgtfp 2, 2, 3 516 517 518 define <8 x float> @v8f32_cmp(<8 x float> %x, <8 x float> %y) nounwind readnone { 519 entry: 520 %cmp = fcmp oeq <8 x float> %x, %y 521 %sext = sext <8 x i1> %cmp to <8 x i32> 522 %0 = bitcast <8 x i32> %sext to <8 x float> 523 ret <8 x float> %0 524 } 525 ; CHECK-LABEL: v8f32_cmp: 526 ; CHECK: vcmpeqfp {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 527 ; CHECK: vcmpeqfp {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}} 528
