1 ; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -march=ppc32 -mattr=+altivec | FileCheck %s 2 ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -march=ppc64 -mattr=+altivec | FileCheck %s 3 ; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -march=ppc64 -mattr=+altivec | FileCheck %s -check-prefix=CHECK-LE 4 5 define <4 x i32> @test_v4i32(<4 x i32>* %X, <4 x i32>* %Y) { 6 %tmp = load <4 x i32>* %X ; <<4 x i32>> [#uses=1] 7 %tmp2 = load <4 x i32>* %Y ; <<4 x i32>> [#uses=1] 8 %tmp3 = mul <4 x i32> %tmp, %tmp2 ; <<4 x i32>> [#uses=1] 9 ret <4 x i32> %tmp3 10 } 11 ; CHECK-LABEL: test_v4i32: 12 ; CHECK: vmsumuhm 13 ; CHECK-NOT: mullw 14 ; CHECK-LE-LABEL: test_v4i32: 15 ; CHECK-LE: vmsumuhm 16 ; CHECK-LE-NOT: mullw 17 18 define <8 x i16> @test_v8i16(<8 x i16>* %X, <8 x i16>* %Y) { 19 %tmp = load <8 x i16>* %X ; <<8 x i16>> [#uses=1] 20 %tmp2 = load <8 x i16>* %Y ; <<8 x i16>> [#uses=1] 21 %tmp3 = mul <8 x i16> %tmp, %tmp2 ; <<8 x i16>> [#uses=1] 22 ret <8 x i16> %tmp3 23 } 24 ; CHECK-LABEL: test_v8i16: 25 ; CHECK: vmladduhm 26 ; CHECK-NOT: mullw 27 ; CHECK-LE-LABEL: test_v8i16: 28 ; CHECK-LE: vmladduhm 29 ; CHECK-LE-NOT: mullw 30 31 define <16 x i8> @test_v16i8(<16 x i8>* %X, <16 x i8>* %Y) { 32 %tmp = load <16 x i8>* %X ; <<16 x i8>> [#uses=1] 33 %tmp2 = load <16 x i8>* %Y ; <<16 x i8>> [#uses=1] 34 %tmp3 = mul <16 x i8> %tmp, %tmp2 ; <<16 x i8>> [#uses=1] 35 ret <16 x i8> %tmp3 36 } 37 ; CHECK-LABEL: test_v16i8: 38 ; CHECK: vmuloub 39 ; CHECK: vmuleub 40 ; CHECK-NOT: mullw 41 ; CHECK-LE-LABEL: test_v16i8: 42 ; CHECK-LE: vmuloub [[REG1:[0-9]+]] 43 ; CHECK-LE: vmuleub [[REG2:[0-9]+]] 44 ; CHECK-LE: vperm {{[0-9]+}}, [[REG2]], [[REG1]] 45 ; CHECK-LE-NOT: mullw 46 47 define <4 x float> @test_float(<4 x float>* %X, <4 x float>* %Y) { 48 %tmp = load <4 x float>* %X 49 %tmp2 = load <4 x float>* %Y 50 %tmp3 = fmul <4 x float> %tmp, %tmp2 51 ret <4 x float> %tmp3 52 } 53 ; Check the creation of a negative zero float vector by creating a vector of 54 ; all bits set and shifting it 31 bits to left, resulting a an vector of 55 ; 4 x 0x80000000 (-0.0 as float). 56 ; CHECK-LABEL: test_float: 57 ; CHECK: vspltisw [[ZNEG:[0-9]+]], -1 58 ; CHECK: vslw {{[0-9]+}}, [[ZNEG]], [[ZNEG]] 59 ; CHECK: vmaddfp 60 ; CHECK-LE-LABEL: test_float: 61 ; CHECK-LE: vspltisw [[ZNEG:[0-9]+]], -1 62 ; CHECK-LE: vslw {{[0-9]+}}, [[ZNEG]], [[ZNEG]] 63 ; CHECK-LE: vmaddfp 64
