1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s 2 3 ; CHECK: @test_a 4 ; CHECK-NOT: CND 5 ; CHECK: SET{{[NEQGTL]+}}_DX10 6 7 define void @test_a(i32 addrspace(1)* %out, float %in) { 8 entry: 9 %0 = fcmp olt float %in, 0.000000e+00 10 %1 = select i1 %0, float 1.000000e+00, float 0.000000e+00 11 %2 = fsub float -0.000000e+00, %1 12 %3 = fptosi float %2 to i32 13 %4 = bitcast i32 %3 to float 14 %5 = bitcast float %4 to i32 15 %6 = icmp ne i32 %5, 0 16 br i1 %6, label %IF, label %ENDIF 17 18 IF: 19 %7 = getelementptr i32 addrspace(1)* %out, i32 1 20 store i32 0, i32 addrspace(1)* %7 21 br label %ENDIF 22 23 ENDIF: 24 store i32 0, i32 addrspace(1)* %out 25 ret void 26 } 27 28 ; Same as test_a, but the branch labels are swapped to produce the inverse cc 29 ; for the icmp instruction 30 31 ; CHECK: @test_b 32 ; CHECK: SET{{[GTEQN]+}}_DX10 33 ; CHECK-NEXT: PRED_ 34 ; CHECK-NEXT: ALU clause starting 35 define void @test_b(i32 addrspace(1)* %out, float %in) { 36 entry: 37 %0 = fcmp olt float %in, 0.0 38 %1 = select i1 %0, float 1.000000e+00, float 0.000000e+00 39 %2 = fsub float -0.000000e+00, %1 40 %3 = fptosi float %2 to i32 41 %4 = bitcast i32 %3 to float 42 %5 = bitcast float %4 to i32 43 %6 = icmp ne i32 %5, 0 44 br i1 %6, label %ENDIF, label %IF 45 46 IF: 47 %7 = getelementptr i32 addrspace(1)* %out, i32 1 48 store i32 0, i32 addrspace(1)* %7 49 br label %ENDIF 50 51 ENDIF: 52 store i32 0, i32 addrspace(1)* %out 53 ret void 54 } 55 56 ; Test a CND*_INT instruction with float true/false values 57 ; CHECK: @test_c 58 ; CHECK: CND{{[GTE]+}}_INT 59 define void @test_c(float addrspace(1)* %out, i32 %in) { 60 entry: 61 %0 = icmp sgt i32 %in, 0 62 %1 = select i1 %0, float 2.0, float 3.0 63 store float %1, float addrspace(1)* %out 64 ret void 65 } 66
