1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s 2 3 ; These tests check that floating point comparisons which are used by select 4 ; to store integer true (-1) and false (0) values are lowered to one of the 5 ; SET*DX10 instructions. 6 7 ; CHECK: @fcmp_une_select_fptosi 8 ; CHECK: SETNE_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, literal.x, 9 ; CHECK-NEXT: LSHR 10 ; CHECK-NEXT: 1084227584(5.000000e+00) 11 define void @fcmp_une_select_fptosi(i32 addrspace(1)* %out, float %in) { 12 entry: 13 %0 = fcmp une float %in, 5.0 14 %1 = select i1 %0, float 1.000000e+00, float 0.000000e+00 15 %2 = fsub float -0.000000e+00, %1 16 %3 = fptosi float %2 to i32 17 store i32 %3, i32 addrspace(1)* %out 18 ret void 19 } 20 21 ; CHECK: @fcmp_une_select_i32 22 ; CHECK: SETNE_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, literal.x, 23 ; CHECK-NEXT: LSHR 24 ; CHECK-NEXT: 1084227584(5.000000e+00) 25 define void @fcmp_une_select_i32(i32 addrspace(1)* %out, float %in) { 26 entry: 27 %0 = fcmp une float %in, 5.0 28 %1 = select i1 %0, i32 -1, i32 0 29 store i32 %1, i32 addrspace(1)* %out 30 ret void 31 } 32 33 ; CHECK: @fcmp_oeq_select_fptosi 34 ; CHECK: SETE_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, literal.x, 35 ; CHECK-NEXT: LSHR 36 ; CHECK-NEXT: 1084227584(5.000000e+00) 37 define void @fcmp_oeq_select_fptosi(i32 addrspace(1)* %out, float %in) { 38 entry: 39 %0 = fcmp oeq float %in, 5.0 40 %1 = select i1 %0, float 1.000000e+00, float 0.000000e+00 41 %2 = fsub float -0.000000e+00, %1 42 %3 = fptosi float %2 to i32 43 store i32 %3, i32 addrspace(1)* %out 44 ret void 45 } 46 47 ; CHECK: @fcmp_oeq_select_i32 48 ; CHECK: SETE_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, literal.x, 49 ; CHECK-NEXT: LSHR 50 ; CHECK-NEXT: 1084227584(5.000000e+00) 51 define void @fcmp_oeq_select_i32(i32 addrspace(1)* %out, float %in) { 52 entry: 53 %0 = fcmp oeq float %in, 5.0 54 %1 = select i1 %0, i32 -1, i32 0 55 store i32 %1, i32 addrspace(1)* %out 56 ret void 57 } 58 59 ; CHECK: @fcmp_ogt_select_fptosi 60 ; CHECK: SETGT_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, literal.x, 61 ; CHECK-NEXT: LSHR 62 ; CHECK-NEXT: 1084227584(5.000000e+00) 63 define void @fcmp_ogt_select_fptosi(i32 addrspace(1)* %out, float %in) { 64 entry: 65 %0 = fcmp ogt float %in, 5.0 66 %1 = select i1 %0, float 1.000000e+00, float 0.000000e+00 67 %2 = fsub float -0.000000e+00, %1 68 %3 = fptosi float %2 to i32 69 store i32 %3, i32 addrspace(1)* %out 70 ret void 71 } 72 73 ; CHECK: @fcmp_ogt_select_i32 74 ; CHECK: SETGT_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, literal.x, 75 ; CHECK-NEXT: LSHR 76 ; CHECK-NEXT: 1084227584(5.000000e+00) 77 define void @fcmp_ogt_select_i32(i32 addrspace(1)* %out, float %in) { 78 entry: 79 %0 = fcmp ogt float %in, 5.0 80 %1 = select i1 %0, i32 -1, i32 0 81 store i32 %1, i32 addrspace(1)* %out 82 ret void 83 } 84 85 ; CHECK: @fcmp_oge_select_fptosi 86 ; CHECK: SETGE_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, literal.x, 87 ; CHECK-NEXT: LSHR 88 ; CHECK-NEXT: 1084227584(5.000000e+00) 89 define void @fcmp_oge_select_fptosi(i32 addrspace(1)* %out, float %in) { 90 entry: 91 %0 = fcmp oge float %in, 5.0 92 %1 = select i1 %0, float 1.000000e+00, float 0.000000e+00 93 %2 = fsub float -0.000000e+00, %1 94 %3 = fptosi float %2 to i32 95 store i32 %3, i32 addrspace(1)* %out 96 ret void 97 } 98 99 ; CHECK: @fcmp_oge_select_i32 100 ; CHECK: SETGE_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, literal.x, 101 ; CHECK-NEXT: LSHR 102 ; CHECK-NEXT: 1084227584(5.000000e+00) 103 define void @fcmp_oge_select_i32(i32 addrspace(1)* %out, float %in) { 104 entry: 105 %0 = fcmp oge float %in, 5.0 106 %1 = select i1 %0, i32 -1, i32 0 107 store i32 %1, i32 addrspace(1)* %out 108 ret void 109 } 110 111 ; CHECK: @fcmp_ole_select_fptosi 112 ; CHECK: SETGE_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, literal.x, KC0[2].Z, 113 ; CHECK-NEXT: LSHR 114 ; CHECK-NEXT: 1084227584(5.000000e+00) 115 define void @fcmp_ole_select_fptosi(i32 addrspace(1)* %out, float %in) { 116 entry: 117 %0 = fcmp ole float %in, 5.0 118 %1 = select i1 %0, float 1.000000e+00, float 0.000000e+00 119 %2 = fsub float -0.000000e+00, %1 120 %3 = fptosi float %2 to i32 121 store i32 %3, i32 addrspace(1)* %out 122 ret void 123 } 124 125 ; CHECK: @fcmp_ole_select_i32 126 ; CHECK: SETGE_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, literal.x, KC0[2].Z, 127 ; CHECK-NEXT: LSHR 128 ; CHECK-NEXT: 1084227584(5.000000e+00) 129 define void @fcmp_ole_select_i32(i32 addrspace(1)* %out, float %in) { 130 entry: 131 %0 = fcmp ole float %in, 5.0 132 %1 = select i1 %0, i32 -1, i32 0 133 store i32 %1, i32 addrspace(1)* %out 134 ret void 135 } 136 137 ; CHECK: @fcmp_olt_select_fptosi 138 ; CHECK: SETGT_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, literal.x, KC0[2].Z, 139 ; CHECK-NEXT: LSHR 140 ; CHECK-NEXT: 1084227584(5.000000e+00) 141 define void @fcmp_olt_select_fptosi(i32 addrspace(1)* %out, float %in) { 142 entry: 143 %0 = fcmp olt float %in, 5.0 144 %1 = select i1 %0, float 1.000000e+00, float 0.000000e+00 145 %2 = fsub float -0.000000e+00, %1 146 %3 = fptosi float %2 to i32 147 store i32 %3, i32 addrspace(1)* %out 148 ret void 149 } 150 151 ; CHECK: @fcmp_olt_select_i32 152 ; CHECK: SETGT_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, literal.x, KC0[2].Z, 153 ; CHECK-NEXT: LSHR 154 ; CHECK-NEXT: 1084227584(5.000000e+00) 155 define void @fcmp_olt_select_i32(i32 addrspace(1)* %out, float %in) { 156 entry: 157 %0 = fcmp olt float %in, 5.0 158 %1 = select i1 %0, i32 -1, i32 0 159 store i32 %1, i32 addrspace(1)* %out 160 ret void 161 } 162
