1 ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s 2 3 ; SI: @sint_to_fp64 4 ; SI: V_CVT_F64_I32_e32 5 define void @sint_to_fp64(double addrspace(1)* %out, i32 %in) { 6 %result = sitofp i32 %in to double 7 store double %result, double addrspace(1)* %out 8 ret void 9 } 10 11 ; SI-LABEL: @sint_to_fp_i1_f64: 12 ; SI: V_CMP_EQ_I32_e64 [[CMP:s\[[0-9]+:[0-9]\]]], 13 ; FIXME: We should the VGPR sources for V_CNDMASK are copied from SGPRs, 14 ; we should be able to fold the SGPRs into the V_CNDMASK instructions. 15 ; SI: V_CNDMASK_B32_e64 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, [[CMP]] 16 ; SI: V_CNDMASK_B32_e64 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, [[CMP]] 17 ; SI: BUFFER_STORE_DWORDX2 18 ; SI: S_ENDPGM 19 define void @sint_to_fp_i1_f64(double addrspace(1)* %out, i32 %in) { 20 %cmp = icmp eq i32 %in, 0 21 %fp = sitofp i1 %cmp to double 22 store double %fp, double addrspace(1)* %out, align 4 23 ret void 24 } 25 26 ; SI-LABEL: @sint_to_fp_i1_f64_load: 27 ; SI: V_CNDMASK_B32_e64 [[IRESULT:v[0-9]]], 0, -1 28 ; SI-NEXT: V_CVT_F64_I32_e32 [[RESULT:v\[[0-9]+:[0-9]\]]], [[IRESULT]] 29 ; SI: BUFFER_STORE_DWORDX2 [[RESULT]] 30 ; SI: S_ENDPGM 31 define void @sint_to_fp_i1_f64_load(double addrspace(1)* %out, i1 %in) { 32 %fp = sitofp i1 %in to double 33 store double %fp, double addrspace(1)* %out, align 8 34 ret void 35 } 36
