1 ; RUN: llc < %s -march=r600 -mcpu=SI -show-mc-encoding -verify-machineinstrs | FileCheck %s 2 3 ; SMRD load with an immediate offset. 4 ; CHECK-LABEL: @smrd0 5 ; CHECK: S_LOAD_DWORD s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x1 ; encoding: [0x01 6 define void @smrd0(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) { 7 entry: 8 %0 = getelementptr i32 addrspace(2)* %ptr, i64 1 9 %1 = load i32 addrspace(2)* %0 10 store i32 %1, i32 addrspace(1)* %out 11 ret void 12 } 13 14 ; SMRD load with the largest possible immediate offset. 15 ; CHECK-LABEL: @smrd1 16 ; CHECK: S_LOAD_DWORD s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0xff ; encoding: [0xff 17 define void @smrd1(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) { 18 entry: 19 %0 = getelementptr i32 addrspace(2)* %ptr, i64 255 20 %1 = load i32 addrspace(2)* %0 21 store i32 %1, i32 addrspace(1)* %out 22 ret void 23 } 24 25 ; SMRD load with an offset greater than the largest possible immediate. 26 ; CHECK-LABEL: @smrd2 27 ; CHECK: S_MOV_B32 s[[OFFSET:[0-9]]], 0x400 28 ; CHECK: S_LOAD_DWORD s{{[0-9]}}, s[{{[0-9]:[0-9]}}], s[[OFFSET]] ; encoding: [0x0[[OFFSET]] 29 define void @smrd2(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) { 30 entry: 31 %0 = getelementptr i32 addrspace(2)* %ptr, i64 256 32 %1 = load i32 addrspace(2)* %0 33 store i32 %1, i32 addrspace(1)* %out 34 ret void 35 } 36 37 ; SMRD load with a 64-bit offset 38 ; CHECK-LABEL: @smrd3 39 ; CHECK-DAG: S_MOV_B32 s[[SHI:[0-9]+]], 4 40 ; CHECK-DAG: S_MOV_B32 s[[SLO:[0-9]+]], 0 41 ; FIXME: We don't need to copy these values to VGPRs 42 ; CHECK-DAG: V_MOV_B32_e32 v[[VHI:[0-9]+]], s[[SHI]] 43 ; CHECK-DAG: V_MOV_B32_e32 v[[VLO:[0-9]+]], s[[SLO]] 44 ; FIXME: We should be able to use S_LOAD_DWORD here 45 ; BUFFER_LOAD_DWORD v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}] + v[[[VLO]]:[[VHI]]] + 0x0 46 47 define void @smrd3(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) { 48 entry: 49 %0 = getelementptr i32 addrspace(2)* %ptr, i64 4294967296 ; 2 ^ 32 50 %1 = load i32 addrspace(2)* %0 51 store i32 %1, i32 addrspace(1)* %out 52 ret void 53 } 54 55 ; SMRD load using the load.const intrinsic with an immediate offset 56 ; CHECK-LABEL: @smrd_load_const0 57 ; CHECK: S_BUFFER_LOAD_DWORD s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x4 ; encoding: [0x04 58 define void @smrd_load_const0(<16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 { 59 main_body: 60 %20 = getelementptr <16 x i8> addrspace(2)* %0, i32 0 61 %21 = load <16 x i8> addrspace(2)* %20 62 %22 = call float @llvm.SI.load.const(<16 x i8> %21, i32 16) 63 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %22, float %22, float %22, float %22) 64 ret void 65 } 66 67 ; SMRD load using the load.const intrinsic with an offset greater largest possible 68 ; immediate offset. 69 ; CHECK-LABEL: @smrd_load_const1 70 ; CHECK: S_BUFFER_LOAD_DWORD s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0xff ; encoding: [0xff 71 define void @smrd_load_const1(<16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 { 72 main_body: 73 %20 = getelementptr <16 x i8> addrspace(2)* %0, i32 0 74 %21 = load <16 x i8> addrspace(2)* %20 75 %22 = call float @llvm.SI.load.const(<16 x i8> %21, i32 1020) 76 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %22, float %22, float %22, float %22) 77 ret void 78 } 79 ; SMRD load using the load.const intrinsic with the largetst possible 80 ; immediate offset. 81 ; CHECK-LABEL: @smrd_load_const2 82 ; CHECK: S_BUFFER_LOAD_DWORD s{{[0-9]}}, s[{{[0-9]:[0-9]}}], s[[OFFSET]] ; encoding: [0x0[[OFFSET]] 83 define void @smrd_load_const2(<16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 { 84 main_body: 85 %20 = getelementptr <16 x i8> addrspace(2)* %0, i32 0 86 %21 = load <16 x i8> addrspace(2)* %20 87 %22 = call float @llvm.SI.load.const(<16 x i8> %21, i32 1024) 88 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %22, float %22, float %22, float %22) 89 ret void 90 } 91 92 ; Function Attrs: nounwind readnone 93 declare float @llvm.SI.load.const(<16 x i8>, i32) #1 94 95 declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) 96 97 attributes #0 = { "ShaderType"="0" } 98 attributes #1 = { nounwind readnone } 99
