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      1 ; Test 64-bit addition in which the second operand is constant and in which
      2 ; three-operand forms are available.
      3 ;
      4 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
      5 
      6 ; Check additions of 1.
      7 define i64 @f1(i64 %a, i64 %b) {
      8 ; CHECK-LABEL: f1:
      9 ; CHECK: {{aghik %r2, %r3, 1|la %r2, 1\(%r3\)}}
     10 ; CHECK: br %r14
     11   %add = add i64 %b, 1
     12   ret i64 %add
     13 }
     14 
     15 ; Check the high end of the AGHIK range.
     16 define i64 @f2(i64 %a, i64 %b) {
     17 ; CHECK-LABEL: f2:
     18 ; CHECK: aghik %r2, %r3, 32767
     19 ; CHECK: br %r14
     20   %add = add i64 %b, 32767
     21   ret i64 %add
     22 }
     23 
     24 ; Check the next value up, which must use AGFI instead.
     25 define i64 @f3(i64 %a, i64 %b) {
     26 ; CHECK-LABEL: f3:
     27 ; CHECK: {{agfi %r[0-5], 32768|lay %r2, 32768\(%r3\)}}
     28 ; CHECK: br %r14
     29   %add = add i64 %b, 32768
     30   ret i64 %add
     31 }
     32 
     33 ; Check the high end of the negative AGHIK range.
     34 define i64 @f4(i64 %a, i64 %b) {
     35 ; CHECK-LABEL: f4:
     36 ; CHECK: aghik %r2, %r3, -1
     37 ; CHECK: br %r14
     38   %add = add i64 %b, -1
     39   ret i64 %add
     40 }
     41 
     42 ; Check the low end of the AGHIK range.
     43 define i64 @f5(i64 %a, i64 %b) {
     44 ; CHECK-LABEL: f5:
     45 ; CHECK: aghik %r2, %r3, -32768
     46 ; CHECK: br %r14
     47   %add = add i64 %b, -32768
     48   ret i64 %add
     49 }
     50 
     51 ; Check the next value down, which must use AGFI instead.
     52 define i64 @f6(i64 %a, i64 %b) {
     53 ; CHECK-LABEL: f6:
     54 ; CHECK: {{agfi %r[0-5], -32769|lay %r2, -32769\(%r3\)}}
     55 ; CHECK: br %r14
     56   %add = add i64 %b, -32769
     57   ret i64 %add
     58 }
     59 
     60 ; Check that AGHI is still used in obvious cases.
     61 define i64 @f7(i64 %a) {
     62 ; CHECK-LABEL: f7:
     63 ; CHECK: aghi %r2, 32000
     64 ; CHECK: br %r14
     65   %add = add i64 %a, 32000
     66   ret i64 %add
     67 }
     68