1 ; RUN: llc -mtriple=i386-unknown-unknown -mcpu=core-avx2 < %s | FileCheck --check-prefix=BMI2 %s 2 ; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=core-avx2 < %s | FileCheck --check-prefix=BMI264 %s 3 4 define i32 @shl32(i32 %x, i32 %shamt) nounwind uwtable readnone { 5 entry: 6 %shl = shl i32 %x, %shamt 7 ; BMI2: shl32 8 ; BMI2: shlxl 9 ; BMI2: ret 10 ; BMI264: shl32 11 ; BMI264: shlxl 12 ; BMI264: ret 13 ret i32 %shl 14 } 15 16 define i32 @shl32i(i32 %x) nounwind uwtable readnone { 17 entry: 18 %shl = shl i32 %x, 5 19 ; BMI2: shl32i 20 ; BMI2-NOT: shlxl 21 ; BMI2: ret 22 ; BMI264: shl32i 23 ; BMI264-NOT: shlxl 24 ; BMI264: ret 25 ret i32 %shl 26 } 27 28 define i32 @shl32p(i32* %p, i32 %shamt) nounwind uwtable readnone { 29 entry: 30 %x = load i32* %p 31 %shl = shl i32 %x, %shamt 32 ; BMI2: shl32p 33 ; Source order scheduling prevents folding, rdar:14208996. 34 ; BMI2: shlxl %{{.+}}, %{{.+}}, %{{.+}} 35 ; BMI2: ret 36 ; BMI264: shl32p 37 ; BMI264: shlxl %{{.+}}, %{{.+}}, %{{.+}} 38 ; BMI264: ret 39 ret i32 %shl 40 } 41 42 define i32 @shl32pi(i32* %p) nounwind uwtable readnone { 43 entry: 44 %x = load i32* %p 45 %shl = shl i32 %x, 5 46 ; BMI2: shl32pi 47 ; BMI2-NOT: shlxl 48 ; BMI2: ret 49 ; BMI264: shl32pi 50 ; BMI264-NOT: shlxl 51 ; BMI264: ret 52 ret i32 %shl 53 } 54 55 define i64 @shl64(i64 %x, i64 %shamt) nounwind uwtable readnone { 56 entry: 57 %shl = shl i64 %x, %shamt 58 ; BMI264: shl64 59 ; BMI264: shlxq 60 ; BMI264: ret 61 ret i64 %shl 62 } 63 64 define i64 @shl64i(i64 %x) nounwind uwtable readnone { 65 entry: 66 %shl = shl i64 %x, 7 67 ; BMI264: shl64i 68 ; BMI264-NOT: shlxq 69 ; BMI264: ret 70 ret i64 %shl 71 } 72 73 define i64 @shl64p(i64* %p, i64 %shamt) nounwind uwtable readnone { 74 entry: 75 %x = load i64* %p 76 %shl = shl i64 %x, %shamt 77 ; BMI264: shl64p 78 ; BMI264: shlxq %{{.+}}, %{{.+}}, %{{.+}} 79 ; BMI264: ret 80 ret i64 %shl 81 } 82 83 define i64 @shl64pi(i64* %p) nounwind uwtable readnone { 84 entry: 85 %x = load i64* %p 86 %shl = shl i64 %x, 7 87 ; BMI264: shl64pi 88 ; BMI264-NOT: shlxq 89 ; BMI264: ret 90 ret i64 %shl 91 } 92 93 define i32 @lshr32(i32 %x, i32 %shamt) nounwind uwtable readnone { 94 entry: 95 %shl = lshr i32 %x, %shamt 96 ; BMI2: lshr32 97 ; BMI2: shrxl 98 ; BMI2: ret 99 ; BMI264: lshr32 100 ; BMI264: shrxl 101 ; BMI264: ret 102 ret i32 %shl 103 } 104 105 define i32 @lshr32p(i32* %p, i32 %shamt) nounwind uwtable readnone { 106 entry: 107 %x = load i32* %p 108 %shl = lshr i32 %x, %shamt 109 ; BMI2: lshr32p 110 ; Source order scheduling prevents folding, rdar:14208996. 111 ; BMI2: shrxl %{{.+}}, %{{.+}}, %{{.+}} 112 ; BMI2: ret 113 ; BMI264: lshr32p 114 ; BMI264: shrxl %{{.+}}, %{{.+}}, %{{.+}} 115 ; BMI264: ret 116 ret i32 %shl 117 } 118 119 define i64 @lshr64(i64 %x, i64 %shamt) nounwind uwtable readnone { 120 entry: 121 %shl = lshr i64 %x, %shamt 122 ; BMI264: lshr64 123 ; BMI264: shrxq 124 ; BMI264: ret 125 ret i64 %shl 126 } 127 128 define i64 @lshr64p(i64* %p, i64 %shamt) nounwind uwtable readnone { 129 entry: 130 %x = load i64* %p 131 %shl = lshr i64 %x, %shamt 132 ; BMI264: lshr64p 133 ; BMI264: shrxq %{{.+}}, %{{.+}}, %{{.+}} 134 ; BMI264: ret 135 ret i64 %shl 136 } 137 138 define i32 @ashr32(i32 %x, i32 %shamt) nounwind uwtable readnone { 139 entry: 140 %shl = ashr i32 %x, %shamt 141 ; BMI2: ashr32 142 ; BMI2: sarxl 143 ; BMI2: ret 144 ; BMI264: ashr32 145 ; BMI264: sarxl 146 ; BMI264: ret 147 ret i32 %shl 148 } 149 150 define i32 @ashr32p(i32* %p, i32 %shamt) nounwind uwtable readnone { 151 entry: 152 %x = load i32* %p 153 %shl = ashr i32 %x, %shamt 154 ; BMI2: ashr32p 155 ; Source order scheduling prevents folding, rdar:14208996. 156 ; BMI2: sarxl %{{.+}}, %{{.+}}, %{{.+}} 157 ; BMI2: ret 158 ; BMI264: ashr32p 159 ; BMI264: sarxl %{{.+}}, %{{.+}}, %{{.+}} 160 ; BMI264: ret 161 ret i32 %shl 162 } 163 164 define i64 @ashr64(i64 %x, i64 %shamt) nounwind uwtable readnone { 165 entry: 166 %shl = ashr i64 %x, %shamt 167 ; BMI264: ashr64 168 ; BMI264: sarxq 169 ; BMI264: ret 170 ret i64 %shl 171 } 172 173 define i64 @ashr64p(i64* %p, i64 %shamt) nounwind uwtable readnone { 174 entry: 175 %x = load i64* %p 176 %shl = ashr i64 %x, %shamt 177 ; BMI264: ashr64p 178 ; BMI264: sarxq %{{.+}}, %{{.+}}, %{{.+}} 179 ; BMI264: ret 180 ret i64 %shl 181 } 182
