1 ; RUN: llc < %s -march=x86 -mattr=+avx | FileCheck %s 2 3 ; CHECK: test 4 ; Test case when creating pshufhw, we incorrectly set the higher order bit 5 ; for an undef, 6 define void @test(<8 x i16>* %dest, <8 x i16> %in) nounwind { 7 entry: 8 ; CHECK-NOT: vmovaps 9 ; CHECK: vmovlpd 10 ; CHECK: vpshufhw $-95 11 %0 = load <8 x i16>* %dest 12 %1 = shufflevector <8 x i16> %0, <8 x i16> %in, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 13, i32 undef, i32 14, i32 14> 13 store <8 x i16> %1, <8 x i16>* %dest 14 ret void 15 } 16 17 ; CHECK: test2 18 ; A test case where we shouldn't generate a punpckldq but a pshufd and a pslldq 19 define void @test2(<4 x i32>* %dest, <4 x i32> %in) nounwind { 20 entry: 21 ; CHECK-NOT: pslldq 22 ; CHECK: shufps 23 %0 = shufflevector <4 x i32> %in, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> < i32 undef, i32 5, i32 undef, i32 2> 24 store <4 x i32> %0, <4 x i32>* %dest 25 ret void 26 } 27
