1 ; RUN: llc < %s -march=xcore | FileCheck %s 2 3 ; CHECK-LABEL: atomic_fence 4 ; CHECK: #MEMBARRIER 5 ; CHECK: #MEMBARRIER 6 ; CHECK: #MEMBARRIER 7 ; CHECK: #MEMBARRIER 8 ; CHECK: retsp 0 9 define void @atomic_fence() nounwind { 10 entry: 11 fence acquire 12 fence release 13 fence acq_rel 14 fence seq_cst 15 ret void 16 } 17 18 @pool = external global i64 19 20 define void @atomicloadstore() nounwind { 21 entry: 22 ; CHECK-LABEL: atomicloadstore 23 24 ; CHECK: ldw r[[R0:[0-9]+]], dp[pool] 25 ; CHECK-NEXT: #MEMBARRIER 26 %0 = load atomic i32* bitcast (i64* @pool to i32*) acquire, align 4 27 28 ; CHECK-NEXT: ldaw r[[R1:[0-9]+]], dp[pool] 29 ; CHECK-NEXT: ldc r[[R2:[0-9]+]], 0 30 31 ; CHECK-NEXT: ld16s r3, r[[R1]][r[[R2]]] 32 ; CHECK-NEXT: #MEMBARRIER 33 %1 = load atomic i16* bitcast (i64* @pool to i16*) acquire, align 2 34 35 ; CHECK-NEXT: ld8u r11, r[[R1]][r[[R2]]] 36 ; CHECK-NEXT: #MEMBARRIER 37 %2 = load atomic i8* bitcast (i64* @pool to i8*) acquire, align 1 38 39 ; CHECK-NEXT: ldw r4, dp[pool] 40 ; CHECK-NEXT: #MEMBARRIER 41 %3 = load atomic i32* bitcast (i64* @pool to i32*) seq_cst, align 4 42 43 ; CHECK-NEXT: ld16s r5, r[[R1]][r[[R2]]] 44 ; CHECK-NEXT: #MEMBARRIER 45 %4 = load atomic i16* bitcast (i64* @pool to i16*) seq_cst, align 2 46 47 ; CHECK-NEXT: ld8u r6, r[[R1]][r[[R2]]] 48 ; CHECK-NEXT: #MEMBARRIER 49 %5 = load atomic i8* bitcast (i64* @pool to i8*) seq_cst, align 1 50 51 ; CHECK-NEXT: #MEMBARRIER 52 ; CHECK-NEXT: stw r[[R0]], dp[pool] 53 store atomic i32 %0, i32* bitcast (i64* @pool to i32*) release, align 4 54 55 ; CHECK-NEXT: #MEMBARRIER 56 ; CHECK-NEXT: st16 r3, r[[R1]][r[[R2]]] 57 store atomic i16 %1, i16* bitcast (i64* @pool to i16*) release, align 2 58 59 ; CHECK-NEXT: #MEMBARRIER 60 ; CHECK-NEXT: st8 r11, r[[R1]][r[[R2]]] 61 store atomic i8 %2, i8* bitcast (i64* @pool to i8*) release, align 1 62 63 ; CHECK-NEXT: #MEMBARRIER 64 ; CHECK-NEXT: stw r4, dp[pool] 65 ; CHECK-NEXT: #MEMBARRIER 66 store atomic i32 %3, i32* bitcast (i64* @pool to i32*) seq_cst, align 4 67 68 ; CHECK-NEXT: #MEMBARRIER 69 ; CHECK-NEXT: st16 r5, r[[R1]][r[[R2]]] 70 ; CHECK-NEXT: #MEMBARRIER 71 store atomic i16 %4, i16* bitcast (i64* @pool to i16*) seq_cst, align 2 72 73 ; CHECK-NEXT: #MEMBARRIER 74 ; CHECK-NEXT: st8 r6, r[[R1]][r[[R2]]] 75 ; CHECK-NEXT: #MEMBARRIER 76 store atomic i8 %5, i8* bitcast (i64* @pool to i8*) seq_cst, align 1 77 78 ; CHECK-NEXT: ldw r[[R0]], dp[pool] 79 ; CHECK-NEXT: stw r[[R0]], dp[pool] 80 ; CHECK-NEXT: ld16s r[[R0]], r[[R1]][r[[R2]]] 81 ; CHECK-NEXT: st16 r[[R0]], r[[R1]][r[[R2]]] 82 ; CHECK-NEXT: ld8u r[[R0]], r[[R1]][r[[R2]]] 83 ; CHECK-NEXT: st8 r[[R0]], r[[R1]][r[[R2]]] 84 %6 = load atomic i32* bitcast (i64* @pool to i32*) monotonic, align 4 85 store atomic i32 %6, i32* bitcast (i64* @pool to i32*) monotonic, align 4 86 %7 = load atomic i16* bitcast (i64* @pool to i16*) monotonic, align 2 87 store atomic i16 %7, i16* bitcast (i64* @pool to i16*) monotonic, align 2 88 %8 = load atomic i8* bitcast (i64* @pool to i8*) monotonic, align 1 89 store atomic i8 %8, i8* bitcast (i64* @pool to i8*) monotonic, align 1 90 91 ret void 92 } 93
