1 2 #include <stdio.h> 3 #include <assert.h> 4 #include <malloc.h> // memalign 5 #include <string.h> // memset 6 #include <math.h> // isnormal 7 8 typedef unsigned char UChar; 9 typedef unsigned short int UShort; 10 typedef unsigned int UInt; 11 typedef signed int Int; 12 typedef unsigned char UChar; 13 typedef unsigned long long int ULong; 14 15 typedef unsigned char Bool; 16 #define False ((Bool)0) 17 #define True ((Bool)1) 18 19 20 #define ITERS 1 21 22 typedef 23 enum { TySF=1234, TyDF, TyB, TyH, TyS, TyD, TyNONE } 24 LaneTy; 25 26 union _V128 { 27 UChar u8[16]; 28 UShort u16[8]; 29 UInt u32[4]; 30 ULong u64[2]; 31 float f32[4]; 32 double f64[2]; 33 }; 34 typedef union _V128 V128; 35 36 static inline UChar randUChar ( void ) 37 { 38 static UInt seed = 80021; 39 seed = 1103515245 * seed + 12345; 40 return (seed >> 17) & 0xFF; 41 } 42 43 static ULong randULong ( LaneTy ty ) 44 { 45 Int i; 46 ULong r = 0; 47 for (i = 0; i < 8; i++) { 48 r = (r << 8) | (ULong)(0xFF & randUChar()); 49 } 50 return r; 51 } 52 53 /* Generates a random V128. Ensures that that it contains normalised 54 FP numbers when viewed as either F32x4 or F64x2, so that it is 55 reasonable to use in FP test cases. */ 56 static void randV128 ( /*OUT*/V128* v, LaneTy ty ) 57 { 58 static UInt nCalls = 0, nIters = 0; 59 Int i; 60 nCalls++; 61 while (1) { 62 nIters++; 63 for (i = 0; i < 16; i++) { 64 v->u8[i] = randUChar(); 65 } 66 if (isnormal(v->f32[0]) && isnormal(v->f32[1]) && isnormal(v->f32[2]) 67 && isnormal(v->f32[3]) && isnormal(v->f64[0]) && isnormal(v->f64[1])) 68 break; 69 } 70 if (0 == (nCalls & 0xFF)) 71 printf("randV128: %u calls, %u iters\n", nCalls, nIters); 72 } 73 74 static void showV128 ( V128* v ) 75 { 76 Int i; 77 for (i = 15; i >= 0; i--) 78 printf("%02x", (Int)v->u8[i]); 79 } 80 81 __attribute__((unused)) 82 static void* memalign16(size_t szB) 83 { 84 void* x; 85 x = memalign(16, szB); 86 assert(x); 87 assert(0 == ((16-1) & (unsigned long)x)); 88 return x; 89 } 90 91 92 /* ---------------------------------------------------------------- */ 93 /* -- Test functions -- */ 94 /* ---------------------------------------------------------------- */ 95 96 /* Note this also sets the destination register to a known value (0x55..55) 97 since it can sometimes be an input to the instruction too. */ 98 #define GEN_UNARY_TEST(INSN,SUFFIXD,SUFFIXN) \ 99 __attribute__((noinline)) \ 100 static void test_##INSN##_##SUFFIXD##_##SUFFIXN ( LaneTy ty ) { \ 101 Int i; \ 102 for (i = 0; i < ITERS; i++) { \ 103 V128 block[2]; \ 104 memset(block, 0x55, sizeof(block)); \ 105 randV128(&block[0], ty); \ 106 randV128(&block[1], ty); \ 107 __asm__ __volatile__( \ 108 "ldr q7, [%0, #0] ; " \ 109 "ldr q8, [%0, #16] ; " \ 110 #INSN " v8." #SUFFIXD ", v7." #SUFFIXN " ; " \ 111 "str q8, [%0, #16] " \ 112 : : "r"(&block[0]) : "memory", "v7", "v8" \ 113 ); \ 114 printf(#INSN " v8." #SUFFIXD ", v7." #SUFFIXN); \ 115 showV128(&block[0]); printf(" "); \ 116 showV128(&block[1]); printf("\n"); \ 117 } \ 118 } 119 120 121 /* Note this also sets the destination register to a known value (0x55..55) 122 since it can sometimes be an input to the instruction too. */ 123 #define GEN_BINARY_TEST(INSN,SUFFIXD,SUFFIXN,SUFFIXM) \ 124 __attribute__((noinline)) \ 125 static void test_##INSN##_##SUFFIXD##_##SUFFIXN##_##SUFFIXM ( LaneTy ty ) { \ 126 Int i; \ 127 for (i = 0; i < ITERS; i++) { \ 128 V128 block[3]; \ 129 memset(block, 0x55, sizeof(block)); \ 130 randV128(&block[0], ty); \ 131 randV128(&block[1], ty); \ 132 randV128(&block[2], ty); \ 133 __asm__ __volatile__( \ 134 "ldr q7, [%0, #0] ; " \ 135 "ldr q8, [%0, #16] ; " \ 136 "ldr q9, [%0, #32] ; " \ 137 #INSN " v9." #SUFFIXD ", v7." #SUFFIXN ", v8." #SUFFIXM " ; " \ 138 "str q9, [%0, #32] " \ 139 : : "r"(&block[0]) : "memory", "v7", "v8", "v9" \ 140 ); \ 141 printf(#INSN " v9." #SUFFIXD \ 142 ", v7." #SUFFIXN ", v8." #SUFFIXM " "); \ 143 showV128(&block[0]); printf(" "); \ 144 showV128(&block[1]); printf(" "); \ 145 showV128(&block[2]); printf("\n"); \ 146 } \ 147 } 148 149 150 /* Note this also sets the destination register to a known value (0x55..55) 151 since it can sometimes be an input to the instruction too. */ 152 #define GEN_SHIFT_TEST(INSN,SUFFIXD,SUFFIXN,AMOUNT) \ 153 __attribute__((noinline)) \ 154 static void test_##INSN##_##SUFFIXD##_##SUFFIXN##_##AMOUNT ( LaneTy ty ) { \ 155 Int i; \ 156 for (i = 0; i < ITERS; i++) { \ 157 V128 block[2]; \ 158 memset(block, 0x55, sizeof(block)); \ 159 randV128(&block[0], ty); \ 160 randV128(&block[1], ty); \ 161 __asm__ __volatile__( \ 162 "ldr q7, [%0, #0] ; " \ 163 "ldr q8, [%0, #16] ; " \ 164 #INSN " v8." #SUFFIXD ", v7." #SUFFIXN ", #" #AMOUNT " ; " \ 165 "str q8, [%0, #16] " \ 166 : : "r"(&block[0]) : "memory", "v7", "v8" \ 167 ); \ 168 printf(#INSN " v8." #SUFFIXD ", v7." #SUFFIXN ", #" #AMOUNT " "); \ 169 showV128(&block[0]); printf(" "); \ 170 showV128(&block[1]); printf("\n"); \ 171 } \ 172 } 173 174 175 /* Generate a test that involves one integer reg and one vector reg, 176 with no bias as towards which is input or output. */ 177 #define GEN_ONEINT_ONEVEC_TEST(TESTNAME,INSN,INTREGNO,VECREGNO) \ 178 __attribute__((noinline)) \ 179 static void test_##TESTNAME ( LaneTy ty ) { \ 180 Int i; \ 181 for (i = 0; i < ITERS; i++) { \ 182 V128 block[4]; \ 183 memset(block, 0x55, sizeof(block)); \ 184 randV128(&block[0], ty); \ 185 randV128(&block[1], ty); \ 186 randV128(&block[2], ty); \ 187 randV128(&block[3], ty); \ 188 __asm__ __volatile__( \ 189 "ldr q"#VECREGNO", [%0, #0] ; " \ 190 "ldr x"#INTREGNO", [%0, #16] ; " \ 191 INSN " ; " \ 192 "str q"#VECREGNO", [%0, #32] ; " \ 193 "str x"#INTREGNO", [%0, #48] ; " \ 194 : : "r"(&block[0]) : "memory", "v"#VECREGNO, "x"#INTREGNO \ 195 ); \ 196 printf(INSN " "); \ 197 showV128(&block[0]); printf(" "); \ 198 showV128(&block[1]); printf(" "); \ 199 showV128(&block[2]); printf(" "); \ 200 showV128(&block[3]); printf("\n"); \ 201 } \ 202 } 203 204 205 /* Generate a test that involves two vector regs, 206 with no bias as towards which is input or output. 207 It's OK to use x10 as scratch.*/ 208 #define GEN_TWOVEC_TEST(TESTNAME,INSN,VECREG1NO,VECREG2NO) \ 209 __attribute__((noinline)) \ 210 static void test_##TESTNAME ( LaneTy ty ) { \ 211 Int i; \ 212 for (i = 0; i < ITERS; i++) { \ 213 V128 block[4]; \ 214 memset(block, 0x55, sizeof(block)); \ 215 randV128(&block[0], ty); \ 216 randV128(&block[1], ty); \ 217 randV128(&block[2], ty); \ 218 randV128(&block[3], ty); \ 219 __asm__ __volatile__( \ 220 "ldr q"#VECREG1NO", [%0, #0] ; " \ 221 "ldr q"#VECREG2NO", [%0, #16] ; " \ 222 INSN " ; " \ 223 "str q"#VECREG1NO", [%0, #32] ; " \ 224 "str q"#VECREG2NO", [%0, #48] ; " \ 225 : : "r"(&block[0]) \ 226 : "memory", "v"#VECREG1NO, "v"#VECREG2NO, "x10" \ 227 ); \ 228 printf(INSN " "); \ 229 showV128(&block[0]); printf(" "); \ 230 showV128(&block[1]); printf(" "); \ 231 showV128(&block[2]); printf(" "); \ 232 showV128(&block[3]); printf("\n"); \ 233 } \ 234 } 235 236 237 /* Generate a test that involves three vector regs, 238 with no bias as towards which is input or output. It's also OK 239 to use v16, v17, v18 as scratch. */ 240 #define GEN_THREEVEC_TEST(TESTNAME,INSN,VECREG1NO,VECREG2NO,VECREG3NO) \ 241 __attribute__((noinline)) \ 242 static void test_##TESTNAME ( LaneTy ty ) { \ 243 Int i; \ 244 for (i = 0; i < ITERS; i++) { \ 245 V128 block[6]; \ 246 memset(block, 0x55, sizeof(block)); \ 247 randV128(&block[0], ty); \ 248 randV128(&block[1], ty); \ 249 randV128(&block[2], ty); \ 250 randV128(&block[3], ty); \ 251 randV128(&block[4], ty); \ 252 randV128(&block[5], ty); \ 253 __asm__ __volatile__( \ 254 "ldr q"#VECREG1NO", [%0, #0] ; " \ 255 "ldr q"#VECREG2NO", [%0, #16] ; " \ 256 "ldr q"#VECREG3NO", [%0, #32] ; " \ 257 INSN " ; " \ 258 "str q"#VECREG1NO", [%0, #48] ; " \ 259 "str q"#VECREG2NO", [%0, #64] ; " \ 260 "str q"#VECREG3NO", [%0, #80] ; " \ 261 : : "r"(&block[0]) \ 262 : "memory", "v"#VECREG1NO, "v"#VECREG2NO, "v"#VECREG3NO, \ 263 "v16", "v17", "v18" \ 264 ); \ 265 printf(INSN " "); \ 266 showV128(&block[0]); printf(" "); \ 267 showV128(&block[1]); printf(" "); \ 268 showV128(&block[2]); printf(" "); \ 269 showV128(&block[3]); printf(" "); \ 270 showV128(&block[4]); printf(" "); \ 271 showV128(&block[5]); printf("\n"); \ 272 } \ 273 } 274 275 276 void test_UMINV ( void ) 277 { 278 int i; 279 V128 block[2]; 280 281 /* -- 4s -- */ 282 283 for (i = 0; i < 10; i++) { 284 memset(&block, 0x55, sizeof(block)); 285 randV128(&block[0], TyS); 286 randV128(&block[1], TyS); 287 __asm__ __volatile__( 288 "ldr q7, [%0, #0] ; " 289 "uminv s8, v7.4s ; " 290 "str q8, [%0, #16] " 291 : : "r"(&block[0]) : "memory", "v7", "v8" 292 ); 293 printf("UMINV v8, v7.4s "); 294 showV128(&block[0]); printf(" "); 295 showV128(&block[1]); printf("\n"); 296 } 297 298 /* -- 8h -- */ 299 300 for (i = 0; i < 10; i++) { 301 memset(&block, 0x55, sizeof(block)); 302 randV128(&block[0], TyH); 303 randV128(&block[1], TyH); 304 __asm__ __volatile__( 305 "ldr q7, [%0, #0] ; " 306 "uminv h8, v7.8h ; " 307 "str q8, [%0, #16] " 308 : : "r"(&block[0]) : "memory", "v7", "v8" 309 ); 310 printf("UMINV h8, v7.8h "); 311 showV128(&block[0]); printf(" "); 312 showV128(&block[1]); printf("\n"); 313 } 314 315 /* -- 4h -- */ 316 317 for (i = 0; i < 10; i++) { 318 memset(&block, 0x55, sizeof(block)); 319 randV128(&block[0], TyH); 320 randV128(&block[1], TyH); 321 __asm__ __volatile__( 322 "ldr q7, [%0, #0] ; " 323 "uminv h8, v7.4h ; " 324 "str q8, [%0, #16] " 325 : : "r"(&block[0]) : "memory", "v7", "v8" 326 ); 327 printf("UMINV h8, v7.4h "); 328 showV128(&block[0]); printf(" "); 329 showV128(&block[1]); printf("\n"); 330 } 331 332 /* -- 16b -- */ 333 334 for (i = 0; i < 10; i++) { 335 memset(&block, 0x55, sizeof(block)); 336 randV128(&block[0], TyB); 337 randV128(&block[1], TyB); 338 __asm__ __volatile__( 339 "ldr q7, [%0, #0] ; " 340 "uminv b8, v7.16b ; " 341 "str q8, [%0, #16] " 342 : : "r"(&block[0]) : "memory", "v7", "v8" 343 ); 344 printf("UMINV b8, v7.16b "); 345 showV128(&block[0]); printf(" "); 346 showV128(&block[1]); printf("\n"); 347 } 348 349 /* -- 8b -- */ 350 351 for (i = 0; i < 10; i++) { 352 memset(&block, 0x55, sizeof(block)); 353 randV128(&block[0], TyB); 354 randV128(&block[1], TyB); 355 __asm__ __volatile__( 356 "ldr q7, [%0, #0] ; " 357 "uminv b8, v7.8b ; " 358 "str q8, [%0, #16] " 359 : : "r"(&block[0]) : "memory", "v7", "v8" 360 ); 361 printf("UMINV b8, v7.8b "); 362 showV128(&block[0]); printf(" "); 363 showV128(&block[1]); printf("\n"); 364 } 365 366 } 367 368 369 void test_UMAXV ( void ) 370 { 371 int i; 372 V128 block[2]; 373 374 /* -- 4s -- */ 375 376 for (i = 0; i < 10; i++) { 377 memset(&block, 0x55, sizeof(block)); 378 randV128(&block[0], TyS); 379 randV128(&block[1], TyS); 380 __asm__ __volatile__( 381 "ldr q7, [%0, #0] ; " 382 "umaxv s8, v7.4s ; " 383 "str q8, [%0, #16] " 384 : : "r"(&block[0]) : "memory", "v7", "v8" 385 ); 386 printf("UMAXV v8, v7.4s "); 387 showV128(&block[0]); printf(" "); 388 showV128(&block[1]); printf("\n"); 389 } 390 391 /* -- 8h -- */ 392 393 for (i = 0; i < 10; i++) { 394 memset(&block, 0x55, sizeof(block)); 395 randV128(&block[0], TyH); 396 randV128(&block[1], TyH); 397 __asm__ __volatile__( 398 "ldr q7, [%0, #0] ; " 399 "umaxv h8, v7.8h ; " 400 "str q8, [%0, #16] " 401 : : "r"(&block[0]) : "memory", "v7", "v8" 402 ); 403 printf("UMAXV h8, v7.8h "); 404 showV128(&block[0]); printf(" "); 405 showV128(&block[1]); printf("\n"); 406 } 407 408 /* -- 4h -- */ 409 410 for (i = 0; i < 10; i++) { 411 memset(&block, 0x55, sizeof(block)); 412 randV128(&block[0], TyH); 413 randV128(&block[1], TyH); 414 __asm__ __volatile__( 415 "ldr q7, [%0, #0] ; " 416 "umaxv h8, v7.4h ; " 417 "str q8, [%0, #16] " 418 : : "r"(&block[0]) : "memory", "v7", "v8" 419 ); 420 printf("UMAXV h8, v7.4h "); 421 showV128(&block[0]); printf(" "); 422 showV128(&block[1]); printf("\n"); 423 } 424 425 /* -- 16b -- */ 426 427 for (i = 0; i < 10; i++) { 428 memset(&block, 0x55, sizeof(block)); 429 randV128(&block[0], TyB); 430 randV128(&block[1], TyB); 431 __asm__ __volatile__( 432 "ldr q7, [%0, #0] ; " 433 "umaxv b8, v7.16b ; " 434 "str q8, [%0, #16] " 435 : : "r"(&block[0]) : "memory", "v7", "v8" 436 ); 437 printf("UMAXV b8, v7.16b "); 438 showV128(&block[0]); printf(" "); 439 showV128(&block[1]); printf("\n"); 440 } 441 442 /* -- 8b -- */ 443 444 for (i = 0; i < 10; i++) { 445 memset(&block, 0x55, sizeof(block)); 446 randV128(&block[0], TyB); 447 randV128(&block[1], TyB); 448 __asm__ __volatile__( 449 "ldr q7, [%0, #0] ; " 450 "umaxv b8, v7.8b ; " 451 "str q8, [%0, #16] " 452 : : "r"(&block[0]) : "memory", "v7", "v8" 453 ); 454 printf("UMAXV b8, v7.8b "); 455 showV128(&block[0]); printf(" "); 456 showV128(&block[1]); printf("\n"); 457 } 458 459 } 460 461 462 void test_INS_general ( void ) 463 { 464 V128 block[3]; 465 466 /* -- D[0..1] -- */ 467 468 memset(&block, 0x55, sizeof(block)); 469 block[1].u64[0] = randULong(TyD); 470 __asm__ __volatile__( 471 "ldr q7, [%0, #0] ; " 472 "ldr x19, [%0, #16] ; " 473 "ins v7.d[0], x19 ; " 474 "str q7, [%0, #32] " 475 : : "r"(&block[0]) : "memory", "x19", "v7" 476 ); 477 printf("INS v7.u64[0],x19 "); 478 showV128(&block[0]); printf(" %016llx ", block[1].u64[0]); 479 showV128(&block[2]); printf("\n"); 480 481 memset(&block, 0x55, sizeof(block)); 482 block[1].u64[0] = randULong(TyD); 483 __asm__ __volatile__( 484 "ldr q7, [%0, #0] ; " 485 "ldr x19, [%0, #16] ; " 486 "ins v7.d[1], x19 ; " 487 "str q7, [%0, #32] " 488 : : "r"(&block[0]) : "memory", "x19", "v7" 489 ); 490 printf("INS v7.d[1],x19 "); 491 showV128(&block[0]); printf(" %016llx ", block[1].u64[0]); 492 showV128(&block[2]); printf("\n"); 493 494 /* -- S[0..3] -- */ 495 496 memset(&block, 0x55, sizeof(block)); 497 block[1].u64[0] = randULong(TyS); 498 __asm__ __volatile__( 499 "ldr q7, [%0, #0] ; " 500 "ldr x19, [%0, #16] ; " 501 "ins v7.s[0], w19 ; " 502 "str q7, [%0, #32] " 503 : : "r"(&block[0]) : "memory", "x19", "v7" 504 ); 505 printf("INS v7.s[0],x19 "); 506 showV128(&block[0]); printf(" %016llx ", block[1].u64[0]); 507 showV128(&block[2]); printf("\n"); 508 509 memset(&block, 0x55, sizeof(block)); 510 block[1].u64[0] = randULong(TyS); 511 __asm__ __volatile__( 512 "ldr q7, [%0, #0] ; " 513 "ldr x19, [%0, #16] ; " 514 "ins v7.s[1], w19 ; " 515 "str q7, [%0, #32] " 516 : : "r"(&block[0]) : "memory", "x19", "v7" 517 ); 518 printf("INS v7.s[1],x19 "); 519 showV128(&block[0]); printf(" %016llx ", block[1].u64[0]); 520 showV128(&block[2]); printf("\n"); 521 522 memset(&block, 0x55, sizeof(block)); 523 block[1].u64[0] = randULong(TyS); 524 __asm__ __volatile__( 525 "ldr q7, [%0, #0] ; " 526 "ldr x19, [%0, #16] ; " 527 "ins v7.s[2], w19 ; " 528 "str q7, [%0, #32] " 529 : : "r"(&block[0]) : "memory", "x19", "v7" 530 ); 531 printf("INS v7.s[2],x19 "); 532 showV128(&block[0]); printf(" %016llx ", block[1].u64[0]); 533 showV128(&block[2]); printf("\n"); 534 535 memset(&block, 0x55, sizeof(block)); 536 block[1].u64[0] = randULong(TyS); 537 __asm__ __volatile__( 538 "ldr q7, [%0, #0] ; " 539 "ldr x19, [%0, #16] ; " 540 "ins v7.s[3], w19 ; " 541 "str q7, [%0, #32] " 542 : : "r"(&block[0]) : "memory", "x19", "v7" 543 ); 544 printf("INS v7.s[3],x19 "); 545 showV128(&block[0]); printf(" %016llx ", block[1].u64[0]); 546 showV128(&block[2]); printf("\n"); 547 548 /* -- H[0..7] -- */ 549 550 memset(&block, 0x55, sizeof(block)); 551 block[1].u64[0] = randULong(TyH); 552 __asm__ __volatile__( 553 "ldr q7, [%0, #0] ; " 554 "ldr x19, [%0, #16] ; " 555 "ins v7.h[0], w19 ; " 556 "str q7, [%0, #32] " 557 : : "r"(&block[0]) : "memory", "x19", "v7" 558 ); 559 printf("INS v7.h[0],x19 "); 560 showV128(&block[0]); printf(" %016llx ", block[1].u64[0]); 561 showV128(&block[2]); printf("\n"); 562 563 memset(&block, 0x55, sizeof(block)); 564 block[1].u64[0] = randULong(TyH); 565 __asm__ __volatile__( 566 "ldr q7, [%0, #0] ; " 567 "ldr x19, [%0, #16] ; " 568 "ins v7.h[1], w19 ; " 569 "str q7, [%0, #32] " 570 : : "r"(&block[0]) : "memory", "x19", "v7" 571 ); 572 printf("INS v7.h[1],x19 "); 573 showV128(&block[0]); printf(" %016llx ", block[1].u64[0]); 574 showV128(&block[2]); printf("\n"); 575 576 memset(&block, 0x55, sizeof(block)); 577 block[1].u64[0] = randULong(TyH); 578 __asm__ __volatile__( 579 "ldr q7, [%0, #0] ; " 580 "ldr x19, [%0, #16] ; " 581 "ins v7.h[2], w19 ; " 582 "str q7, [%0, #32] " 583 : : "r"(&block[0]) : "memory", "x19", "v7" 584 ); 585 printf("INS v7.h[2],x19 "); 586 showV128(&block[0]); printf(" %016llx ", block[1].u64[0]); 587 showV128(&block[2]); printf("\n"); 588 589 memset(&block, 0x55, sizeof(block)); 590 block[1].u64[0] = randULong(TyH); 591 __asm__ __volatile__( 592 "ldr q7, [%0, #0] ; " 593 "ldr x19, [%0, #16] ; " 594 "ins v7.h[3], w19 ; " 595 "str q7, [%0, #32] " 596 : : "r"(&block[0]) : "memory", "x19", "v7" 597 ); 598 printf("INS v7.h[3],x19 "); 599 showV128(&block[0]); printf(" %016llx ", block[1].u64[0]); 600 showV128(&block[2]); printf("\n"); 601 602 memset(&block, 0x55, sizeof(block)); 603 block[1].u64[0] = randULong(TyH); 604 __asm__ __volatile__( 605 "ldr q7, [%0, #0] ; " 606 "ldr x19, [%0, #16] ; " 607 "ins v7.h[4], w19 ; " 608 "str q7, [%0, #32] " 609 : : "r"(&block[0]) : "memory", "x19", "v7" 610 ); 611 printf("INS v7.h[4],x19 "); 612 showV128(&block[0]); printf(" %016llx ", block[1].u64[0]); 613 showV128(&block[2]); printf("\n"); 614 615 memset(&block, 0x55, sizeof(block)); 616 block[1].u64[0] = randULong(TyH); 617 __asm__ __volatile__( 618 "ldr q7, [%0, #0] ; " 619 "ldr x19, [%0, #16] ; " 620 "ins v7.h[5], w19 ; " 621 "str q7, [%0, #32] " 622 : : "r"(&block[0]) : "memory", "x19", "v7" 623 ); 624 printf("INS v7.h[5],x19 "); 625 showV128(&block[0]); printf(" %016llx ", block[1].u64[0]); 626 showV128(&block[2]); printf("\n"); 627 628 memset(&block, 0x55, sizeof(block)); 629 block[1].u64[0] = randULong(TyH); 630 __asm__ __volatile__( 631 "ldr q7, [%0, #0] ; " 632 "ldr x19, [%0, #16] ; " 633 "ins v7.h[6], w19 ; " 634 "str q7, [%0, #32] " 635 : : "r"(&block[0]) : "memory", "x19", "v7" 636 ); 637 printf("INS v7.h[6],x19 "); 638 showV128(&block[0]); printf(" %016llx ", block[1].u64[0]); 639 showV128(&block[2]); printf("\n"); 640 641 memset(&block, 0x55, sizeof(block)); 642 block[1].u64[0] = randULong(TyH); 643 __asm__ __volatile__( 644 "ldr q7, [%0, #0] ; " 645 "ldr x19, [%0, #16] ; " 646 "ins v7.h[7], w19 ; " 647 "str q7, [%0, #32] " 648 : : "r"(&block[0]) : "memory", "x19", "v7" 649 ); 650 printf("INS v7.h[7],x19 "); 651 showV128(&block[0]); printf(" %016llx ", block[1].u64[0]); 652 showV128(&block[2]); printf("\n"); 653 654 /* -- B[0,15] -- */ 655 656 memset(&block, 0x55, sizeof(block)); 657 block[1].u64[0] = randULong(TyB); 658 __asm__ __volatile__( 659 "ldr q7, [%0, #0] ; " 660 "ldr x19, [%0, #16] ; " 661 "ins v7.b[0], w19 ; " 662 "str q7, [%0, #32] " 663 : : "r"(&block[0]) : "memory", "x19", "v7" 664 ); 665 printf("INS v7.b[0],x19 "); 666 showV128(&block[0]); printf(" %016llx ", block[1].u64[0]); 667 showV128(&block[2]); printf("\n"); 668 669 memset(&block, 0x55, sizeof(block)); 670 block[1].u64[0] = randULong(TyB); 671 __asm__ __volatile__( 672 "ldr q7, [%0, #0] ; " 673 "ldr x19, [%0, #16] ; " 674 "ins v7.b[15], w19 ; " 675 "str q7, [%0, #32] " 676 : : "r"(&block[0]) : "memory", "x19", "v7" 677 ); 678 printf("INS v7.b[15],x19 "); 679 showV128(&block[0]); printf(" %016llx ", block[1].u64[0]); 680 showV128(&block[2]); printf("\n"); 681 } 682 683 684 685 void test_SMINV ( void ) 686 { 687 int i; 688 V128 block[2]; 689 690 /* -- 4s -- */ 691 692 for (i = 0; i < 10; i++) { 693 memset(&block, 0x55, sizeof(block)); 694 randV128(&block[0], TyS); 695 randV128(&block[1], TyS); 696 __asm__ __volatile__( 697 "ldr q7, [%0, #0] ; " 698 "sminv s8, v7.4s ; " 699 "str q8, [%0, #16] " 700 : : "r"(&block[0]) : "memory", "v7", "v8" 701 ); 702 printf("SMINV v8, v7.4s "); 703 showV128(&block[0]); printf(" "); 704 showV128(&block[1]); printf("\n"); 705 } 706 707 /* -- 8h -- */ 708 709 for (i = 0; i < 10; i++) { 710 memset(&block, 0x55, sizeof(block)); 711 randV128(&block[0], TyH); 712 randV128(&block[1], TyH); 713 __asm__ __volatile__( 714 "ldr q7, [%0, #0] ; " 715 "sminv h8, v7.8h ; " 716 "str q8, [%0, #16] " 717 : : "r"(&block[0]) : "memory", "v7", "v8" 718 ); 719 printf("SMINV h8, v7.8h "); 720 showV128(&block[0]); printf(" "); 721 showV128(&block[1]); printf("\n"); 722 } 723 724 /* -- 4h -- */ 725 726 for (i = 0; i < 10; i++) { 727 memset(&block, 0x55, sizeof(block)); 728 randV128(&block[0], TyH); 729 randV128(&block[1], TyH); 730 __asm__ __volatile__( 731 "ldr q7, [%0, #0] ; " 732 "sminv h8, v7.4h ; " 733 "str q8, [%0, #16] " 734 : : "r"(&block[0]) : "memory", "v7", "v8" 735 ); 736 printf("SMINV h8, v7.4h "); 737 showV128(&block[0]); printf(" "); 738 showV128(&block[1]); printf("\n"); 739 } 740 741 /* -- 16b -- */ 742 743 for (i = 0; i < 10; i++) { 744 memset(&block, 0x55, sizeof(block)); 745 randV128(&block[0], TyB); 746 randV128(&block[1], TyB); 747 __asm__ __volatile__( 748 "ldr q7, [%0, #0] ; " 749 "sminv b8, v7.16b ; " 750 "str q8, [%0, #16] " 751 : : "r"(&block[0]) : "memory", "v7", "v8" 752 ); 753 printf("SMINV b8, v7.16b "); 754 showV128(&block[0]); printf(" "); 755 showV128(&block[1]); printf("\n"); 756 } 757 758 /* -- 8b -- */ 759 760 for (i = 0; i < 10; i++) { 761 memset(&block, 0x55, sizeof(block)); 762 randV128(&block[0], TyB); 763 randV128(&block[1], TyB); 764 __asm__ __volatile__( 765 "ldr q7, [%0, #0] ; " 766 "sminv b8, v7.8b ; " 767 "str q8, [%0, #16] " 768 : : "r"(&block[0]) : "memory", "v7", "v8" 769 ); 770 printf("SMINV b8, v7.8b "); 771 showV128(&block[0]); printf(" "); 772 showV128(&block[1]); printf("\n"); 773 } 774 775 } 776 777 778 void test_SMAXV ( void ) 779 { 780 int i; 781 V128 block[2]; 782 783 /* -- 4s -- */ 784 785 for (i = 0; i < 10; i++) { 786 memset(&block, 0x55, sizeof(block)); 787 randV128(&block[0], TyS); 788 randV128(&block[1], TyS); 789 __asm__ __volatile__( 790 "ldr q7, [%0, #0] ; " 791 "smaxv s8, v7.4s ; " 792 "str q8, [%0, #16] " 793 : : "r"(&block[0]) : "memory", "v7", "v8" 794 ); 795 printf("SMAXV v8, v7.4s "); 796 showV128(&block[0]); printf(" "); 797 showV128(&block[1]); printf("\n"); 798 } 799 800 /* -- 8h -- */ 801 802 for (i = 0; i < 10; i++) { 803 memset(&block, 0x55, sizeof(block)); 804 randV128(&block[0], TyH); 805 randV128(&block[1], TyH); 806 __asm__ __volatile__( 807 "ldr q7, [%0, #0] ; " 808 "smaxv h8, v7.8h ; " 809 "str q8, [%0, #16] " 810 : : "r"(&block[0]) : "memory", "v7", "v8" 811 ); 812 printf("SMAXV h8, v7.8h "); 813 showV128(&block[0]); printf(" "); 814 showV128(&block[1]); printf("\n"); 815 } 816 817 /* -- 4h -- */ 818 819 for (i = 0; i < 10; i++) { 820 memset(&block, 0x55, sizeof(block)); 821 randV128(&block[0], TyH); 822 randV128(&block[1], TyH); 823 __asm__ __volatile__( 824 "ldr q7, [%0, #0] ; " 825 "smaxv h8, v7.4h ; " 826 "str q8, [%0, #16] " 827 : : "r"(&block[0]) : "memory", "v7", "v8" 828 ); 829 printf("SMAXV h8, v7.4h "); 830 showV128(&block[0]); printf(" "); 831 showV128(&block[1]); printf("\n"); 832 } 833 834 /* -- 16b -- */ 835 836 for (i = 0; i < 10; i++) { 837 memset(&block, 0x55, sizeof(block)); 838 randV128(&block[0], TyB); 839 randV128(&block[1], TyB); 840 __asm__ __volatile__( 841 "ldr q7, [%0, #0] ; " 842 "smaxv b8, v7.16b ; " 843 "str q8, [%0, #16] " 844 : : "r"(&block[0]) : "memory", "v7", "v8" 845 ); 846 printf("SMAXV b8, v7.16b "); 847 showV128(&block[0]); printf(" "); 848 showV128(&block[1]); printf("\n"); 849 } 850 851 /* -- 8b -- */ 852 853 for (i = 0; i < 10; i++) { 854 memset(&block, 0x55, sizeof(block)); 855 randV128(&block[0], TyB); 856 randV128(&block[1], TyB); 857 __asm__ __volatile__( 858 "ldr q7, [%0, #0] ; " 859 "smaxv b8, v7.8b ; " 860 "str q8, [%0, #16] " 861 : : "r"(&block[0]) : "memory", "v7", "v8" 862 ); 863 printf("SMAXV b8, v7.8b "); 864 showV128(&block[0]); printf(" "); 865 showV128(&block[1]); printf("\n"); 866 } 867 868 } 869 870 871 GEN_BINARY_TEST(umax, 4s, 4s, 4s) 872 GEN_BINARY_TEST(umax, 2s, 2s, 2s) 873 GEN_BINARY_TEST(umax, 8h, 8h, 8h) 874 GEN_BINARY_TEST(umax, 4h, 4h, 4h) 875 GEN_BINARY_TEST(umax, 16b, 16b, 16b) 876 GEN_BINARY_TEST(umax, 8b, 8b, 8b) 877 878 GEN_BINARY_TEST(umin, 4s, 4s, 4s) 879 GEN_BINARY_TEST(umin, 2s, 2s, 2s) 880 GEN_BINARY_TEST(umin, 8h, 8h, 8h) 881 GEN_BINARY_TEST(umin, 4h, 4h, 4h) 882 GEN_BINARY_TEST(umin, 16b, 16b, 16b) 883 GEN_BINARY_TEST(umin, 8b, 8b, 8b) 884 885 GEN_BINARY_TEST(smax, 4s, 4s, 4s) 886 GEN_BINARY_TEST(smax, 2s, 2s, 2s) 887 GEN_BINARY_TEST(smax, 8h, 8h, 8h) 888 GEN_BINARY_TEST(smax, 4h, 4h, 4h) 889 GEN_BINARY_TEST(smax, 16b, 16b, 16b) 890 GEN_BINARY_TEST(smax, 8b, 8b, 8b) 891 892 GEN_BINARY_TEST(smin, 4s, 4s, 4s) 893 GEN_BINARY_TEST(smin, 2s, 2s, 2s) 894 GEN_BINARY_TEST(smin, 8h, 8h, 8h) 895 GEN_BINARY_TEST(smin, 4h, 4h, 4h) 896 GEN_BINARY_TEST(smin, 16b, 16b, 16b) 897 GEN_BINARY_TEST(smin, 8b, 8b, 8b) 898 899 GEN_BINARY_TEST(add, 2d, 2d, 2d) 900 GEN_BINARY_TEST(add, 4s, 4s, 4s) 901 GEN_BINARY_TEST(add, 2s, 2s, 2s) 902 GEN_BINARY_TEST(add, 8h, 8h, 8h) 903 GEN_BINARY_TEST(add, 4h, 4h, 4h) 904 GEN_BINARY_TEST(add, 16b, 16b, 16b) 905 GEN_BINARY_TEST(add, 8b, 8b, 8b) 906 907 GEN_BINARY_TEST(sub, 2d, 2d, 2d) 908 GEN_BINARY_TEST(sub, 4s, 4s, 4s) 909 GEN_BINARY_TEST(sub, 2s, 2s, 2s) 910 GEN_BINARY_TEST(sub, 8h, 8h, 8h) 911 GEN_BINARY_TEST(sub, 4h, 4h, 4h) 912 GEN_BINARY_TEST(sub, 16b, 16b, 16b) 913 GEN_BINARY_TEST(sub, 8b, 8b, 8b) 914 915 GEN_BINARY_TEST(mul, 4s, 4s, 4s) 916 GEN_BINARY_TEST(mul, 2s, 2s, 2s) 917 GEN_BINARY_TEST(mul, 8h, 8h, 8h) 918 GEN_BINARY_TEST(mul, 4h, 4h, 4h) 919 GEN_BINARY_TEST(mul, 16b, 16b, 16b) 920 GEN_BINARY_TEST(mul, 8b, 8b, 8b) 921 922 GEN_BINARY_TEST(mla, 4s, 4s, 4s) 923 GEN_BINARY_TEST(mla, 2s, 2s, 2s) 924 GEN_BINARY_TEST(mla, 8h, 8h, 8h) 925 GEN_BINARY_TEST(mla, 4h, 4h, 4h) 926 GEN_BINARY_TEST(mla, 16b, 16b, 16b) 927 GEN_BINARY_TEST(mla, 8b, 8b, 8b) 928 929 GEN_BINARY_TEST(mls, 4s, 4s, 4s) 930 GEN_BINARY_TEST(mls, 2s, 2s, 2s) 931 GEN_BINARY_TEST(mls, 8h, 8h, 8h) 932 GEN_BINARY_TEST(mls, 4h, 4h, 4h) 933 GEN_BINARY_TEST(mls, 16b, 16b, 16b) 934 GEN_BINARY_TEST(mls, 8b, 8b, 8b) 935 936 GEN_BINARY_TEST(and, 16b, 16b, 16b) 937 GEN_BINARY_TEST(and, 8b, 8b, 8b) 938 939 GEN_BINARY_TEST(bic, 16b, 16b, 16b) 940 GEN_BINARY_TEST(bic, 8b, 8b, 8b) 941 942 GEN_BINARY_TEST(orr, 16b, 16b, 16b) 943 GEN_BINARY_TEST(orr, 8b, 8b, 8b) 944 945 GEN_BINARY_TEST(orn, 16b, 16b, 16b) 946 GEN_BINARY_TEST(orn, 8b, 8b, 8b) 947 948 GEN_BINARY_TEST(eor, 16b, 16b, 16b) 949 GEN_BINARY_TEST(eor, 8b, 8b, 8b) 950 951 GEN_BINARY_TEST(bsl, 16b, 16b, 16b) 952 GEN_BINARY_TEST(bsl, 8b, 8b, 8b) 953 954 GEN_BINARY_TEST(bit, 16b, 16b, 16b) 955 GEN_BINARY_TEST(bit, 8b, 8b, 8b) 956 957 GEN_BINARY_TEST(bif, 16b, 16b, 16b) 958 GEN_BINARY_TEST(bif, 8b, 8b, 8b) 959 960 GEN_BINARY_TEST(cmeq, 2d, 2d, 2d) 961 GEN_BINARY_TEST(cmeq, 4s, 4s, 4s) 962 GEN_BINARY_TEST(cmeq, 2s, 2s, 2s) 963 GEN_BINARY_TEST(cmeq, 8h, 8h, 8h) 964 GEN_BINARY_TEST(cmeq, 4h, 4h, 4h) 965 GEN_BINARY_TEST(cmeq, 16b, 16b, 16b) 966 GEN_BINARY_TEST(cmeq, 8b, 8b, 8b) 967 968 GEN_BINARY_TEST(cmtst, 2d, 2d, 2d) 969 GEN_BINARY_TEST(cmtst, 4s, 4s, 4s) 970 GEN_BINARY_TEST(cmtst, 2s, 2s, 2s) 971 GEN_BINARY_TEST(cmtst, 8h, 8h, 8h) 972 GEN_BINARY_TEST(cmtst, 4h, 4h, 4h) 973 GEN_BINARY_TEST(cmtst, 16b, 16b, 16b) 974 GEN_BINARY_TEST(cmtst, 8b, 8b, 8b) 975 976 GEN_BINARY_TEST(cmhi, 2d, 2d, 2d) 977 GEN_BINARY_TEST(cmhi, 4s, 4s, 4s) 978 GEN_BINARY_TEST(cmhi, 2s, 2s, 2s) 979 GEN_BINARY_TEST(cmhi, 8h, 8h, 8h) 980 GEN_BINARY_TEST(cmhi, 4h, 4h, 4h) 981 GEN_BINARY_TEST(cmhi, 16b, 16b, 16b) 982 GEN_BINARY_TEST(cmhi, 8b, 8b, 8b) 983 984 GEN_BINARY_TEST(cmgt, 2d, 2d, 2d) 985 GEN_BINARY_TEST(cmgt, 4s, 4s, 4s) 986 GEN_BINARY_TEST(cmgt, 2s, 2s, 2s) 987 GEN_BINARY_TEST(cmgt, 8h, 8h, 8h) 988 GEN_BINARY_TEST(cmgt, 4h, 4h, 4h) 989 GEN_BINARY_TEST(cmgt, 16b, 16b, 16b) 990 GEN_BINARY_TEST(cmgt, 8b, 8b, 8b) 991 992 GEN_BINARY_TEST(cmhs, 2d, 2d, 2d) 993 GEN_BINARY_TEST(cmhs, 4s, 4s, 4s) 994 GEN_BINARY_TEST(cmhs, 2s, 2s, 2s) 995 GEN_BINARY_TEST(cmhs, 8h, 8h, 8h) 996 GEN_BINARY_TEST(cmhs, 4h, 4h, 4h) 997 GEN_BINARY_TEST(cmhs, 16b, 16b, 16b) 998 GEN_BINARY_TEST(cmhs, 8b, 8b, 8b) 999 1000 GEN_BINARY_TEST(cmge, 2d, 2d, 2d) 1001 GEN_BINARY_TEST(cmge, 4s, 4s, 4s) 1002 GEN_BINARY_TEST(cmge, 2s, 2s, 2s) 1003 GEN_BINARY_TEST(cmge, 8h, 8h, 8h) 1004 GEN_BINARY_TEST(cmge, 4h, 4h, 4h) 1005 GEN_BINARY_TEST(cmge, 16b, 16b, 16b) 1006 GEN_BINARY_TEST(cmge, 8b, 8b, 8b) 1007 1008 GEN_SHIFT_TEST(ushr, 2d, 2d, 1) 1009 GEN_SHIFT_TEST(ushr, 2d, 2d, 13) 1010 GEN_SHIFT_TEST(ushr, 2d, 2d, 64) 1011 GEN_SHIFT_TEST(sshr, 2d, 2d, 1) 1012 GEN_SHIFT_TEST(sshr, 2d, 2d, 13) 1013 GEN_SHIFT_TEST(sshr, 2d, 2d, 64) 1014 GEN_SHIFT_TEST(shl, 2d, 2d, 0) 1015 GEN_SHIFT_TEST(shl, 2d, 2d, 13) 1016 GEN_SHIFT_TEST(shl, 2d, 2d, 63) 1017 1018 GEN_SHIFT_TEST(ushr, 4s, 4s, 1) 1019 GEN_SHIFT_TEST(ushr, 4s, 4s, 13) 1020 GEN_SHIFT_TEST(ushr, 4s, 4s, 32) 1021 GEN_SHIFT_TEST(sshr, 4s, 4s, 1) 1022 GEN_SHIFT_TEST(sshr, 4s, 4s, 13) 1023 GEN_SHIFT_TEST(sshr, 4s, 4s, 32) 1024 GEN_SHIFT_TEST(shl, 4s, 4s, 0) 1025 GEN_SHIFT_TEST(shl, 4s, 4s, 13) 1026 GEN_SHIFT_TEST(shl, 4s, 4s, 31) 1027 1028 GEN_SHIFT_TEST(ushr, 2s, 2s, 1) 1029 GEN_SHIFT_TEST(ushr, 2s, 2s, 13) 1030 GEN_SHIFT_TEST(ushr, 2s, 2s, 32) 1031 GEN_SHIFT_TEST(sshr, 2s, 2s, 1) 1032 GEN_SHIFT_TEST(sshr, 2s, 2s, 13) 1033 GEN_SHIFT_TEST(sshr, 2s, 2s, 32) 1034 GEN_SHIFT_TEST(shl, 2s, 2s, 0) 1035 GEN_SHIFT_TEST(shl, 2s, 2s, 13) 1036 GEN_SHIFT_TEST(shl, 2s, 2s, 31) 1037 1038 GEN_SHIFT_TEST(ushr, 8h, 8h, 1) 1039 GEN_SHIFT_TEST(ushr, 8h, 8h, 13) 1040 GEN_SHIFT_TEST(ushr, 8h, 8h, 16) 1041 GEN_SHIFT_TEST(sshr, 8h, 8h, 1) 1042 GEN_SHIFT_TEST(sshr, 8h, 8h, 13) 1043 GEN_SHIFT_TEST(sshr, 8h, 8h, 16) 1044 GEN_SHIFT_TEST(shl, 8h, 8h, 0) 1045 GEN_SHIFT_TEST(shl, 8h, 8h, 13) 1046 GEN_SHIFT_TEST(shl, 8h, 8h, 15) 1047 1048 GEN_SHIFT_TEST(ushr, 4h, 4h, 1) 1049 GEN_SHIFT_TEST(ushr, 4h, 4h, 13) 1050 GEN_SHIFT_TEST(ushr, 4h, 4h, 16) 1051 GEN_SHIFT_TEST(sshr, 4h, 4h, 1) 1052 GEN_SHIFT_TEST(sshr, 4h, 4h, 13) 1053 GEN_SHIFT_TEST(sshr, 4h, 4h, 16) 1054 GEN_SHIFT_TEST(shl, 4h, 4h, 0) 1055 GEN_SHIFT_TEST(shl, 4h, 4h, 13) 1056 GEN_SHIFT_TEST(shl, 4h, 4h, 15) 1057 1058 GEN_SHIFT_TEST(ushr, 16b, 16b, 1) 1059 GEN_SHIFT_TEST(ushr, 16b, 16b, 8) 1060 GEN_SHIFT_TEST(sshr, 16b, 16b, 1) 1061 GEN_SHIFT_TEST(sshr, 16b, 16b, 8) 1062 GEN_SHIFT_TEST(shl, 16b, 16b, 0) 1063 GEN_SHIFT_TEST(shl, 16b, 16b, 7) 1064 1065 GEN_SHIFT_TEST(ushr, 8b, 8b, 1) 1066 GEN_SHIFT_TEST(ushr, 8b, 8b, 8) 1067 GEN_SHIFT_TEST(sshr, 8b, 8b, 1) 1068 GEN_SHIFT_TEST(sshr, 8b, 8b, 8) 1069 GEN_SHIFT_TEST(shl, 8b, 8b, 0) 1070 GEN_SHIFT_TEST(shl, 8b, 8b, 7) 1071 1072 GEN_SHIFT_TEST(ushll, 2d, 2s, 0) 1073 GEN_SHIFT_TEST(ushll, 2d, 2s, 15) 1074 GEN_SHIFT_TEST(ushll, 2d, 2s, 31) 1075 GEN_SHIFT_TEST(ushll2, 2d, 4s, 0) 1076 GEN_SHIFT_TEST(ushll2, 2d, 4s, 15) 1077 GEN_SHIFT_TEST(ushll2, 2d, 4s, 31) 1078 GEN_SHIFT_TEST(ushll, 4s, 4h, 0) 1079 GEN_SHIFT_TEST(ushll, 4s, 4h, 7) 1080 GEN_SHIFT_TEST(ushll, 4s, 4h, 15) 1081 GEN_SHIFT_TEST(ushll2, 4s, 8h, 0) 1082 GEN_SHIFT_TEST(ushll2, 4s, 8h, 7) 1083 GEN_SHIFT_TEST(ushll2, 4s, 8h, 15) 1084 GEN_SHIFT_TEST(ushll, 8h, 8b, 0) 1085 GEN_SHIFT_TEST(ushll, 8h, 8b, 3) 1086 GEN_SHIFT_TEST(ushll, 8h, 8b, 7) 1087 GEN_SHIFT_TEST(ushll2, 8h, 16b, 0) 1088 GEN_SHIFT_TEST(ushll2, 8h, 16b, 3) 1089 GEN_SHIFT_TEST(ushll2, 8h, 16b, 7) 1090 1091 GEN_SHIFT_TEST(sshll, 2d, 2s, 0) 1092 GEN_SHIFT_TEST(sshll, 2d, 2s, 15) 1093 GEN_SHIFT_TEST(sshll, 2d, 2s, 31) 1094 GEN_SHIFT_TEST(sshll2, 2d, 4s, 0) 1095 GEN_SHIFT_TEST(sshll2, 2d, 4s, 15) 1096 GEN_SHIFT_TEST(sshll2, 2d, 4s, 31) 1097 GEN_SHIFT_TEST(sshll, 4s, 4h, 0) 1098 GEN_SHIFT_TEST(sshll, 4s, 4h, 7) 1099 GEN_SHIFT_TEST(sshll, 4s, 4h, 15) 1100 GEN_SHIFT_TEST(sshll2, 4s, 8h, 0) 1101 GEN_SHIFT_TEST(sshll2, 4s, 8h, 7) 1102 GEN_SHIFT_TEST(sshll2, 4s, 8h, 15) 1103 GEN_SHIFT_TEST(sshll, 8h, 8b, 0) 1104 GEN_SHIFT_TEST(sshll, 8h, 8b, 3) 1105 GEN_SHIFT_TEST(sshll, 8h, 8b, 7) 1106 GEN_SHIFT_TEST(sshll2, 8h, 16b, 0) 1107 GEN_SHIFT_TEST(sshll2, 8h, 16b, 3) 1108 GEN_SHIFT_TEST(sshll2, 8h, 16b, 7) 1109 1110 1111 GEN_UNARY_TEST(xtn, 2s, 2d) 1112 GEN_UNARY_TEST(xtn2, 4s, 2d) 1113 GEN_UNARY_TEST(xtn, 4h, 4s) 1114 GEN_UNARY_TEST(xtn2, 8h, 4s) 1115 GEN_UNARY_TEST(xtn, 8b, 8h) 1116 GEN_UNARY_TEST(xtn2, 16b, 8h) 1117 1118 GEN_ONEINT_ONEVEC_TEST(umov_x_d0, "umov x9, v10.d[0]", 9, 10) 1119 GEN_ONEINT_ONEVEC_TEST(umov_x_d1, "umov x9, v10.d[1]", 9, 10) 1120 GEN_ONEINT_ONEVEC_TEST(umov_w_s0, "umov w9, v10.s[0]", 9, 10) 1121 GEN_ONEINT_ONEVEC_TEST(umov_w_s3, "umov w9, v10.s[3]", 9, 10) 1122 GEN_ONEINT_ONEVEC_TEST(umov_w_h0, "umov w9, v10.h[0]", 9, 10) 1123 GEN_ONEINT_ONEVEC_TEST(umov_w_h7, "umov w9, v10.h[7]", 9, 10) 1124 GEN_ONEINT_ONEVEC_TEST(umov_w_b0, "umov w9, v10.b[0]", 9, 10) 1125 GEN_ONEINT_ONEVEC_TEST(umov_w_b15, "umov w9, v10.b[15]", 9, 10) 1126 1127 GEN_ONEINT_ONEVEC_TEST(smov_x_s0, "smov x9, v10.s[0]", 9, 10) 1128 GEN_ONEINT_ONEVEC_TEST(smov_x_s3, "smov x9, v10.s[3]", 9, 10) 1129 GEN_ONEINT_ONEVEC_TEST(smov_x_h0, "smov x9, v10.h[0]", 9, 10) 1130 GEN_ONEINT_ONEVEC_TEST(smov_x_h7, "smov x9, v10.h[7]", 9, 10) 1131 GEN_ONEINT_ONEVEC_TEST(smov_w_h0, "smov w9, v10.h[0]", 9, 10) 1132 GEN_ONEINT_ONEVEC_TEST(smov_w_h7, "smov w9, v10.h[7]", 9, 10) 1133 GEN_ONEINT_ONEVEC_TEST(smov_x_b0, "smov x9, v10.b[0]", 9, 10) 1134 GEN_ONEINT_ONEVEC_TEST(smov_x_b15, "smov x9, v10.b[15]", 9, 10) 1135 GEN_ONEINT_ONEVEC_TEST(smov_w_b0, "smov w9, v10.b[0]", 9, 10) 1136 GEN_ONEINT_ONEVEC_TEST(smov_w_b15, "smov w9, v10.b[15]", 9, 10) 1137 1138 GEN_TWOVEC_TEST(fcvtn_2s_2d, "fcvtn v22.2s, v23.2d", 22, 23) 1139 GEN_TWOVEC_TEST(fcvtn_4s_2d, "fcvtn2 v22.4s, v23.2d", 22, 23) 1140 1141 GEN_UNARY_TEST(neg, 2d, 2d) 1142 GEN_UNARY_TEST(neg, 4s, 4s) 1143 GEN_UNARY_TEST(neg, 2s, 2s) 1144 GEN_UNARY_TEST(neg, 8h, 8h) 1145 GEN_UNARY_TEST(neg, 4h, 4h) 1146 GEN_UNARY_TEST(neg, 16b, 16b) 1147 GEN_UNARY_TEST(neg, 8b, 8b) 1148 1149 GEN_BINARY_TEST(fadd, 2d, 2d, 2d) 1150 GEN_BINARY_TEST(fadd, 4s, 4s, 4s) 1151 GEN_BINARY_TEST(fadd, 2s, 2s, 2s) 1152 GEN_BINARY_TEST(fsub, 2d, 2d, 2d) 1153 GEN_BINARY_TEST(fsub, 4s, 4s, 4s) 1154 GEN_BINARY_TEST(fsub, 2s, 2s, 2s) 1155 GEN_BINARY_TEST(fmul, 2d, 2d, 2d) 1156 GEN_BINARY_TEST(fmul, 4s, 4s, 4s) 1157 GEN_BINARY_TEST(fmul, 2s, 2s, 2s) 1158 GEN_BINARY_TEST(fdiv, 2d, 2d, 2d) 1159 GEN_BINARY_TEST(fdiv, 4s, 4s, 4s) 1160 GEN_BINARY_TEST(fdiv, 2s, 2s, 2s) 1161 GEN_BINARY_TEST(fmla, 2d, 2d, 2d) 1162 GEN_BINARY_TEST(fmla, 4s, 4s, 4s) 1163 GEN_BINARY_TEST(fmla, 2s, 2s, 2s) 1164 GEN_BINARY_TEST(fmls, 2d, 2d, 2d) 1165 GEN_BINARY_TEST(fmls, 4s, 4s, 4s) 1166 GEN_BINARY_TEST(fmls, 2s, 2s, 2s) 1167 GEN_BINARY_TEST(fabd, 2d, 2d, 2d) 1168 GEN_BINARY_TEST(fabd, 4s, 4s, 4s) 1169 GEN_BINARY_TEST(fabd, 2s, 2s, 2s) 1170 1171 GEN_THREEVEC_TEST(add_d_d_d, "add d21, d22, d23", 21, 22, 23) 1172 GEN_THREEVEC_TEST(sub_d_d_d, "sub d21, d22, d23", 21, 22, 23) 1173 1174 /* overkill -- don't need two vecs, only one */ 1175 GEN_TWOVEC_TEST(fmov_d_imm_01, "fmov d22, #0.125", 22, 23) 1176 GEN_TWOVEC_TEST(fmov_d_imm_02, "fmov d22, #-4.0", 22, 23) 1177 GEN_TWOVEC_TEST(fmov_d_imm_03, "fmov d22, #1.0", 22, 23) 1178 GEN_TWOVEC_TEST(fmov_s_imm_01, "fmov s22, #0.125", 22, 23) 1179 GEN_TWOVEC_TEST(fmov_s_imm_02, "fmov s22, #-4.0", 22, 23) 1180 GEN_TWOVEC_TEST(fmov_s_imm_03, "fmov s22, #-1.0", 22, 23) 1181 1182 GEN_ONEINT_ONEVEC_TEST(fmov_s_w, "fmov s7, w15", 15, 7) 1183 GEN_ONEINT_ONEVEC_TEST(fmov_d_x, "fmov d7, x15", 15, 7) 1184 GEN_ONEINT_ONEVEC_TEST(fmov_d1_x, "fmov v7.d[1], x15", 15, 7) 1185 GEN_ONEINT_ONEVEC_TEST(fmov_w_s, "fmov w15, s7", 15, 7) 1186 GEN_ONEINT_ONEVEC_TEST(fmov_x_d, "fmov x15, d7", 15, 7) 1187 GEN_ONEINT_ONEVEC_TEST(fmov_x_d1, "fmov x15, v7.d[1]", 15, 7) 1188 1189 GEN_TWOVEC_TEST(fmov_2d_imm_01, "fmov v22.2d, #0.125", 22, 23) 1190 GEN_TWOVEC_TEST(fmov_2d_imm_02, "fmov v22.2d, #-4.0", 22, 23) 1191 GEN_TWOVEC_TEST(fmov_2d_imm_03, "fmov v22.2d, #1.0", 22, 23) 1192 GEN_TWOVEC_TEST(fmov_4s_imm_01, "fmov v22.4s, #0.125", 22, 23) 1193 GEN_TWOVEC_TEST(fmov_4s_imm_02, "fmov v22.4s, #-4.0", 22, 23) 1194 GEN_TWOVEC_TEST(fmov_4s_imm_03, "fmov v22.4s, #1.0", 22, 23) 1195 GEN_TWOVEC_TEST(fmov_2s_imm_01, "fmov v22.2s, #0.125", 22, 23) 1196 GEN_TWOVEC_TEST(fmov_2s_imm_02, "fmov v22.2s, #-4.0", 22, 23) 1197 GEN_TWOVEC_TEST(fmov_2s_imm_03, "fmov v22.2s, #1.0", 22, 23) 1198 1199 GEN_TWOVEC_TEST(scvtf_s_s, "scvtf s7, s8", 7, 8) 1200 GEN_TWOVEC_TEST(scvtf_d_d, "scvtf d7, d8", 7, 8) 1201 GEN_TWOVEC_TEST(ucvtf_s_s, "ucvtf s7, s8", 7, 8) 1202 GEN_TWOVEC_TEST(ucvtf_d_d, "ucvtf d7, d8", 7, 8) 1203 1204 GEN_ONEINT_ONEVEC_TEST(scvtf_s_w, "scvtf s7, w15", 15, 7) 1205 GEN_ONEINT_ONEVEC_TEST(scvtf_d_w, "scvtf d7, w15", 15, 7) 1206 GEN_ONEINT_ONEVEC_TEST(scvtf_s_x, "scvtf s7, x15", 15, 7) 1207 GEN_ONEINT_ONEVEC_TEST(scvtf_d_x, "scvtf d7, x15", 15, 7) 1208 GEN_ONEINT_ONEVEC_TEST(ucvtf_s_w, "ucvtf s7, w15", 15, 7) 1209 GEN_ONEINT_ONEVEC_TEST(ucvtf_d_w, "ucvtf d7, w15", 15, 7) 1210 GEN_ONEINT_ONEVEC_TEST(ucvtf_s_x, "ucvtf s7, x15", 15, 7) 1211 GEN_ONEINT_ONEVEC_TEST(ucvtf_d_x, "ucvtf d7, x15", 15, 7) 1212 1213 GEN_THREEVEC_TEST(fadd_d_d_d, "fadd d2, d11, d29", 2, 11, 29) 1214 GEN_THREEVEC_TEST(fadd_s_s_s, "fadd s2, s11, s29", 2, 11, 29) 1215 GEN_THREEVEC_TEST(fsub_d_d_d, "fsub d2, d11, d29", 2, 11, 29) 1216 GEN_THREEVEC_TEST(fsub_s_s_s, "fsub s2, s11, s29", 2, 11, 29) 1217 GEN_THREEVEC_TEST(fmul_d_d_d, "fmul d2, d11, d29", 2, 11, 29) 1218 GEN_THREEVEC_TEST(fmul_s_s_s, "fmul s2, s11, s29", 2, 11, 29) 1219 GEN_THREEVEC_TEST(fdiv_d_d_d, "fdiv d2, d11, d29", 2, 11, 29) 1220 GEN_THREEVEC_TEST(fdiv_s_s_s, "fdiv s2, s11, s29", 2, 11, 29) 1221 GEN_THREEVEC_TEST(fnmul_d_d_d, "fnmul d2, d11, d29", 2, 11, 29) 1222 GEN_THREEVEC_TEST(fnmul_s_s_s, "fnmul s2, s11, s29", 2, 11, 29) 1223 1224 GEN_THREEVEC_TEST(fabd_d_d_d, "fabd d2, d11, d29", 2, 11, 29) 1225 GEN_THREEVEC_TEST(fabd_s_s_s, "fabd s2, s11, s29", 2, 11, 29) 1226 1227 GEN_TWOVEC_TEST(fmov_d_d, "fmov d22, d23", 22, 23) 1228 GEN_TWOVEC_TEST(fmov_s_s, "fmov s22, s23", 22, 23) 1229 GEN_TWOVEC_TEST(fabs_d_d, "fabs d22, d23", 22, 23) 1230 GEN_TWOVEC_TEST(fabs_s_s, "fabs s22, s23", 22, 23) 1231 GEN_TWOVEC_TEST(fneg_d_d, "fneg d22, d23", 22, 23) 1232 GEN_TWOVEC_TEST(fneg_s_s, "fneg s22, s23", 22, 23) 1233 GEN_TWOVEC_TEST(fsqrt_d_d, "fsqrt d22, d23", 22, 23) 1234 GEN_TWOVEC_TEST(fsqrt_s_s, "fsqrt s22, s23", 22, 23) 1235 1236 GEN_UNARY_TEST(fneg, 2d, 2d) 1237 GEN_UNARY_TEST(fneg, 4s, 4s) 1238 GEN_UNARY_TEST(fneg, 2s, 2s) 1239 GEN_UNARY_TEST(fabs, 2d, 2d) 1240 GEN_UNARY_TEST(fabs, 4s, 4s) 1241 GEN_UNARY_TEST(fabs, 2s, 2s) 1242 1243 GEN_BINARY_TEST(fcmeq, 2d, 2d, 2d) 1244 GEN_BINARY_TEST(fcmeq, 4s, 4s, 4s) 1245 GEN_BINARY_TEST(fcmeq, 2s, 2s, 2s) 1246 GEN_BINARY_TEST(fcmge, 2d, 2d, 2d) 1247 GEN_BINARY_TEST(fcmge, 4s, 4s, 4s) 1248 GEN_BINARY_TEST(fcmge, 2s, 2s, 2s) 1249 GEN_BINARY_TEST(fcmgt, 2d, 2d, 2d) 1250 GEN_BINARY_TEST(fcmgt, 4s, 4s, 4s) 1251 GEN_BINARY_TEST(fcmgt, 2s, 2s, 2s) 1252 GEN_BINARY_TEST(facge, 2d, 2d, 2d) 1253 GEN_BINARY_TEST(facge, 4s, 4s, 4s) 1254 GEN_BINARY_TEST(facge, 2s, 2s, 2s) 1255 GEN_BINARY_TEST(facgt, 2d, 2d, 2d) 1256 GEN_BINARY_TEST(facgt, 4s, 4s, 4s) 1257 GEN_BINARY_TEST(facgt, 2s, 2s, 2s) 1258 1259 // Uses v15 as the first table entry 1260 GEN_THREEVEC_TEST( 1261 tbl_16b_1reg, "tbl v21.16b, {v15.16b}, v23.16b", 21, 15, 23) 1262 // and v15 ^ v21 as the second table entry 1263 GEN_THREEVEC_TEST( 1264 tbl_16b_2reg, "eor v16.16b, v15.16b, v21.16b ; " 1265 "tbl v21.16b, {v15.16b, v16.16b}, v23.16b", 21, 15, 23) 1266 // and v15 ^ v23 as the third table entry 1267 GEN_THREEVEC_TEST( 1268 tbl_16b_3reg, "eor v16.16b, v15.16b, v21.16b ; " 1269 "eor v17.16b, v15.16b, v23.16b ; " 1270 "tbl v21.16b, {v15.16b, v16.16b, v17.16b}, v23.16b", 1271 21, 15, 23) 1272 // and v21 ^ v23 as the fourth table entry 1273 GEN_THREEVEC_TEST( 1274 tbl_16b_4reg, "eor v16.16b, v15.16b, v21.16b ; " 1275 "eor v17.16b, v15.16b, v23.16b ; " 1276 "eor v18.16b, v21.16b, v23.16b ; " 1277 "tbl v21.16b, {v15.16b, v16.16b, v17.16b, v18.16b}, v23.16b", 1278 21, 15, 23) 1279 1280 // Same register scheme for tbl .8b, tbx .16b, tbx.8b 1281 GEN_THREEVEC_TEST( 1282 tbl_8b_1reg, "tbl v21.8b, {v15.16b}, v23.8b", 21, 15, 23) 1283 GEN_THREEVEC_TEST( 1284 tbl_8b_2reg, "eor v16.16b, v15.16b, v21.16b ; " 1285 "tbl v21.8b, {v15.16b, v16.16b}, v23.8b", 21, 15, 23) 1286 GEN_THREEVEC_TEST( 1287 tbl_8b_3reg, "eor v16.16b, v15.16b, v21.16b ; " 1288 "eor v17.16b, v15.16b, v23.16b ; " 1289 "tbl v21.8b, {v15.16b, v16.16b, v17.16b}, v23.8b", 1290 21, 15, 23) 1291 GEN_THREEVEC_TEST( 1292 tbl_8b_4reg, "eor v16.16b, v15.16b, v21.16b ; " 1293 "eor v17.16b, v15.16b, v23.16b ; " 1294 "eor v18.16b, v21.16b, v23.16b ; " 1295 "tbl v21.8b, {v15.16b, v16.16b, v17.16b, v18.16b}, v23.8b", 1296 21, 15, 23) 1297 1298 GEN_THREEVEC_TEST( 1299 tbx_16b_1reg, "tbx v21.16b, {v15.16b}, v23.16b", 21, 15, 23) 1300 GEN_THREEVEC_TEST( 1301 tbx_16b_2reg, "eor v16.16b, v15.16b, v21.16b ; " 1302 "tbx v21.16b, {v15.16b, v16.16b}, v23.16b", 21, 15, 23) 1303 GEN_THREEVEC_TEST( 1304 tbx_16b_3reg, "eor v16.16b, v15.16b, v21.16b ; " 1305 "eor v17.16b, v15.16b, v23.16b ; " 1306 "tbx v21.16b, {v15.16b, v16.16b, v17.16b}, v23.16b", 1307 21, 15, 23) 1308 GEN_THREEVEC_TEST( 1309 tbx_16b_4reg, "eor v16.16b, v15.16b, v21.16b ; " 1310 "eor v17.16b, v15.16b, v23.16b ; " 1311 "eor v18.16b, v21.16b, v23.16b ; " 1312 "tbx v21.16b, {v15.16b, v16.16b, v17.16b, v18.16b}, v23.16b", 1313 21, 15, 23) 1314 1315 // Same register scheme for tbx .8b, tbx .16b, tbx.8b 1316 GEN_THREEVEC_TEST( 1317 tbx_8b_1reg, "tbx v21.8b, {v15.16b}, v23.8b", 21, 15, 23) 1318 GEN_THREEVEC_TEST( 1319 tbx_8b_2reg, "eor v16.16b, v15.16b, v21.16b ; " 1320 "tbx v21.8b, {v15.16b, v16.16b}, v23.8b", 21, 15, 23) 1321 GEN_THREEVEC_TEST( 1322 tbx_8b_3reg, "eor v16.16b, v15.16b, v21.16b ; " 1323 "eor v17.16b, v15.16b, v23.16b ; " 1324 "tbx v21.8b, {v15.16b, v16.16b, v17.16b}, v23.8b", 1325 21, 15, 23) 1326 GEN_THREEVEC_TEST( 1327 tbx_8b_4reg, "eor v16.16b, v15.16b, v21.16b ; " 1328 "eor v17.16b, v15.16b, v23.16b ; " 1329 "eor v18.16b, v21.16b, v23.16b ; " 1330 "tbx v21.8b, {v15.16b, v16.16b, v17.16b, v18.16b}, v23.8b", 1331 21, 15, 23) 1332 1333 GEN_TWOVEC_TEST(cmge_zero_2d_2d, "cmge v5.2d, v22.2d, #0", 5, 22) 1334 GEN_TWOVEC_TEST(cmge_zero_4s_4s, "cmge v5.4s, v22.4s, #0", 5, 22) 1335 GEN_TWOVEC_TEST(cmge_zero_2s_2s, "cmge v5.2s, v22.2s, #0", 5, 22) 1336 GEN_TWOVEC_TEST(cmge_zero_8h_8h, "cmge v5.8h, v22.8h, #0", 5, 22) 1337 GEN_TWOVEC_TEST(cmge_zero_4h_4h, "cmge v5.4h, v22.4h, #0", 5, 22) 1338 GEN_TWOVEC_TEST(cmge_zero_16b_16b, "cmge v5.16b, v22.16b, #0", 5, 22) 1339 GEN_TWOVEC_TEST(cmge_zero_8b_8b, "cmge v5.8b, v22.8b, #0", 5, 22) 1340 1341 GEN_TWOVEC_TEST(cmgt_zero_2d_2d, "cmgt v5.2d, v22.2d, #0", 5, 22) 1342 GEN_TWOVEC_TEST(cmgt_zero_4s_4s, "cmgt v5.4s, v22.4s, #0", 5, 22) 1343 GEN_TWOVEC_TEST(cmgt_zero_2s_2s, "cmgt v5.2s, v22.2s, #0", 5, 22) 1344 GEN_TWOVEC_TEST(cmgt_zero_8h_8h, "cmgt v5.8h, v22.8h, #0", 5, 22) 1345 GEN_TWOVEC_TEST(cmgt_zero_4h_4h, "cmgt v5.4h, v22.4h, #0", 5, 22) 1346 GEN_TWOVEC_TEST(cmgt_zero_16b_16b, "cmgt v5.16b, v22.16b, #0", 5, 22) 1347 GEN_TWOVEC_TEST(cmgt_zero_8b_8b, "cmgt v5.8b, v22.8b, #0", 5, 22) 1348 1349 GEN_TWOVEC_TEST(cmle_zero_2d_2d, "cmle v5.2d, v22.2d, #0", 5, 22) 1350 GEN_TWOVEC_TEST(cmle_zero_4s_4s, "cmle v5.4s, v22.4s, #0", 5, 22) 1351 GEN_TWOVEC_TEST(cmle_zero_2s_2s, "cmle v5.2s, v22.2s, #0", 5, 22) 1352 GEN_TWOVEC_TEST(cmle_zero_8h_8h, "cmle v5.8h, v22.8h, #0", 5, 22) 1353 GEN_TWOVEC_TEST(cmle_zero_4h_4h, "cmle v5.4h, v22.4h, #0", 5, 22) 1354 GEN_TWOVEC_TEST(cmle_zero_16b_16b, "cmle v5.16b, v22.16b, #0", 5, 22) 1355 GEN_TWOVEC_TEST(cmle_zero_8b_8b, "cmle v5.8b, v22.8b, #0", 5, 22) 1356 1357 GEN_TWOVEC_TEST(cmeq_zero_2d_2d, "cmeq v5.2d, v22.2d, #0", 5, 22) 1358 GEN_TWOVEC_TEST(cmeq_zero_4s_4s, "cmeq v5.4s, v22.4s, #0", 5, 22) 1359 GEN_TWOVEC_TEST(cmeq_zero_2s_2s, "cmeq v5.2s, v22.2s, #0", 5, 22) 1360 GEN_TWOVEC_TEST(cmeq_zero_8h_8h, "cmeq v5.8h, v22.8h, #0", 5, 22) 1361 GEN_TWOVEC_TEST(cmeq_zero_4h_4h, "cmeq v5.4h, v22.4h, #0", 5, 22) 1362 GEN_TWOVEC_TEST(cmeq_zero_16b_16b, "cmeq v5.16b, v22.16b, #0", 5, 22) 1363 GEN_TWOVEC_TEST(cmeq_zero_8b_8b, "cmeq v5.8b, v22.8b, #0", 5, 22) 1364 1365 GEN_TWOVEC_TEST(cmlt_zero_2d_2d, "cmlt v5.2d, v22.2d, #0", 5, 22) 1366 GEN_TWOVEC_TEST(cmlt_zero_4s_4s, "cmlt v5.4s, v22.4s, #0", 5, 22) 1367 GEN_TWOVEC_TEST(cmlt_zero_2s_2s, "cmlt v5.2s, v22.2s, #0", 5, 22) 1368 GEN_TWOVEC_TEST(cmlt_zero_8h_8h, "cmlt v5.8h, v22.8h, #0", 5, 22) 1369 GEN_TWOVEC_TEST(cmlt_zero_4h_4h, "cmlt v5.4h, v22.4h, #0", 5, 22) 1370 GEN_TWOVEC_TEST(cmlt_zero_16b_16b, "cmlt v5.16b, v22.16b, #0", 5, 22) 1371 GEN_TWOVEC_TEST(cmlt_zero_8b_8b, "cmlt v5.8b, v22.8b, #0", 5, 22) 1372 1373 GEN_TWOVEC_TEST(abs_d_d, "abs d22, d23", 22, 23) 1374 GEN_TWOVEC_TEST(neg_d_d, "neg d22, d23", 22, 23) 1375 1376 GEN_UNARY_TEST(abs, 2d, 2d) 1377 GEN_UNARY_TEST(abs, 4s, 4s) 1378 GEN_UNARY_TEST(abs, 2s, 2s) 1379 GEN_UNARY_TEST(abs, 8h, 8h) 1380 GEN_UNARY_TEST(abs, 4h, 4h) 1381 GEN_UNARY_TEST(abs, 16b, 16b) 1382 GEN_UNARY_TEST(abs, 8b, 8b) 1383 1384 GEN_BINARY_TEST(addhn, 2s, 2d, 2d) 1385 GEN_BINARY_TEST(addhn2, 4s, 2d, 2d) 1386 GEN_BINARY_TEST(addhn, 4h, 4s, 4s) 1387 GEN_BINARY_TEST(addhn2, 8h, 4s, 4s) 1388 GEN_BINARY_TEST(addhn, 8b, 8h, 8h) 1389 GEN_BINARY_TEST(addhn2, 16b, 8h, 8h) 1390 GEN_BINARY_TEST(subhn, 2s, 2d, 2d) 1391 GEN_BINARY_TEST(subhn2, 4s, 2d, 2d) 1392 GEN_BINARY_TEST(subhn, 4h, 4s, 4s) 1393 GEN_BINARY_TEST(subhn2, 8h, 4s, 4s) 1394 GEN_BINARY_TEST(subhn, 8b, 8h, 8h) 1395 GEN_BINARY_TEST(subhn2, 16b, 8h, 8h) 1396 GEN_BINARY_TEST(raddhn, 2s, 2d, 2d) 1397 GEN_BINARY_TEST(raddhn2, 4s, 2d, 2d) 1398 GEN_BINARY_TEST(raddhn, 4h, 4s, 4s) 1399 GEN_BINARY_TEST(raddhn2, 8h, 4s, 4s) 1400 GEN_BINARY_TEST(raddhn, 8b, 8h, 8h) 1401 GEN_BINARY_TEST(raddhn2, 16b, 8h, 8h) 1402 GEN_BINARY_TEST(rsubhn, 2s, 2d, 2d) 1403 GEN_BINARY_TEST(rsubhn2, 4s, 2d, 2d) 1404 GEN_BINARY_TEST(rsubhn, 4h, 4s, 4s) 1405 GEN_BINARY_TEST(rsubhn2, 8h, 4s, 4s) 1406 GEN_BINARY_TEST(rsubhn, 8b, 8h, 8h) 1407 GEN_BINARY_TEST(rsubhn2, 16b, 8h, 8h) 1408 1409 GEN_TWOVEC_TEST(addp_d_2d, "addp d22, v23.2d", 22, 23) 1410 1411 GEN_BINARY_TEST(addp, 2d, 2d, 2d) 1412 GEN_BINARY_TEST(addp, 4s, 4s, 4s) 1413 GEN_BINARY_TEST(addp, 2s, 2s, 2s) 1414 GEN_BINARY_TEST(addp, 8h, 8h, 8h) 1415 GEN_BINARY_TEST(addp, 4h, 4h, 4h) 1416 GEN_BINARY_TEST(addp, 16b, 16b, 16b) 1417 GEN_BINARY_TEST(addp, 8b, 8b, 8b) 1418 1419 GEN_TWOVEC_TEST(addv_s_4s, "addv s22, v23.4s", 22, 23) 1420 GEN_TWOVEC_TEST(addv_h_8h, "addv h22, v23.8h", 22, 23) 1421 GEN_TWOVEC_TEST(addv_h_4h, "addv h22, v23.4h", 22, 23) 1422 GEN_TWOVEC_TEST(addv_b_16b, "addv b22, v23.16b", 22, 23) 1423 GEN_TWOVEC_TEST(addv_b_8b, "addv b22, v23.8b", 22, 23) 1424 1425 /* overkill -- don't need two vecs, only one */ 1426 GEN_TWOVEC_TEST(orr_8h_0x5A_lsl0, "orr v22.8h, #0x5A, LSL #0", 22, 23) 1427 GEN_TWOVEC_TEST(orr_8h_0xA5_lsl8, "orr v22.8h, #0xA5, LSL #8", 22, 23) 1428 GEN_TWOVEC_TEST(orr_4h_0x5A_lsl0, "orr v22.4h, #0x5A, LSL #0", 22, 23) 1429 GEN_TWOVEC_TEST(orr_4h_0xA5_lsl8, "orr v22.4h, #0xA5, LSL #8", 22, 23) 1430 GEN_TWOVEC_TEST(orr_4s_0x5A_lsl0, "orr v22.4s, #0x5A, LSL #0", 22, 23) 1431 GEN_TWOVEC_TEST(orr_4s_0x6B_lsl8, "orr v22.4s, #0x6B, LSL #8", 22, 23) 1432 GEN_TWOVEC_TEST(orr_4s_0x49_lsl16, "orr v22.4s, #0x49, LSL #16", 22, 23) 1433 GEN_TWOVEC_TEST(orr_4s_0x3D_lsl24, "orr v22.4s, #0x3D, LSL #24", 22, 23) 1434 GEN_TWOVEC_TEST(orr_2s_0x5A_lsl0, "orr v22.2s, #0x5A, LSL #0", 22, 23) 1435 GEN_TWOVEC_TEST(orr_2s_0x6B_lsl8, "orr v22.2s, #0x6B, LSL #8", 22, 23) 1436 GEN_TWOVEC_TEST(orr_2s_0x49_lsl16, "orr v22.2s, #0x49, LSL #16", 22, 23) 1437 GEN_TWOVEC_TEST(orr_2s_0x3D_lsl24, "orr v22.2s, #0x3D, LSL #24", 22, 23) 1438 GEN_TWOVEC_TEST(bic_8h_0x5A_lsl0, "bic v22.8h, #0x5A, LSL #0", 22, 23) 1439 GEN_TWOVEC_TEST(bic_8h_0xA5_lsl8, "bic v22.8h, #0xA5, LSL #8", 22, 23) 1440 GEN_TWOVEC_TEST(bic_4h_0x5A_lsl0, "bic v22.4h, #0x5A, LSL #0", 22, 23) 1441 GEN_TWOVEC_TEST(bic_4h_0xA5_lsl8, "bic v22.4h, #0xA5, LSL #8", 22, 23) 1442 GEN_TWOVEC_TEST(bic_4s_0x5A_lsl0, "bic v22.4s, #0x5A, LSL #0", 22, 23) 1443 GEN_TWOVEC_TEST(bic_4s_0x6B_lsl8, "bic v22.4s, #0x6B, LSL #8", 22, 23) 1444 GEN_TWOVEC_TEST(bic_4s_0x49_lsl16, "bic v22.4s, #0x49, LSL #16", 22, 23) 1445 GEN_TWOVEC_TEST(bic_4s_0x3D_lsl24, "bic v22.4s, #0x3D, LSL #24", 22, 23) 1446 GEN_TWOVEC_TEST(bic_2s_0x5A_lsl0, "bic v22.2s, #0x5A, LSL #0", 22, 23) 1447 GEN_TWOVEC_TEST(bic_2s_0x6B_lsl8, "bic v22.2s, #0x6B, LSL #8", 22, 23) 1448 GEN_TWOVEC_TEST(bic_2s_0x49_lsl16, "bic v22.2s, #0x49, LSL #16", 22, 23) 1449 GEN_TWOVEC_TEST(bic_2s_0x3D_lsl24, "bic v22.2s, #0x3D, LSL #24", 22, 23) 1450 1451 GEN_UNARY_TEST(cls, 4s, 4s) 1452 GEN_UNARY_TEST(cls, 2s, 2s) 1453 GEN_UNARY_TEST(cls, 8h, 8h) 1454 GEN_UNARY_TEST(cls, 4h, 4h) 1455 GEN_UNARY_TEST(cls, 16b, 16b) 1456 GEN_UNARY_TEST(cls, 8b, 8b) 1457 1458 GEN_UNARY_TEST(clz, 4s, 4s) 1459 GEN_UNARY_TEST(clz, 2s, 2s) 1460 GEN_UNARY_TEST(clz, 8h, 8h) 1461 GEN_UNARY_TEST(clz, 4h, 4h) 1462 GEN_UNARY_TEST(clz, 16b, 16b) 1463 GEN_UNARY_TEST(clz, 8b, 8b) 1464 1465 GEN_THREEVEC_TEST(cmeq_d_d_d, "cmeq d2, d11, d29", 2, 11, 29) 1466 GEN_THREEVEC_TEST(cmge_d_d_d, "cmge d2, d11, d29", 2, 11, 29) 1467 GEN_THREEVEC_TEST(cmgt_d_d_d, "cmgt d2, d11, d29", 2, 11, 29) 1468 GEN_THREEVEC_TEST(cmhi_d_d_d, "cmhi d2, d11, d29", 2, 11, 29) 1469 GEN_THREEVEC_TEST(cmhs_d_d_d, "cmhs d2, d11, d29", 2, 11, 29) 1470 GEN_THREEVEC_TEST(cmtst_d_d_d, "cmtst d2, d11, d29", 2, 11, 29) 1471 1472 GEN_TWOVEC_TEST(cmeq_zero_d_d, "cmeq d2, d11, #0", 2, 11) 1473 GEN_TWOVEC_TEST(cmge_zero_d_d, "cmge d2, d11, #0", 2, 11) 1474 GEN_TWOVEC_TEST(cmgt_zero_d_d, "cmgt d2, d11, #0", 2, 11) 1475 GEN_TWOVEC_TEST(cmle_zero_d_d, "cmle d2, d11, #0", 2, 11) 1476 GEN_TWOVEC_TEST(cmlt_zero_d_d, "cmlt d2, d11, #0", 2, 11) 1477 1478 GEN_UNARY_TEST(cnt, 16b, 16b) 1479 GEN_UNARY_TEST(cnt, 8b, 8b) 1480 1481 GEN_TWOVEC_TEST(dup_d_d0, "dup d22, v23.d[0]", 22, 23) 1482 GEN_TWOVEC_TEST(dup_d_d1, "dup d22, v23.d[1]", 22, 23) 1483 GEN_TWOVEC_TEST(dup_s_s0, "dup s22, v23.s[0]", 22, 23) 1484 GEN_TWOVEC_TEST(dup_s_s3, "dup s22, v23.s[3]", 22, 23) 1485 GEN_TWOVEC_TEST(dup_h_h0, "dup h22, v23.h[0]", 22, 23) 1486 GEN_TWOVEC_TEST(dup_h_h6, "dup h22, v23.h[6]", 22, 23) 1487 GEN_TWOVEC_TEST(dup_b_b0, "dup b0, v23.b[0]", 22, 23) 1488 GEN_TWOVEC_TEST(dup_b_b13, "dup b13, v23.b[13]", 22, 23) 1489 1490 GEN_TWOVEC_TEST(dup_2d_d0, "dup v9.2d, v17.d[0]", 9, 17) 1491 GEN_TWOVEC_TEST(dup_2d_d1, "dup v9.2d, v17.d[1]", 9, 17) 1492 GEN_TWOVEC_TEST(dup_4s_s0, "dup v9.4s, v17.s[0]", 9, 17) 1493 GEN_TWOVEC_TEST(dup_4s_s3, "dup v9.4s, v17.s[3]", 9, 17) 1494 GEN_TWOVEC_TEST(dup_2s_s0, "dup v9.2s, v17.s[0]", 9, 17) 1495 GEN_TWOVEC_TEST(dup_2s_s2, "dup v9.2s, v17.s[2]", 9, 17) 1496 GEN_TWOVEC_TEST(dup_8h_h0, "dup v9.8h, v17.h[0]", 9, 17) 1497 GEN_TWOVEC_TEST(dup_8h_h6, "dup v9.8h, v17.h[6]", 9, 17) 1498 GEN_TWOVEC_TEST(dup_4h_h1, "dup v9.4h, v17.h[1]", 9, 17) 1499 GEN_TWOVEC_TEST(dup_4h_h5, "dup v9.4h, v17.h[5]", 9, 17) 1500 GEN_TWOVEC_TEST(dup_16b_b2, "dup v9.16b, v17.b[2]", 9, 17) 1501 GEN_TWOVEC_TEST(dup_16b_b12, "dup v9.16b, v17.b[12]", 9, 17) 1502 GEN_TWOVEC_TEST(dup_8b_b3, "dup v9.8b, v17.b[3]", 9, 17) 1503 GEN_TWOVEC_TEST(dup_8b_b13, "dup v9.8b, v17.b[13]", 9, 17) 1504 1505 GEN_TWOVEC_TEST(dup_2d_x, "mov x10, v17.d[0]; dup v9.2d, x10", 9, 17) 1506 GEN_TWOVEC_TEST(dup_4s_w, "mov x10, v17.d[0]; dup v9.4s, w10", 9, 17) 1507 GEN_TWOVEC_TEST(dup_2s_w, "mov x10, v17.d[0]; dup v9.2s, w10", 9, 17) 1508 GEN_TWOVEC_TEST(dup_8h_w, "mov x10, v17.d[0]; dup v9.8h, w10", 9, 17) 1509 GEN_TWOVEC_TEST(dup_4h_w, "mov x10, v17.d[0]; dup v9.4h, w10", 9, 17) 1510 GEN_TWOVEC_TEST(dup_16b_w, "mov x10, v17.d[0]; dup v9.16b, w10", 9, 17) 1511 GEN_TWOVEC_TEST(dup_8b_w, "mov x10, v17.d[0]; dup v9.8b, w10", 9, 17) 1512 1513 GEN_THREEVEC_TEST(ext_16b_16b_16b_0x0, 1514 "ext v2.16b, v11.16b, v29.16b, #0", 2, 11, 29) 1515 GEN_THREEVEC_TEST(ext_16b_16b_16b_0x7, 1516 "ext v2.16b, v11.16b, v29.16b, #7", 2, 11, 29) 1517 GEN_THREEVEC_TEST(ext_16b_16b_16b_0x8, 1518 "ext v2.16b, v11.16b, v29.16b, #8", 2, 11, 29) 1519 GEN_THREEVEC_TEST(ext_16b_16b_16b_0x9, 1520 "ext v2.16b, v11.16b, v29.16b, #9", 2, 11, 29) 1521 GEN_THREEVEC_TEST(ext_16b_16b_16b_0xF, 1522 "ext v2.16b, v11.16b, v29.16b, #15", 2, 11, 29) 1523 1524 GEN_THREEVEC_TEST(ext_8b_8b_8b_0x0, 1525 "ext v2.8b, v11.8b, v29.8b, #0", 2, 11, 29) 1526 GEN_THREEVEC_TEST(ext_8b_8b_8b_0x1, 1527 "ext v2.8b, v11.8b, v29.8b, #1", 2, 11, 29) 1528 GEN_THREEVEC_TEST(ext_8b_8b_8b_0x6, 1529 "ext v2.8b, v11.8b, v29.8b, #6", 2, 11, 29) 1530 GEN_THREEVEC_TEST(ext_8b_8b_8b_0x7, 1531 "ext v2.8b, v11.8b, v29.8b, #7", 2, 11, 29) 1532 1533 1534 GEN_TWOVEC_TEST(ins_d0_d0, "ins v3.d[0], v24.d[0]", 3, 24) 1535 GEN_TWOVEC_TEST(ins_d0_d1, "ins v3.d[0], v24.d[1]", 3, 24) 1536 GEN_TWOVEC_TEST(ins_d1_d0, "ins v3.d[1], v24.d[0]", 3, 24) 1537 GEN_TWOVEC_TEST(ins_d1_d1, "ins v3.d[1], v24.d[1]", 3, 24) 1538 1539 GEN_TWOVEC_TEST(ins_s0_s2, "ins v3.s[0], v24.s[2]", 3, 24) 1540 GEN_TWOVEC_TEST(ins_s3_s0, "ins v3.s[3], v24.s[0]", 3, 24) 1541 GEN_TWOVEC_TEST(ins_s2_s1, "ins v3.s[2], v24.s[1]", 3, 24) 1542 GEN_TWOVEC_TEST(ins_s1_s3, "ins v3.s[1], v24.s[3]", 3, 24) 1543 1544 GEN_TWOVEC_TEST(ins_h0_h6, "ins v3.h[0], v24.h[6]", 3, 24) 1545 GEN_TWOVEC_TEST(ins_h7_h0, "ins v3.h[7], v24.h[0]", 3, 24) 1546 GEN_TWOVEC_TEST(ins_h6_h1, "ins v3.h[6], v24.h[1]", 3, 24) 1547 GEN_TWOVEC_TEST(ins_h1_h7, "ins v3.h[1], v24.h[7]", 3, 24) 1548 1549 GEN_TWOVEC_TEST(ins_b0_b14, "ins v3.b[0], v24.b[14]", 3, 24) 1550 GEN_TWOVEC_TEST(ins_b15_b8, "ins v3.b[15], v24.b[8]", 3, 24) 1551 GEN_TWOVEC_TEST(ins_b13_b9, "ins v3.b[13], v24.b[9]", 3, 24) 1552 GEN_TWOVEC_TEST(ins_b5_b12, "ins v3.b[5], v24.b[12]", 3, 24) 1553 1554 GEN_THREEVEC_TEST(mla_4s_4s_s0, "mla v2.4s, v11.4s, v29.s[0]", 2, 11, 29) 1555 GEN_THREEVEC_TEST(mla_4s_4s_s3, "mla v2.4s, v11.4s, v29.s[3]", 2, 11, 29) 1556 GEN_THREEVEC_TEST(mla_2s_2s_s0, "mla v2.2s, v11.2s, v29.s[0]", 2, 11, 29) 1557 GEN_THREEVEC_TEST(mla_2s_2s_s3, "mla v2.2s, v11.2s, v29.s[3]", 2, 11, 29) 1558 // For the 'h' version of these, Rm can only be <= 15 (!) 1559 GEN_THREEVEC_TEST(mla_8h_8h_h1, "mla v2.8h, v11.8h, v2.h[1]", 2, 11, 9) 1560 GEN_THREEVEC_TEST(mla_8h_8h_h5, "mla v2.8h, v11.8h, v2.h[5]", 2, 11, 9) 1561 GEN_THREEVEC_TEST(mla_4h_4h_h2, "mla v2.4h, v11.4h, v2.h[2]", 2, 11, 9) 1562 GEN_THREEVEC_TEST(mla_4h_4h_h7, "mla v2.4h, v11.4h, v2.h[7]", 2, 11, 9) 1563 1564 GEN_THREEVEC_TEST(mls_4s_4s_s0, "mls v2.4s, v11.4s, v29.s[0]", 2, 11, 29) 1565 GEN_THREEVEC_TEST(mls_4s_4s_s3, "mls v2.4s, v11.4s, v29.s[3]", 2, 11, 29) 1566 GEN_THREEVEC_TEST(mls_2s_2s_s0, "mls v2.2s, v11.2s, v29.s[0]", 2, 11, 29) 1567 GEN_THREEVEC_TEST(mls_2s_2s_s3, "mls v2.2s, v11.2s, v29.s[3]", 2, 11, 29) 1568 // For the 'h' version of these, Rm can only be <= 15 (!) 1569 GEN_THREEVEC_TEST(mls_8h_8h_h1, "mls v2.8h, v11.8h, v2.h[1]", 2, 11, 9) 1570 GEN_THREEVEC_TEST(mls_8h_8h_h5, "mls v2.8h, v11.8h, v2.h[5]", 2, 11, 9) 1571 GEN_THREEVEC_TEST(mls_4h_4h_h2, "mls v2.4h, v11.4h, v2.h[2]", 2, 11, 9) 1572 GEN_THREEVEC_TEST(mls_4h_4h_h7, "mls v2.4h, v11.4h, v2.h[7]", 2, 11, 9) 1573 1574 GEN_THREEVEC_TEST(mul_4s_4s_s0, "mul v2.4s, v11.4s, v29.s[0]", 2, 11, 29) 1575 GEN_THREEVEC_TEST(mul_4s_4s_s3, "mul v2.4s, v11.4s, v29.s[3]", 2, 11, 29) 1576 GEN_THREEVEC_TEST(mul_2s_2s_s0, "mul v2.2s, v11.2s, v29.s[0]", 2, 11, 29) 1577 GEN_THREEVEC_TEST(mul_2s_2s_s3, "mul v2.2s, v11.2s, v29.s[3]", 2, 11, 29) 1578 // For the 'h' version of these, Rm can only be <= 15 (!) 1579 GEN_THREEVEC_TEST(mul_8h_8h_h1, "mul v2.8h, v11.8h, v2.h[1]", 2, 11, 9) 1580 GEN_THREEVEC_TEST(mul_8h_8h_h5, "mul v2.8h, v11.8h, v2.h[5]", 2, 11, 9) 1581 GEN_THREEVEC_TEST(mul_4h_4h_h2, "mul v2.4h, v11.4h, v2.h[2]", 2, 11, 9) 1582 GEN_THREEVEC_TEST(mul_4h_4h_h7, "mul v2.4h, v11.4h, v2.h[7]", 2, 11, 9) 1583 1584 /* overkill -- don't need two vecs, only one */ 1585 GEN_TWOVEC_TEST(movi_16b_0x9C_lsl0, "movi v22.16b, #0x9C, LSL #0", 22, 23) 1586 GEN_TWOVEC_TEST(movi_8b_0x8B_lsl0, "movi v22.8b, #0x8B, LSL #0", 22, 23) 1587 GEN_TWOVEC_TEST(movi_8h_0x5A_lsl0, "movi v22.8h, #0x5A, LSL #0", 22, 23) 1588 GEN_TWOVEC_TEST(movi_8h_0xA5_lsl8, "movi v22.8h, #0xA5, LSL #8", 22, 23) 1589 GEN_TWOVEC_TEST(movi_4h_0x5A_lsl0, "movi v22.4h, #0x5A, LSL #0", 22, 23) 1590 GEN_TWOVEC_TEST(movi_4h_0xA5_lsl8, "movi v22.4h, #0xA5, LSL #8", 22, 23) 1591 GEN_TWOVEC_TEST(movi_4s_0x5A_lsl0, "movi v22.4s, #0x5A, LSL #0", 22, 23) 1592 GEN_TWOVEC_TEST(movi_4s_0x6B_lsl8, "movi v22.4s, #0x6B, LSL #8", 22, 23) 1593 GEN_TWOVEC_TEST(movi_4s_0x49_lsl16, "movi v22.4s, #0x49, LSL #16", 22, 23) 1594 GEN_TWOVEC_TEST(movi_4s_0x3D_lsl24, "movi v22.4s, #0x3D, LSL #24", 22, 23) 1595 GEN_TWOVEC_TEST(movi_2s_0x5A_lsl0, "movi v22.2s, #0x5A, LSL #0", 22, 23) 1596 GEN_TWOVEC_TEST(movi_2s_0x6B_lsl8, "movi v22.2s, #0x6B, LSL #8", 22, 23) 1597 GEN_TWOVEC_TEST(movi_2s_0x49_lsl16, "movi v22.2s, #0x49, LSL #16", 22, 23) 1598 GEN_TWOVEC_TEST(movi_2s_0x3D_lsl24, "movi v22.2s, #0x3D, LSL #24", 22, 23) 1599 GEN_TWOVEC_TEST(movi_4s_0x6B_msl8, "movi v22.4s, #0x6B, MSL #8", 22, 23) 1600 GEN_TWOVEC_TEST(movi_4s_0x94_msl16, "movi v22.4s, #0x94, MSL #16", 22, 23) 1601 GEN_TWOVEC_TEST(movi_2s_0x7A_msl8, "movi v22.2s, #0x7A, MSL #8", 22, 23) 1602 GEN_TWOVEC_TEST(movi_2s_0xA5_msl16, "movi v22.2s, #0xA5, MSL #16", 22, 23) 1603 1604 GEN_TWOVEC_TEST(movi_d_0xA5, "movi d22, #0xFF00FF0000FF00FF", 22, 23) 1605 GEN_TWOVEC_TEST(movi_2d_0xB4, "movi v22.2d, #0xFF00FFFF00FF0000", 22, 23) 1606 1607 /* overkill -- don't need two vecs, only one */ 1608 GEN_TWOVEC_TEST(mvni_8h_0x5A_lsl0, "mvni v22.8h, #0x5A, LSL #0", 22, 23) 1609 GEN_TWOVEC_TEST(mvni_8h_0xA5_lsl8, "mvni v22.8h, #0xA5, LSL #8", 22, 23) 1610 GEN_TWOVEC_TEST(mvni_4h_0x5A_lsl0, "mvni v22.4h, #0x5A, LSL #0", 22, 23) 1611 GEN_TWOVEC_TEST(mvni_4h_0xA5_lsl8, "mvni v22.4h, #0xA5, LSL #8", 22, 23) 1612 GEN_TWOVEC_TEST(mvni_4s_0x5A_lsl0, "mvni v22.4s, #0x5A, LSL #0", 22, 23) 1613 GEN_TWOVEC_TEST(mvni_4s_0x6B_lsl8, "mvni v22.4s, #0x6B, LSL #8", 22, 23) 1614 GEN_TWOVEC_TEST(mvni_4s_0x49_lsl16, "mvni v22.4s, #0x49, LSL #16", 22, 23) 1615 GEN_TWOVEC_TEST(mvni_4s_0x3D_lsl24, "mvni v22.4s, #0x3D, LSL #24", 22, 23) 1616 GEN_TWOVEC_TEST(mvni_2s_0x5A_lsl0, "mvni v22.2s, #0x5A, LSL #0", 22, 23) 1617 GEN_TWOVEC_TEST(mvni_2s_0x6B_lsl8, "mvni v22.2s, #0x6B, LSL #8", 22, 23) 1618 GEN_TWOVEC_TEST(mvni_2s_0x49_lsl16, "mvni v22.2s, #0x49, LSL #16", 22, 23) 1619 GEN_TWOVEC_TEST(mvni_2s_0x3D_lsl24, "mvni v22.2s, #0x3D, LSL #24", 22, 23) 1620 GEN_TWOVEC_TEST(mvni_4s_0x6B_msl8, "mvni v22.4s, #0x6B, MSL #8", 22, 23) 1621 GEN_TWOVEC_TEST(mvni_4s_0x94_msl16, "mvni v22.4s, #0x94, MSL #16", 22, 23) 1622 GEN_TWOVEC_TEST(mvni_2s_0x7A_msl8, "mvni v22.2s, #0x7A, MSL #8", 22, 23) 1623 GEN_TWOVEC_TEST(mvni_2s_0xA5_msl16, "mvni v22.2s, #0xA5, MSL #16", 22, 23) 1624 1625 GEN_UNARY_TEST(not, 16b, 16b) 1626 GEN_UNARY_TEST(not, 8b, 8b) 1627 1628 GEN_BINARY_TEST(pmul, 16b, 16b, 16b) 1629 GEN_BINARY_TEST(pmul, 8b, 8b, 8b) 1630 1631 GEN_BINARY_TEST(pmull, 8h, 8b, 8b) 1632 GEN_BINARY_TEST(pmull2, 8h, 16b, 16b) 1633 //GEN_BINARY_TEST(pmull, 1q, 1d, 1d) 1634 //GEN_BINARY_TEST(pmull, 1q, 2d, 2d) 1635 1636 GEN_UNARY_TEST(rbit, 16b, 16b) 1637 GEN_UNARY_TEST(rbit, 8b, 8b) 1638 GEN_UNARY_TEST(rev16, 16b, 16b) 1639 GEN_UNARY_TEST(rev16, 8b, 8b) 1640 GEN_UNARY_TEST(rev32, 16b, 16b) 1641 GEN_UNARY_TEST(rev32, 8b, 8b) 1642 GEN_UNARY_TEST(rev32, 8h, 8h) 1643 GEN_UNARY_TEST(rev32, 4h, 4h) 1644 GEN_UNARY_TEST(rev64, 16b, 16b) 1645 GEN_UNARY_TEST(rev64, 8b, 8b) 1646 GEN_UNARY_TEST(rev64, 8h, 8h) 1647 GEN_UNARY_TEST(rev64, 4h, 4h) 1648 GEN_UNARY_TEST(rev64, 4s, 4s) 1649 GEN_UNARY_TEST(rev64, 2s, 2s) 1650 1651 GEN_BINARY_TEST(saba, 4s, 4s, 4s) 1652 GEN_BINARY_TEST(saba, 2s, 2s, 2s) 1653 GEN_BINARY_TEST(saba, 8h, 8h, 8h) 1654 GEN_BINARY_TEST(saba, 4h, 4h, 4h) 1655 GEN_BINARY_TEST(saba, 16b, 16b, 16b) 1656 GEN_BINARY_TEST(saba, 8b, 8b, 8b) 1657 1658 GEN_BINARY_TEST(uaba, 4s, 4s, 4s) 1659 GEN_BINARY_TEST(uaba, 2s, 2s, 2s) 1660 GEN_BINARY_TEST(uaba, 8h, 8h, 8h) 1661 GEN_BINARY_TEST(uaba, 4h, 4h, 4h) 1662 GEN_BINARY_TEST(uaba, 16b, 16b, 16b) 1663 GEN_BINARY_TEST(uaba, 8b, 8b, 8b) 1664 1665 GEN_THREEVEC_TEST(sabal_2d_2s_2s, "sabal v2.2d, v11.2s, v29.2s", 2, 11, 29) 1666 GEN_THREEVEC_TEST(sabal2_2d_4s_4s, "sabal2 v2.2d, v11.4s, v29.4s", 2, 11, 29) 1667 1668 GEN_THREEVEC_TEST(sabal_4s_4h_4h, "sabal v2.4s, v11.4h, v29.4h", 2, 11, 29) 1669 GEN_THREEVEC_TEST(sabal2_4s_8h_8h, "sabal2 v2.4s, v11.8h, v29.8h", 2, 11, 29) 1670 1671 GEN_THREEVEC_TEST(sabal_8h_8b_8b, "sabal v2.8h, v11.8b, v29.8b", 2, 11, 29) 1672 GEN_THREEVEC_TEST(sabal2_8h_16b_16b, 1673 "sabal2 v2.8h, v11.16b, v29.16b", 2, 11, 29) 1674 1675 GEN_THREEVEC_TEST(uabal_2d_2s_2s, "uabal v2.2d, v11.2s, v29.2s", 2, 11, 29) 1676 GEN_THREEVEC_TEST(uabal2_2d_4s_4s, "uabal2 v2.2d, v11.4s, v29.4s", 2, 11, 29) 1677 1678 GEN_THREEVEC_TEST(uabal_4s_4h_4h, "uabal v2.4s, v11.4h, v29.4h", 2, 11, 29) 1679 GEN_THREEVEC_TEST(uabal2_4s_8h_8h, "uabal2 v2.4s, v11.8h, v29.8h", 2, 11, 29) 1680 1681 GEN_THREEVEC_TEST(uabal_8h_8b_8b, "uabal v2.8h, v11.8b, v29.8b", 2, 11, 29) 1682 GEN_THREEVEC_TEST(uabal2_8h_16b_16b, 1683 "uabal2 v2.8h, v11.16b, v29.16b", 2, 11, 29) 1684 1685 GEN_THREEVEC_TEST(sabd_4s_4s_4s, "sabd v2.4s, v11.4s, v29.4s", 2, 11, 29) 1686 GEN_THREEVEC_TEST(sabd_2s_2s_2s, "sabd v2.2s, v11.2s, v29.2s", 2, 11, 29) 1687 GEN_THREEVEC_TEST(sabd_8h_8h_8h, "sabd v2.8h, v11.8h, v29.8h", 2, 11, 29) 1688 GEN_THREEVEC_TEST(sabd_4h_4h_4h, "sabd v2.4h, v11.4h, v29.4h", 2, 11, 29) 1689 GEN_THREEVEC_TEST(sabd_16b_16b_16b, "sabd v2.16b, v11.16b, v29.16b", 2, 11, 29) 1690 GEN_THREEVEC_TEST(sabd_8b_8b_8b, "sabd v2.8b, v11.8b, v29.8b", 2, 11, 29) 1691 1692 GEN_THREEVEC_TEST(uabd_4s_4s_4s, "uabd v2.4s, v11.4s, v29.4s", 2, 11, 29) 1693 GEN_THREEVEC_TEST(uabd_2s_2s_2s, "uabd v2.2s, v11.2s, v29.2s", 2, 11, 29) 1694 GEN_THREEVEC_TEST(uabd_8h_8h_8h, "uabd v2.8h, v11.8h, v29.8h", 2, 11, 29) 1695 GEN_THREEVEC_TEST(uabd_4h_4h_4h, "uabd v2.4h, v11.4h, v29.4h", 2, 11, 29) 1696 GEN_THREEVEC_TEST(uabd_16b_16b_16b, "uabd v2.16b, v11.16b, v29.16b", 2, 11, 29) 1697 GEN_THREEVEC_TEST(uabd_8b_8b_8b, "uabd v2.8b, v11.8b, v29.8b", 2, 11, 29) 1698 1699 GEN_THREEVEC_TEST(sabdl_2d_2s_2s, "sabdl v2.2d, v11.2s, v29.2s", 2, 11, 29) 1700 GEN_THREEVEC_TEST(sabdl2_2d_4s_4s, "sabdl2 v2.2d, v11.4s, v29.4s", 2, 11, 29) 1701 1702 GEN_THREEVEC_TEST(sabdl_4s_4h_4h, "sabdl v2.4s, v11.4h, v29.4h", 2, 11, 29) 1703 GEN_THREEVEC_TEST(sabdl2_4s_8h_8h, "sabdl2 v2.4s, v11.8h, v29.8h", 2, 11, 29) 1704 1705 GEN_THREEVEC_TEST(sabdl_8h_8b_8b, "sabdl v2.8h, v11.8b, v29.8b", 2, 11, 29) 1706 GEN_THREEVEC_TEST(sabdl2_8h_16b_16b, 1707 "sabdl2 v2.8h, v11.16b, v29.16b", 2, 11, 29) 1708 1709 GEN_THREEVEC_TEST(uabdl_2d_2s_2s, "uabdl v2.2d, v11.2s, v29.2s", 2, 11, 29) 1710 GEN_THREEVEC_TEST(uabdl2_2d_4s_4s, "uabdl2 v2.2d, v11.4s, v29.4s", 2, 11, 29) 1711 1712 GEN_THREEVEC_TEST(uabdl_4s_4h_4h, "uabdl v2.4s, v11.4h, v29.4h", 2, 11, 29) 1713 GEN_THREEVEC_TEST(uabdl2_4s_8h_8h, "uabdl2 v2.4s, v11.8h, v29.8h", 2, 11, 29) 1714 1715 GEN_THREEVEC_TEST(uabdl_8h_8b_8b, "uabdl v2.8h, v11.8b, v29.8b", 2, 11, 29) 1716 GEN_THREEVEC_TEST(uabdl2_8h_16b_16b, 1717 "uabdl2 v2.8h, v11.16b, v29.16b", 2, 11, 29) 1718 1719 GEN_TWOVEC_TEST(sadalp_4h_8b, "sadalp v3.4h, v19.8b", 3, 19) 1720 GEN_TWOVEC_TEST(sadalp_8h_16b, "sadalp v3.8h, v19.16b", 3, 19) 1721 GEN_TWOVEC_TEST(sadalp_2s_4h, "sadalp v3.2s, v19.4h", 3, 19) 1722 GEN_TWOVEC_TEST(sadalp_4s_8h, "sadalp v3.4s, v19.8h", 3, 19) 1723 GEN_TWOVEC_TEST(sadalp_1d_2s, "sadalp v3.1d, v19.2s", 3, 19) 1724 GEN_TWOVEC_TEST(sadalp_2d_4s, "sadalp v3.2d, v19.4s", 3, 19) 1725 1726 GEN_TWOVEC_TEST(uadalp_4h_8b, "uadalp v3.4h, v19.8b", 3, 19) 1727 GEN_TWOVEC_TEST(uadalp_8h_16b, "uadalp v3.8h, v19.16b", 3, 19) 1728 GEN_TWOVEC_TEST(uadalp_2s_4h, "uadalp v3.2s, v19.4h", 3, 19) 1729 GEN_TWOVEC_TEST(uadalp_4s_8h, "uadalp v3.4s, v19.8h", 3, 19) 1730 GEN_TWOVEC_TEST(uadalp_1d_2s, "uadalp v3.1d, v19.2s", 3, 19) 1731 GEN_TWOVEC_TEST(uadalp_2d_4s, "uadalp v3.2d, v19.4s", 3, 19) 1732 1733 GEN_THREEVEC_TEST(saddl_2d_2s_2s, "saddl v2.2d, v11.2s, v29.2s", 2, 11, 29) 1734 GEN_THREEVEC_TEST(saddl2_2d_4s_4s, "saddl2 v2.2d, v11.4s, v29.4s", 2, 11, 29) 1735 1736 GEN_THREEVEC_TEST(saddl_4s_4h_4h, "saddl v2.4s, v11.4h, v29.4h", 2, 11, 29) 1737 GEN_THREEVEC_TEST(saddl2_4s_8h_8h, "saddl2 v2.4s, v11.8h, v29.8h", 2, 11, 29) 1738 1739 GEN_THREEVEC_TEST(saddl_8h_8b_8b, "saddl v2.8h, v11.8b, v29.8b", 2, 11, 29) 1740 GEN_THREEVEC_TEST(saddl2_8h_16b_16b, 1741 "saddl2 v2.8h, v11.16b, v29.16b", 2, 11, 29) 1742 1743 GEN_THREEVEC_TEST(uaddl_2d_2s_2s, "uaddl v2.2d, v11.2s, v29.2s", 2, 11, 29) 1744 GEN_THREEVEC_TEST(uaddl2_2d_4s_4s, "uaddl2 v2.2d, v11.4s, v29.4s", 2, 11, 29) 1745 1746 GEN_THREEVEC_TEST(uaddl_4s_4h_4h, "uaddl v2.4s, v11.4h, v29.4h", 2, 11, 29) 1747 GEN_THREEVEC_TEST(uaddl2_4s_8h_8h, "uaddl2 v2.4s, v11.8h, v29.8h", 2, 11, 29) 1748 1749 GEN_THREEVEC_TEST(uaddl_8h_8b_8b, "uaddl v2.8h, v11.8b, v29.8b", 2, 11, 29) 1750 GEN_THREEVEC_TEST(uaddl2_8h_16b_16b, 1751 "uaddl2 v2.8h, v11.16b, v29.16b", 2, 11, 29) 1752 1753 GEN_THREEVEC_TEST(ssubl_2d_2s_2s, "ssubl v2.2d, v11.2s, v29.2s", 2, 11, 29) 1754 GEN_THREEVEC_TEST(ssubl2_2d_4s_4s, "ssubl2 v2.2d, v11.4s, v29.4s", 2, 11, 29) 1755 1756 GEN_THREEVEC_TEST(ssubl_4s_4h_4h, "ssubl v2.4s, v11.4h, v29.4h", 2, 11, 29) 1757 GEN_THREEVEC_TEST(ssubl2_4s_8h_8h, "ssubl2 v2.4s, v11.8h, v29.8h", 2, 11, 29) 1758 1759 GEN_THREEVEC_TEST(ssubl_8h_8b_8b, "ssubl v2.8h, v11.8b, v29.8b", 2, 11, 29) 1760 GEN_THREEVEC_TEST(ssubl2_8h_16b_16b, 1761 "ssubl2 v2.8h, v11.16b, v29.16b", 2, 11, 29) 1762 1763 GEN_THREEVEC_TEST(usubl_2d_2s_2s, "usubl v2.2d, v11.2s, v29.2s", 2, 11, 29) 1764 GEN_THREEVEC_TEST(usubl2_2d_4s_4s, "usubl2 v2.2d, v11.4s, v29.4s", 2, 11, 29) 1765 1766 GEN_THREEVEC_TEST(usubl_4s_4h_4h, "usubl v2.4s, v11.4h, v29.4h", 2, 11, 29) 1767 GEN_THREEVEC_TEST(usubl2_4s_8h_8h, "usubl2 v2.4s, v11.8h, v29.8h", 2, 11, 29) 1768 1769 GEN_THREEVEC_TEST(usubl_8h_8b_8b, "usubl v2.8h, v11.8b, v29.8b", 2, 11, 29) 1770 GEN_THREEVEC_TEST(usubl2_8h_16b_16b, 1771 "usubl2 v2.8h, v11.16b, v29.16b", 2, 11, 29) 1772 1773 GEN_TWOVEC_TEST(saddlp_4h_8b, "saddlp v3.4h, v19.8b", 3, 19) 1774 GEN_TWOVEC_TEST(saddlp_8h_16b, "saddlp v3.8h, v19.16b", 3, 19) 1775 GEN_TWOVEC_TEST(saddlp_2s_4h, "saddlp v3.2s, v19.4h", 3, 19) 1776 GEN_TWOVEC_TEST(saddlp_4s_8h, "saddlp v3.4s, v19.8h", 3, 19) 1777 GEN_TWOVEC_TEST(saddlp_1d_2s, "saddlp v3.1d, v19.2s", 3, 19) 1778 GEN_TWOVEC_TEST(saddlp_2d_4s, "saddlp v3.2d, v19.4s", 3, 19) 1779 1780 GEN_TWOVEC_TEST(uaddlp_4h_8b, "uaddlp v3.4h, v19.8b", 3, 19) 1781 GEN_TWOVEC_TEST(uaddlp_8h_16b, "uaddlp v3.8h, v19.16b", 3, 19) 1782 GEN_TWOVEC_TEST(uaddlp_2s_4h, "uaddlp v3.2s, v19.4h", 3, 19) 1783 GEN_TWOVEC_TEST(uaddlp_4s_8h, "uaddlp v3.4s, v19.8h", 3, 19) 1784 GEN_TWOVEC_TEST(uaddlp_1d_2s, "uaddlp v3.1d, v19.2s", 3, 19) 1785 GEN_TWOVEC_TEST(uaddlp_2d_4s, "uaddlp v3.2d, v19.4s", 3, 19) 1786 1787 GEN_TWOVEC_TEST(saddlv_h_16b, "saddlv h3, v19.16b", 3, 19) 1788 GEN_TWOVEC_TEST(saddlv_h_8b, "saddlv h3, v19.8b", 3, 19) 1789 GEN_TWOVEC_TEST(saddlv_s_8h, "saddlv s3, v19.8h", 3, 19) 1790 GEN_TWOVEC_TEST(saddlv_s_4h, "saddlv s3, v19.4h", 3, 19) 1791 GEN_TWOVEC_TEST(saddlv_d_4s, "saddlv d3, v19.4s", 3, 19) 1792 1793 GEN_TWOVEC_TEST(uaddlv_h_16b, "uaddlv h3, v19.16b", 3, 19) 1794 GEN_TWOVEC_TEST(uaddlv_h_8b, "uaddlv h3, v19.8b", 3, 19) 1795 GEN_TWOVEC_TEST(uaddlv_s_8h, "uaddlv s3, v19.8h", 3, 19) 1796 GEN_TWOVEC_TEST(uaddlv_s_4h, "uaddlv s3, v19.4h", 3, 19) 1797 GEN_TWOVEC_TEST(uaddlv_d_4s, "uaddlv d3, v19.4s", 3, 19) 1798 1799 GEN_THREEVEC_TEST(saddw2_8h_8h_16b, "saddw2 v5.8h, v13.8h, v31.16b", 5, 13, 31) 1800 GEN_THREEVEC_TEST(saddw_8h_8h_8b, "saddw v5.8h, v13.8h, v31.8b", 5, 13, 31) 1801 GEN_THREEVEC_TEST(saddw2_4s_4s_8h, "saddw2 v5.4s, v13.4s, v31.8h", 5, 13, 31) 1802 GEN_THREEVEC_TEST(saddw_4s_4s_4h, "saddw v5.4s, v13.4s, v31.4h", 5, 13, 31) 1803 GEN_THREEVEC_TEST(saddw2_2d_2d_4s, "saddw2 v5.2d, v13.2d, v31.4s", 5, 13, 31) 1804 GEN_THREEVEC_TEST(saddw_2d_2d_2s, "saddw v5.2d, v13.2d, v31.2s", 5, 13, 31) 1805 1806 GEN_THREEVEC_TEST(uaddw2_8h_8h_16b, "uaddw2 v5.8h, v13.8h, v31.16b", 5, 13, 31) 1807 GEN_THREEVEC_TEST(uaddw_8h_8h_8b, "uaddw v5.8h, v13.8h, v31.8b", 5, 13, 31) 1808 GEN_THREEVEC_TEST(uaddw2_4s_4s_8h, "uaddw2 v5.4s, v13.4s, v31.8h", 5, 13, 31) 1809 GEN_THREEVEC_TEST(uaddw_4s_4s_4h, "uaddw v5.4s, v13.4s, v31.4h", 5, 13, 31) 1810 GEN_THREEVEC_TEST(uaddw2_2d_2d_4s, "uaddw2 v5.2d, v13.2d, v31.4s", 5, 13, 31) 1811 GEN_THREEVEC_TEST(uaddw_2d_2d_2s, "uaddw v5.2d, v13.2d, v31.2s", 5, 13, 31) 1812 1813 GEN_THREEVEC_TEST(ssubw2_8h_8h_16b, "ssubw2 v5.8h, v13.8h, v31.16b", 5, 13, 31) 1814 GEN_THREEVEC_TEST(ssubw_8h_8h_8b, "ssubw v5.8h, v13.8h, v31.8b", 5, 13, 31) 1815 GEN_THREEVEC_TEST(ssubw2_4s_4s_8h, "ssubw2 v5.4s, v13.4s, v31.8h", 5, 13, 31) 1816 GEN_THREEVEC_TEST(ssubw_4s_4s_4h, "ssubw v5.4s, v13.4s, v31.4h", 5, 13, 31) 1817 GEN_THREEVEC_TEST(ssubw2_2d_2d_4s, "ssubw2 v5.2d, v13.2d, v31.4s", 5, 13, 31) 1818 GEN_THREEVEC_TEST(ssubw_2d_2d_2s, "ssubw v5.2d, v13.2d, v31.2s", 5, 13, 31) 1819 1820 GEN_THREEVEC_TEST(usubw2_8h_8h_16b, "usubw2 v5.8h, v13.8h, v31.16b", 5, 13, 31) 1821 GEN_THREEVEC_TEST(usubw_8h_8h_8b, "usubw v5.8h, v13.8h, v31.8b", 5, 13, 31) 1822 GEN_THREEVEC_TEST(usubw2_4s_4s_8h, "usubw2 v5.4s, v13.4s, v31.8h", 5, 13, 31) 1823 GEN_THREEVEC_TEST(usubw_4s_4s_4h, "usubw v5.4s, v13.4s, v31.4h", 5, 13, 31) 1824 GEN_THREEVEC_TEST(usubw2_2d_2d_4s, "usubw2 v5.2d, v13.2d, v31.4s", 5, 13, 31) 1825 GEN_THREEVEC_TEST(usubw_2d_2d_2s, "usubw v5.2d, v13.2d, v31.2s", 5, 13, 31) 1826 1827 GEN_THREEVEC_TEST(shadd_4s_4s_4s, "shadd v2.4s, v11.4s, v29.4s", 2, 11, 29) 1828 GEN_THREEVEC_TEST(shadd_2s_2s_2s, "shadd v2.2s, v11.2s, v29.2s", 2, 11, 29) 1829 GEN_THREEVEC_TEST(shadd_8h_8h_8h, "shadd v2.8h, v11.8h, v29.8h", 2, 11, 29) 1830 GEN_THREEVEC_TEST(shadd_4h_4h_4h, "shadd v2.4h, v11.4h, v29.4h", 2, 11, 29) 1831 GEN_THREEVEC_TEST(shadd_16b_16b_16b,"shadd v2.16b, v11.16b, v29.16b", 2, 11, 29) 1832 GEN_THREEVEC_TEST(shadd_8b_8b_8b, "shadd v2.8b, v11.8b, v29.8b", 2, 11, 29) 1833 1834 GEN_THREEVEC_TEST(uhadd_4s_4s_4s, "uhadd v2.4s, v11.4s, v29.4s", 2, 11, 29) 1835 GEN_THREEVEC_TEST(uhadd_2s_2s_2s, "uhadd v2.2s, v11.2s, v29.2s", 2, 11, 29) 1836 GEN_THREEVEC_TEST(uhadd_8h_8h_8h, "uhadd v2.8h, v11.8h, v29.8h", 2, 11, 29) 1837 GEN_THREEVEC_TEST(uhadd_4h_4h_4h, "uhadd v2.4h, v11.4h, v29.4h", 2, 11, 29) 1838 GEN_THREEVEC_TEST(uhadd_16b_16b_16b,"uhadd v2.16b, v11.16b, v29.16b", 2, 11, 29) 1839 GEN_THREEVEC_TEST(uhadd_8b_8b_8b, "uhadd v2.8b, v11.8b, v29.8b", 2, 11, 29) 1840 1841 GEN_THREEVEC_TEST(shsub_4s_4s_4s, "shsub v2.4s, v11.4s, v29.4s", 2, 11, 29) 1842 GEN_THREEVEC_TEST(shsub_2s_2s_2s, "shsub v2.2s, v11.2s, v29.2s", 2, 11, 29) 1843 GEN_THREEVEC_TEST(shsub_8h_8h_8h, "shsub v2.8h, v11.8h, v29.8h", 2, 11, 29) 1844 GEN_THREEVEC_TEST(shsub_4h_4h_4h, "shsub v2.4h, v11.4h, v29.4h", 2, 11, 29) 1845 GEN_THREEVEC_TEST(shsub_16b_16b_16b,"shsub v2.16b, v11.16b, v29.16b", 2, 11, 29) 1846 GEN_THREEVEC_TEST(shsub_8b_8b_8b, "shsub v2.8b, v11.8b, v29.8b", 2, 11, 29) 1847 1848 GEN_THREEVEC_TEST(uhsub_4s_4s_4s, "uhsub v2.4s, v11.4s, v29.4s", 2, 11, 29) 1849 GEN_THREEVEC_TEST(uhsub_2s_2s_2s, "uhsub v2.2s, v11.2s, v29.2s", 2, 11, 29) 1850 GEN_THREEVEC_TEST(uhsub_8h_8h_8h, "uhsub v2.8h, v11.8h, v29.8h", 2, 11, 29) 1851 GEN_THREEVEC_TEST(uhsub_4h_4h_4h, "uhsub v2.4h, v11.4h, v29.4h", 2, 11, 29) 1852 GEN_THREEVEC_TEST(uhsub_16b_16b_16b,"uhsub v2.16b, v11.16b, v29.16b", 2, 11, 29) 1853 GEN_THREEVEC_TEST(uhsub_8b_8b_8b, "uhsub v2.8b, v11.8b, v29.8b", 2, 11, 29) 1854 1855 GEN_TWOVEC_TEST(shll_8h_8b_8, "shll v3.8h, v24.8b, #8", 3, 24) 1856 GEN_TWOVEC_TEST(shll2_8h_16b_8, "shll2 v3.8h, v24.16b, #8", 3, 24) 1857 GEN_TWOVEC_TEST(shll_4s_4h_16, "shll v3.4s, v24.4h, #16", 3, 24) 1858 GEN_TWOVEC_TEST(shll2_4s_8h_16, "shll2 v3.4s, v24.8h, #16", 3, 24) 1859 GEN_TWOVEC_TEST(shll_2d_2s_32, "shll v3.2d, v24.2s, #32", 3, 24) 1860 GEN_TWOVEC_TEST(shll2_2d_4s_32, "shll2 v3.2d, v24.4s, #32", 3, 24) 1861 1862 GEN_TWOVEC_TEST(shrn_2s_2d_1, "shrn v4.2s, v29.2d, #1", 4, 29) 1863 GEN_TWOVEC_TEST(shrn_2s_2d_32, "shrn v4.2s, v29.2d, #32", 4, 29) 1864 GEN_TWOVEC_TEST(shrn2_4s_2d_1, "shrn2 v4.4s, v29.2d, #1", 4, 29) 1865 GEN_TWOVEC_TEST(shrn2_4s_2d_32, "shrn2 v4.4s, v29.2d, #32", 4, 29) 1866 GEN_TWOVEC_TEST(shrn_4h_4s_1, "shrn v4.4h, v29.4s, #1", 4, 29) 1867 GEN_TWOVEC_TEST(shrn_4h_4s_16, "shrn v4.4h, v29.4s, #16", 4, 29) 1868 GEN_TWOVEC_TEST(shrn2_8h_4s_1, "shrn2 v4.8h, v29.4s, #1", 4, 29) 1869 GEN_TWOVEC_TEST(shrn2_8h_4s_16, "shrn2 v4.8h, v29.4s, #16", 4, 29) 1870 GEN_TWOVEC_TEST(shrn_8b_8h_1, "shrn v4.8b, v29.8h, #1", 4, 29) 1871 GEN_TWOVEC_TEST(shrn_8b_8h_8, "shrn v4.8b, v29.8h, #8", 4, 29) 1872 GEN_TWOVEC_TEST(shrn2_16b_8h_1, "shrn2 v4.16b, v29.8h, #1", 4, 29) 1873 GEN_TWOVEC_TEST(shrn2_16b_8h_8, "shrn2 v4.16b, v29.8h, #8", 4, 29) 1874 1875 GEN_TWOVEC_TEST(rshrn_2s_2d_1, "rshrn v4.2s, v29.2d, #1", 4, 29) 1876 GEN_TWOVEC_TEST(rshrn_2s_2d_32, "rshrn v4.2s, v29.2d, #32", 4, 29) 1877 GEN_TWOVEC_TEST(rshrn2_4s_2d_1, "rshrn2 v4.4s, v29.2d, #1", 4, 29) 1878 GEN_TWOVEC_TEST(rshrn2_4s_2d_32, "rshrn2 v4.4s, v29.2d, #32", 4, 29) 1879 GEN_TWOVEC_TEST(rshrn_4h_4s_1, "rshrn v4.4h, v29.4s, #1", 4, 29) 1880 GEN_TWOVEC_TEST(rshrn_4h_4s_16, "rshrn v4.4h, v29.4s, #16", 4, 29) 1881 GEN_TWOVEC_TEST(rshrn2_8h_4s_1, "rshrn2 v4.8h, v29.4s, #1", 4, 29) 1882 GEN_TWOVEC_TEST(rshrn2_8h_4s_16, "rshrn2 v4.8h, v29.4s, #16", 4, 29) 1883 GEN_TWOVEC_TEST(rshrn_8b_8h_1, "rshrn v4.8b, v29.8h, #1", 4, 29) 1884 GEN_TWOVEC_TEST(rshrn_8b_8h_8, "rshrn v4.8b, v29.8h, #8", 4, 29) 1885 GEN_TWOVEC_TEST(rshrn2_16b_8h_1, "rshrn2 v4.16b, v29.8h, #1", 4, 29) 1886 GEN_TWOVEC_TEST(rshrn2_16b_8h_8, "rshrn2 v4.16b, v29.8h, #8", 4, 29) 1887 1888 GEN_TWOVEC_TEST(sli_d_d_0, "sli d5, d28, #0", 5, 28) 1889 GEN_TWOVEC_TEST(sli_d_d_32, "sli d5, d28, #32", 5, 28) 1890 GEN_TWOVEC_TEST(sli_d_d_63, "sli d5, d28, #63", 5, 28) 1891 GEN_TWOVEC_TEST(sri_d_d_1, "sri d5, d28, #1", 5, 28) 1892 GEN_TWOVEC_TEST(sri_d_d_33, "sri d5, d28, #33", 5, 28) 1893 GEN_TWOVEC_TEST(sri_d_d_64, "sri d5, d28, #64", 5, 28) 1894 1895 GEN_TWOVEC_TEST(sli_2d_2d_0, "sli v6.2d, v27.2d, #0", 6, 27) 1896 GEN_TWOVEC_TEST(sli_2d_2d_32, "sli v6.2d, v27.2d, #32", 6, 27) 1897 GEN_TWOVEC_TEST(sli_2d_2d_63, "sli v6.2d, v27.2d, #63", 6, 27) 1898 GEN_TWOVEC_TEST(sli_4s_4s_0, "sli v6.4s, v27.4s, #0", 6, 27) 1899 GEN_TWOVEC_TEST(sli_4s_4s_16, "sli v6.4s, v27.4s, #16", 6, 27) 1900 GEN_TWOVEC_TEST(sli_4s_4s_31, "sli v6.4s, v27.4s, #31", 6, 27) 1901 GEN_TWOVEC_TEST(sli_2s_2s_0, "sli v6.2s, v27.2s, #0", 6, 27) 1902 GEN_TWOVEC_TEST(sli_2s_2s_16, "sli v6.2s, v27.2s, #16", 6, 27) 1903 GEN_TWOVEC_TEST(sli_2s_2s_31, "sli v6.2s, v27.2s, #31", 6, 27) 1904 GEN_TWOVEC_TEST(sli_8h_8h_0, "sli v6.8h, v27.8h, #0", 6, 27) 1905 GEN_TWOVEC_TEST(sli_8h_8h_8, "sli v6.8h, v27.8h, #8", 6, 27) 1906 GEN_TWOVEC_TEST(sli_8h_8h_15, "sli v6.8h, v27.8h, #15", 6, 27) 1907 GEN_TWOVEC_TEST(sli_4h_4h_0, "sli v6.4h, v27.4h, #0", 6, 27) 1908 GEN_TWOVEC_TEST(sli_4h_4h_8, "sli v6.4h, v27.4h, #8", 6, 27) 1909 GEN_TWOVEC_TEST(sli_4h_4h_15, "sli v6.4h, v27.4h, #15", 6, 27) 1910 GEN_TWOVEC_TEST(sli_16b_16b_0, "sli v6.16b, v27.16b, #0", 6, 27) 1911 GEN_TWOVEC_TEST(sli_16b_16b_3, "sli v6.16b, v27.16b, #3", 6, 27) 1912 GEN_TWOVEC_TEST(sli_16b_16b_7, "sli v6.16b, v27.16b, #7", 6, 27) 1913 GEN_TWOVEC_TEST(sli_8b_8b_0, "sli v6.8b, v27.8b, #0", 6, 27) 1914 GEN_TWOVEC_TEST(sli_8b_8b_3, "sli v6.8b, v27.8b, #3", 6, 27) 1915 GEN_TWOVEC_TEST(sli_8b_8b_7, "sli v6.8b, v27.8b, #7", 6, 27) 1916 1917 GEN_TWOVEC_TEST(sri_2d_2d_1, "sri v6.2d, v27.2d, #1", 6, 27) 1918 GEN_TWOVEC_TEST(sri_2d_2d_33, "sri v6.2d, v27.2d, #33", 6, 27) 1919 GEN_TWOVEC_TEST(sri_2d_2d_64, "sri v6.2d, v27.2d, #64", 6, 27) 1920 GEN_TWOVEC_TEST(sri_4s_4s_1, "sri v6.4s, v27.4s, #1", 6, 27) 1921 GEN_TWOVEC_TEST(sri_4s_4s_17, "sri v6.4s, v27.4s, #17", 6, 27) 1922 GEN_TWOVEC_TEST(sri_4s_4s_32, "sri v6.4s, v27.4s, #32", 6, 27) 1923 GEN_TWOVEC_TEST(sri_2s_2s_1, "sri v6.2s, v27.2s, #1", 6, 27) 1924 GEN_TWOVEC_TEST(sri_2s_2s_17, "sri v6.2s, v27.2s, #17", 6, 27) 1925 GEN_TWOVEC_TEST(sri_2s_2s_32, "sri v6.2s, v27.2s, #32", 6, 27) 1926 GEN_TWOVEC_TEST(sri_8h_8h_1, "sri v6.8h, v27.8h, #1", 6, 27) 1927 GEN_TWOVEC_TEST(sri_8h_8h_8, "sri v6.8h, v27.8h, #8", 6, 27) 1928 GEN_TWOVEC_TEST(sri_8h_8h_16, "sri v6.8h, v27.8h, #16", 6, 27) 1929 GEN_TWOVEC_TEST(sri_4h_4h_1, "sri v6.4h, v27.4h, #1", 6, 27) 1930 GEN_TWOVEC_TEST(sri_4h_4h_8, "sri v6.4h, v27.4h, #8", 6, 27) 1931 GEN_TWOVEC_TEST(sri_4h_4h_16, "sri v6.4h, v27.4h, #16", 6, 27) 1932 GEN_TWOVEC_TEST(sri_16b_16b_1, "sri v6.16b, v27.16b, #1", 6, 27) 1933 GEN_TWOVEC_TEST(sri_16b_16b_4, "sri v6.16b, v27.16b, #4", 6, 27) 1934 GEN_TWOVEC_TEST(sri_16b_16b_8, "sri v6.16b, v27.16b, #8", 6, 27) 1935 GEN_TWOVEC_TEST(sri_8b_8b_1, "sri v6.8b, v27.8b, #1", 6, 27) 1936 GEN_TWOVEC_TEST(sri_8b_8b_4, "sri v6.8b, v27.8b, #4", 6, 27) 1937 GEN_TWOVEC_TEST(sri_8b_8b_8, "sri v6.8b, v27.8b, #8", 6, 27) 1938 1939 GEN_BINARY_TEST(smaxp, 4s, 4s, 4s) 1940 GEN_BINARY_TEST(smaxp, 2s, 2s, 2s) 1941 GEN_BINARY_TEST(smaxp, 8h, 8h, 8h) 1942 GEN_BINARY_TEST(smaxp, 4h, 4h, 4h) 1943 GEN_BINARY_TEST(smaxp, 16b, 16b, 16b) 1944 GEN_BINARY_TEST(smaxp, 8b, 8b, 8b) 1945 1946 GEN_BINARY_TEST(umaxp, 4s, 4s, 4s) 1947 GEN_BINARY_TEST(umaxp, 2s, 2s, 2s) 1948 GEN_BINARY_TEST(umaxp, 8h, 8h, 8h) 1949 GEN_BINARY_TEST(umaxp, 4h, 4h, 4h) 1950 GEN_BINARY_TEST(umaxp, 16b, 16b, 16b) 1951 GEN_BINARY_TEST(umaxp, 8b, 8b, 8b) 1952 1953 GEN_BINARY_TEST(sminp, 4s, 4s, 4s) 1954 GEN_BINARY_TEST(sminp, 2s, 2s, 2s) 1955 GEN_BINARY_TEST(sminp, 8h, 8h, 8h) 1956 GEN_BINARY_TEST(sminp, 4h, 4h, 4h) 1957 GEN_BINARY_TEST(sminp, 16b, 16b, 16b) 1958 GEN_BINARY_TEST(sminp, 8b, 8b, 8b) 1959 1960 GEN_BINARY_TEST(uminp, 4s, 4s, 4s) 1961 GEN_BINARY_TEST(uminp, 2s, 2s, 2s) 1962 GEN_BINARY_TEST(uminp, 8h, 8h, 8h) 1963 GEN_BINARY_TEST(uminp, 4h, 4h, 4h) 1964 GEN_BINARY_TEST(uminp, 16b, 16b, 16b) 1965 GEN_BINARY_TEST(uminp, 8b, 8b, 8b) 1966 1967 GEN_THREEVEC_TEST(smlal_2d_2s_s0, "smlal v29.2d, v20.2s, v3.s[0]", 29, 20, 3) 1968 GEN_THREEVEC_TEST(smlal_2d_2s_s3, "smlal v29.2d, v20.2s, v3.s[3]", 29, 20, 3) 1969 GEN_THREEVEC_TEST(smlal2_2d_4s_s1, "smlal2 v29.2d, v20.4s, v3.s[1]", 29, 20, 3) 1970 GEN_THREEVEC_TEST(smlal2_2d_4s_s2, "smlal2 v29.2d, v20.4s, v3.s[2]", 29, 20, 3) 1971 GEN_THREEVEC_TEST(smlal_4s_4h_h0, "smlal v29.4s, v20.4h, v3.h[0]", 29, 20, 3) 1972 GEN_THREEVEC_TEST(smlal_4s_4h_h7, "smlal v29.4s, v20.4h, v3.h[7]", 29, 20, 3) 1973 GEN_THREEVEC_TEST(smlal2_4s_8h_h1, "smlal2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3) 1974 GEN_THREEVEC_TEST(smlal2_4s_8h_h4, "smlal2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3) 1975 1976 GEN_THREEVEC_TEST(umlal_2d_2s_s0, "umlal v29.2d, v20.2s, v3.s[0]", 29, 20, 3) 1977 GEN_THREEVEC_TEST(umlal_2d_2s_s3, "umlal v29.2d, v20.2s, v3.s[3]", 29, 20, 3) 1978 GEN_THREEVEC_TEST(umlal2_2d_4s_s1, "umlal2 v29.2d, v20.4s, v3.s[1]", 29, 20, 3) 1979 GEN_THREEVEC_TEST(umlal2_2d_4s_s2, "umlal2 v29.2d, v20.4s, v3.s[2]", 29, 20, 3) 1980 GEN_THREEVEC_TEST(umlal_4s_4h_h0, "umlal v29.4s, v20.4h, v3.h[0]", 29, 20, 3) 1981 GEN_THREEVEC_TEST(umlal_4s_4h_h7, "umlal v29.4s, v20.4h, v3.h[7]", 29, 20, 3) 1982 GEN_THREEVEC_TEST(umlal2_4s_8h_h1, "umlal2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3) 1983 GEN_THREEVEC_TEST(umlal2_4s_8h_h4, "umlal2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3) 1984 1985 GEN_THREEVEC_TEST(smlsl_2d_2s_s0, "smlsl v29.2d, v20.2s, v3.s[0]", 29, 20, 3) 1986 GEN_THREEVEC_TEST(smlsl_2d_2s_s3, "smlsl v29.2d, v20.2s, v3.s[3]", 29, 20, 3) 1987 GEN_THREEVEC_TEST(smlsl2_2d_4s_s1, "smlsl2 v29.2d, v20.4s, v3.s[1]", 29, 20, 3) 1988 GEN_THREEVEC_TEST(smlsl2_2d_4s_s2, "smlsl2 v29.2d, v20.4s, v3.s[2]", 29, 20, 3) 1989 GEN_THREEVEC_TEST(smlsl_4s_4h_h0, "smlsl v29.4s, v20.4h, v3.h[0]", 29, 20, 3) 1990 GEN_THREEVEC_TEST(smlsl_4s_4h_h7, "smlsl v29.4s, v20.4h, v3.h[7]", 29, 20, 3) 1991 GEN_THREEVEC_TEST(smlsl2_4s_8h_h1, "smlsl2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3) 1992 GEN_THREEVEC_TEST(smlsl2_4s_8h_h4, "smlsl2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3) 1993 1994 GEN_THREEVEC_TEST(umlsl_2d_2s_s0, "umlsl v29.2d, v20.2s, v3.s[0]", 29, 20, 3) 1995 GEN_THREEVEC_TEST(umlsl_2d_2s_s3, "umlsl v29.2d, v20.2s, v3.s[3]", 29, 20, 3) 1996 GEN_THREEVEC_TEST(umlsl2_2d_4s_s1, "umlsl2 v29.2d, v20.4s, v3.s[1]", 29, 20, 3) 1997 GEN_THREEVEC_TEST(umlsl2_2d_4s_s2, "umlsl2 v29.2d, v20.4s, v3.s[2]", 29, 20, 3) 1998 GEN_THREEVEC_TEST(umlsl_4s_4h_h0, "umlsl v29.4s, v20.4h, v3.h[0]", 29, 20, 3) 1999 GEN_THREEVEC_TEST(umlsl_4s_4h_h7, "umlsl v29.4s, v20.4h, v3.h[7]", 29, 20, 3) 2000 GEN_THREEVEC_TEST(umlsl2_4s_8h_h1, "umlsl2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3) 2001 GEN_THREEVEC_TEST(umlsl2_4s_8h_h4, "umlsl2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3) 2002 2003 GEN_THREEVEC_TEST(smull_2d_2s_s0, "smull v29.2d, v20.2s, v3.s[0]", 29, 20, 3) 2004 GEN_THREEVEC_TEST(smull_2d_2s_s3, "smull v29.2d, v20.2s, v3.s[3]", 29, 20, 3) 2005 GEN_THREEVEC_TEST(smull2_2d_4s_s1, "smull2 v29.2d, v20.4s, v3.s[1]", 29, 20, 3) 2006 GEN_THREEVEC_TEST(smull2_2d_4s_s2, "smull2 v29.2d, v20.4s, v3.s[2]", 29, 20, 3) 2007 GEN_THREEVEC_TEST(smull_4s_4h_h0, "smull v29.4s, v20.4h, v3.h[0]", 29, 20, 3) 2008 GEN_THREEVEC_TEST(smull_4s_4h_h7, "smull v29.4s, v20.4h, v3.h[7]", 29, 20, 3) 2009 GEN_THREEVEC_TEST(smull2_4s_8h_h1, "smull2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3) 2010 GEN_THREEVEC_TEST(smull2_4s_8h_h4, "smull2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3) 2011 2012 GEN_THREEVEC_TEST(umull_2d_2s_s0, "umull v29.2d, v20.2s, v3.s[0]", 29, 20, 3) 2013 GEN_THREEVEC_TEST(umull_2d_2s_s3, "umull v29.2d, v20.2s, v3.s[3]", 29, 20, 3) 2014 GEN_THREEVEC_TEST(umull2_2d_4s_s1, "umull2 v29.2d, v20.4s, v3.s[1]", 29, 20, 3) 2015 GEN_THREEVEC_TEST(umull2_2d_4s_s2, "umull2 v29.2d, v20.4s, v3.s[2]", 29, 20, 3) 2016 GEN_THREEVEC_TEST(umull_4s_4h_h0, "umull v29.4s, v20.4h, v3.h[0]", 29, 20, 3) 2017 GEN_THREEVEC_TEST(umull_4s_4h_h7, "umull v29.4s, v20.4h, v3.h[7]", 29, 20, 3) 2018 GEN_THREEVEC_TEST(umull2_4s_8h_h1, "umull2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3) 2019 GEN_THREEVEC_TEST(umull2_4s_8h_h4, "umull2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3) 2020 2021 GEN_THREEVEC_TEST(smlal_2d_2s_2s, "smlal v2.2d, v11.2s, v29.2s", 2, 11, 29) 2022 GEN_THREEVEC_TEST(smlal2_2d_4s_4s, "smlal2 v2.2d, v11.4s, v29.4s", 2, 11, 29) 2023 2024 GEN_THREEVEC_TEST(smlal_4s_4h_4h, "smlal v2.4s, v11.4h, v29.4h", 2, 11, 29) 2025 GEN_THREEVEC_TEST(smlal2_4s_8h_8h, "smlal2 v2.4s, v11.8h, v29.8h", 2, 11, 29) 2026 2027 GEN_THREEVEC_TEST(smlal_8h_8b_8b, "smlal v2.8h, v11.8b, v29.8b", 2, 11, 29) 2028 GEN_THREEVEC_TEST(smlal2_8h_16b_16b, 2029 "smlal2 v2.8h, v11.16b, v29.16b", 2, 11, 29) 2030 2031 GEN_THREEVEC_TEST(umlal_2d_2s_2s, "umlal v2.2d, v11.2s, v29.2s", 2, 11, 29) 2032 GEN_THREEVEC_TEST(umlal2_2d_4s_4s, "umlal2 v2.2d, v11.4s, v29.4s", 2, 11, 29) 2033 2034 GEN_THREEVEC_TEST(umlal_4s_4h_4h, "umlal v2.4s, v11.4h, v29.4h", 2, 11, 29) 2035 GEN_THREEVEC_TEST(umlal2_4s_8h_8h, "umlal2 v2.4s, v11.8h, v29.8h", 2, 11, 29) 2036 2037 GEN_THREEVEC_TEST(umlal_8h_8b_8b, "umlal v2.8h, v11.8b, v29.8b", 2, 11, 29) 2038 GEN_THREEVEC_TEST(umlal2_8h_16b_16b, 2039 "umlal2 v2.8h, v11.16b, v29.16b", 2, 11, 29) 2040 2041 GEN_THREEVEC_TEST(smlsl_2d_2s_2s, "smlsl v2.2d, v11.2s, v29.2s", 2, 11, 29) 2042 GEN_THREEVEC_TEST(smlsl2_2d_4s_4s, "smlsl2 v2.2d, v11.4s, v29.4s", 2, 11, 29) 2043 2044 GEN_THREEVEC_TEST(smlsl_4s_4h_4h, "smlsl v2.4s, v11.4h, v29.4h", 2, 11, 29) 2045 GEN_THREEVEC_TEST(smlsl2_4s_8h_8h, "smlsl2 v2.4s, v11.8h, v29.8h", 2, 11, 29) 2046 2047 GEN_THREEVEC_TEST(smlsl_8h_8b_8b, "smlsl v2.8h, v11.8b, v29.8b", 2, 11, 29) 2048 GEN_THREEVEC_TEST(smlsl2_8h_16b_16b, 2049 "smlsl2 v2.8h, v11.16b, v29.16b", 2, 11, 29) 2050 2051 GEN_THREEVEC_TEST(umlsl_2d_2s_2s, "umlsl v2.2d, v11.2s, v29.2s", 2, 11, 29) 2052 GEN_THREEVEC_TEST(umlsl2_2d_4s_4s, "umlsl2 v2.2d, v11.4s, v29.4s", 2, 11, 29) 2053 2054 GEN_THREEVEC_TEST(umlsl_4s_4h_4h, "umlsl v2.4s, v11.4h, v29.4h", 2, 11, 29) 2055 GEN_THREEVEC_TEST(umlsl2_4s_8h_8h, "umlsl2 v2.4s, v11.8h, v29.8h", 2, 11, 29) 2056 2057 GEN_THREEVEC_TEST(umlsl_8h_8b_8b, "umlsl v2.8h, v11.8b, v29.8b", 2, 11, 29) 2058 GEN_THREEVEC_TEST(umlsl2_8h_16b_16b, 2059 "umlsl2 v2.8h, v11.16b, v29.16b", 2, 11, 29) 2060 2061 GEN_THREEVEC_TEST(smull_2d_2s_2s, "smull v2.2d, v11.2s, v29.2s", 2, 11, 29) 2062 GEN_THREEVEC_TEST(smull2_2d_4s_4s, "smull2 v2.2d, v11.4s, v29.4s", 2, 11, 29) 2063 2064 GEN_THREEVEC_TEST(smull_4s_4h_4h, "smull v2.4s, v11.4h, v29.4h", 2, 11, 29) 2065 GEN_THREEVEC_TEST(smull2_4s_8h_8h, "smull2 v2.4s, v11.8h, v29.8h", 2, 11, 29) 2066 2067 GEN_THREEVEC_TEST(smull_8h_8b_8b, "smull v2.8h, v11.8b, v29.8b", 2, 11, 29) 2068 GEN_THREEVEC_TEST(smull2_8h_16b_16b, 2069 "smull2 v2.8h, v11.16b, v29.16b", 2, 11, 29) 2070 2071 GEN_THREEVEC_TEST(umull_2d_2s_2s, "umull v2.2d, v11.2s, v29.2s", 2, 11, 29) 2072 GEN_THREEVEC_TEST(umull2_2d_4s_4s, "umull2 v2.2d, v11.4s, v29.4s", 2, 11, 29) 2073 2074 GEN_THREEVEC_TEST(umull_4s_4h_4h, "umull v2.4s, v11.4h, v29.4h", 2, 11, 29) 2075 GEN_THREEVEC_TEST(umull2_4s_8h_8h, "umull2 v2.4s, v11.8h, v29.8h", 2, 11, 29) 2076 2077 GEN_THREEVEC_TEST(umull_8h_8b_8b, "umull v2.8h, v11.8b, v29.8b", 2, 11, 29) 2078 GEN_THREEVEC_TEST(umull2_8h_16b_16b, 2079 "umull2 v2.8h, v11.16b, v29.16b", 2, 11, 29) 2080 2081 GEN_TWOVEC_TEST(sqabs_d_d, "sqabs d7, d30", 7, 30) 2082 GEN_TWOVEC_TEST(sqabs_s_s, "sqabs s7, s30", 7, 30) 2083 GEN_TWOVEC_TEST(sqabs_h_h, "sqabs h7, h30", 7, 30) 2084 GEN_TWOVEC_TEST(sqabs_b_b, "sqabs b7, b30", 7, 30) 2085 2086 GEN_TWOVEC_TEST(sqneg_d_d, "sqneg d7, d30", 7, 30) 2087 GEN_TWOVEC_TEST(sqneg_s_s, "sqneg s7, s30", 7, 30) 2088 GEN_TWOVEC_TEST(sqneg_h_h, "sqneg h7, h30", 7, 30) 2089 GEN_TWOVEC_TEST(sqneg_b_b, "sqneg b7, b30", 7, 30) 2090 2091 GEN_UNARY_TEST(sqabs, 2d, 2d) 2092 GEN_UNARY_TEST(sqabs, 4s, 4s) 2093 GEN_UNARY_TEST(sqabs, 2s, 2s) 2094 GEN_UNARY_TEST(sqabs, 8h, 8h) 2095 GEN_UNARY_TEST(sqabs, 4h, 4h) 2096 GEN_UNARY_TEST(sqabs, 16b, 16b) 2097 GEN_UNARY_TEST(sqabs, 8b, 8b) 2098 2099 GEN_UNARY_TEST(sqneg, 2d, 2d) 2100 GEN_UNARY_TEST(sqneg, 4s, 4s) 2101 GEN_UNARY_TEST(sqneg, 2s, 2s) 2102 GEN_UNARY_TEST(sqneg, 8h, 8h) 2103 GEN_UNARY_TEST(sqneg, 4h, 4h) 2104 GEN_UNARY_TEST(sqneg, 16b, 16b) 2105 GEN_UNARY_TEST(sqneg, 8b, 8b) 2106 2107 GEN_THREEVEC_TEST(sqadd_d_d_d, "sqadd d1, d2, d4", 1, 2, 4) 2108 GEN_THREEVEC_TEST(sqadd_s_s_s, "sqadd s1, s2, s4", 1, 2, 4) 2109 GEN_THREEVEC_TEST(sqadd_h_h_h, "sqadd h1, h2, h4", 1, 2, 4) 2110 GEN_THREEVEC_TEST(sqadd_b_b_b, "sqadd b1, b2, b4", 1, 2, 4) 2111 GEN_THREEVEC_TEST(sqadd_2d_2d_2d, "sqadd v1.2d, v2.2d, v4.2d", 1, 2, 4) 2112 GEN_THREEVEC_TEST(sqadd_4s_4s_4s, "sqadd v1.4s, v2.4s, v4.4s", 1, 2, 4) 2113 GEN_THREEVEC_TEST(sqadd_2s_2s_2s, "sqadd v1.2s, v2.2s, v4.2s", 1, 2, 4) 2114 GEN_THREEVEC_TEST(sqadd_8h_8h_8h, "sqadd v1.8h, v2.8h, v4.8h", 1, 2, 4) 2115 GEN_THREEVEC_TEST(sqadd_4h_4h_4h, "sqadd v1.4h, v2.4h, v4.4h", 1, 2, 4) 2116 GEN_THREEVEC_TEST(sqadd_16b_16b_16b, "sqadd v1.16b, v2.16b, v4.16b", 1, 2, 4) 2117 GEN_THREEVEC_TEST(sqadd_8b_8b_8b, "sqadd v1.8b, v2.8b, v4.8b", 1, 2, 4) 2118 2119 GEN_THREEVEC_TEST(uqadd_d_d_d, "uqadd d1, d2, d4", 1, 2, 4) 2120 GEN_THREEVEC_TEST(uqadd_s_s_s, "uqadd s1, s2, s4", 1, 2, 4) 2121 GEN_THREEVEC_TEST(uqadd_h_h_h, "uqadd h1, h2, h4", 1, 2, 4) 2122 GEN_THREEVEC_TEST(uqadd_b_b_b, "uqadd b1, b2, b4", 1, 2, 4) 2123 GEN_THREEVEC_TEST(uqadd_2d_2d_2d, "uqadd v1.2d, v2.2d, v4.2d", 1, 2, 4) 2124 GEN_THREEVEC_TEST(uqadd_4s_4s_4s, "uqadd v1.4s, v2.4s, v4.4s", 1, 2, 4) 2125 GEN_THREEVEC_TEST(uqadd_2s_2s_2s, "uqadd v1.2s, v2.2s, v4.2s", 1, 2, 4) 2126 GEN_THREEVEC_TEST(uqadd_8h_8h_8h, "uqadd v1.8h, v2.8h, v4.8h", 1, 2, 4) 2127 GEN_THREEVEC_TEST(uqadd_4h_4h_4h, "uqadd v1.4h, v2.4h, v4.4h", 1, 2, 4) 2128 GEN_THREEVEC_TEST(uqadd_16b_16b_16b, "uqadd v1.16b, v2.16b, v4.16b", 1, 2, 4) 2129 GEN_THREEVEC_TEST(uqadd_8b_8b_8b, "uqadd v1.8b, v2.8b, v4.8b", 1, 2, 4) 2130 2131 GEN_THREEVEC_TEST(sqsub_d_d_d, "sqsub d1, d2, d4", 1, 2, 4) 2132 GEN_THREEVEC_TEST(sqsub_s_s_s, "sqsub s1, s2, s4", 1, 2, 4) 2133 GEN_THREEVEC_TEST(sqsub_h_h_h, "sqsub h1, h2, h4", 1, 2, 4) 2134 GEN_THREEVEC_TEST(sqsub_b_b_b, "sqsub b1, b2, b4", 1, 2, 4) 2135 GEN_THREEVEC_TEST(sqsub_2d_2d_2d, "sqsub v1.2d, v2.2d, v4.2d", 1, 2, 4) 2136 GEN_THREEVEC_TEST(sqsub_4s_4s_4s, "sqsub v1.4s, v2.4s, v4.4s", 1, 2, 4) 2137 GEN_THREEVEC_TEST(sqsub_2s_2s_2s, "sqsub v1.2s, v2.2s, v4.2s", 1, 2, 4) 2138 GEN_THREEVEC_TEST(sqsub_8h_8h_8h, "sqsub v1.8h, v2.8h, v4.8h", 1, 2, 4) 2139 GEN_THREEVEC_TEST(sqsub_4h_4h_4h, "sqsub v1.4h, v2.4h, v4.4h", 1, 2, 4) 2140 GEN_THREEVEC_TEST(sqsub_16b_16b_16b, "sqsub v1.16b, v2.16b, v4.16b", 1, 2, 4) 2141 GEN_THREEVEC_TEST(sqsub_8b_8b_8b, "sqsub v1.8b, v2.8b, v4.8b", 1, 2, 4) 2142 2143 GEN_THREEVEC_TEST(uqsub_d_d_d, "uqsub d1, d2, d4", 1, 2, 4) 2144 GEN_THREEVEC_TEST(uqsub_s_s_s, "uqsub s1, s2, s4", 1, 2, 4) 2145 GEN_THREEVEC_TEST(uqsub_h_h_h, "uqsub h1, h2, h4", 1, 2, 4) 2146 GEN_THREEVEC_TEST(uqsub_b_b_b, "uqsub b1, b2, b4", 1, 2, 4) 2147 GEN_THREEVEC_TEST(uqsub_2d_2d_2d, "uqsub v1.2d, v2.2d, v4.2d", 1, 2, 4) 2148 GEN_THREEVEC_TEST(uqsub_4s_4s_4s, "uqsub v1.4s, v2.4s, v4.4s", 1, 2, 4) 2149 GEN_THREEVEC_TEST(uqsub_2s_2s_2s, "uqsub v1.2s, v2.2s, v4.2s", 1, 2, 4) 2150 GEN_THREEVEC_TEST(uqsub_8h_8h_8h, "uqsub v1.8h, v2.8h, v4.8h", 1, 2, 4) 2151 GEN_THREEVEC_TEST(uqsub_4h_4h_4h, "uqsub v1.4h, v2.4h, v4.4h", 1, 2, 4) 2152 GEN_THREEVEC_TEST(uqsub_16b_16b_16b, "uqsub v1.16b, v2.16b, v4.16b", 1, 2, 4) 2153 GEN_THREEVEC_TEST(uqsub_8b_8b_8b, "uqsub v1.8b, v2.8b, v4.8b", 1, 2, 4) 2154 2155 GEN_THREEVEC_TEST(sqdmlal_d_s_s0, "sqdmlal d31, s30, v29.s[0]", 31,30,29) 2156 GEN_THREEVEC_TEST(sqdmlal_d_s_s3, "sqdmlal d31, s30, v29.s[3]", 31,30,29) 2157 GEN_THREEVEC_TEST(sqdmlal_s_h_h1, "sqdmlal s31, h30, v13.h[1]", 31,30,13) 2158 GEN_THREEVEC_TEST(sqdmlal_s_h_h5, "sqdmlal s31, h30, v13.h[5]", 31,30,13) 2159 2160 GEN_THREEVEC_TEST(sqdmlsl_d_s_s0, "sqdmlsl d31, s30, v29.s[0]", 31,30,29) 2161 GEN_THREEVEC_TEST(sqdmlsl_d_s_s3, "sqdmlsl d31, s30, v29.s[3]", 31,30,29) 2162 GEN_THREEVEC_TEST(sqdmlsl_s_h_h1, "sqdmlsl s31, h30, v13.h[1]", 31,30,13) 2163 GEN_THREEVEC_TEST(sqdmlsl_s_h_h5, "sqdmlsl s31, h30, v13.h[5]", 31,30,13) 2164 2165 GEN_THREEVEC_TEST(sqdmull_d_s_s0, "sqdmull d31, s30, v29.s[0]", 31,30,29) 2166 GEN_THREEVEC_TEST(sqdmull_d_s_s3, "sqdmull d31, s30, v29.s[3]", 31,30,29) 2167 GEN_THREEVEC_TEST(sqdmull_s_h_h1, "sqdmull s31, h30, v13.h[1]", 31,30,13) 2168 GEN_THREEVEC_TEST(sqdmull_s_h_h5, "sqdmull s31, h30, v13.h[5]", 31,30,13) 2169 2170 GEN_THREEVEC_TEST(sqdmlal_2d_2s_s0, "sqdmlal v29.2d, v20.2s, v3.s[0]",29,20,3) 2171 GEN_THREEVEC_TEST(sqdmlal_2d_2s_s3, "sqdmlal v29.2d, v20.2s, v3.s[3]",29,20,3) 2172 GEN_THREEVEC_TEST(sqdmlal2_2d_4s_s1,"sqdmlal2 v29.2d, v20.4s, v3.s[1]",29,20,3) 2173 GEN_THREEVEC_TEST(sqdmlal2_2d_4s_s2,"sqdmlal2 v29.2d, v20.4s, v3.s[2]",29,20,3) 2174 GEN_THREEVEC_TEST(sqdmlal_4s_4h_h0, "sqdmlal v29.4s, v20.4h, v3.h[0]",29,20,3) 2175 GEN_THREEVEC_TEST(sqdmlal_4s_4h_h7, "sqdmlal v29.4s, v20.4h, v3.h[7]",29,20,3) 2176 GEN_THREEVEC_TEST(sqdmlal2_4s_8h_h1,"sqdmlal2 v29.4s, v20.8h, v3.h[1]",29,20,3) 2177 GEN_THREEVEC_TEST(sqdmlal2_4s_8h_h4,"sqdmlal2 v29.4s, v20.8h, v3.h[1]",29,20,3) 2178 2179 GEN_THREEVEC_TEST(sqdmlsl_2d_2s_s0, "sqdmlsl v29.2d, v20.2s, v3.s[0]",29,20,3) 2180 GEN_THREEVEC_TEST(sqdmlsl_2d_2s_s3, "sqdmlsl v29.2d, v20.2s, v3.s[3]",29,20,3) 2181 GEN_THREEVEC_TEST(sqdmlsl2_2d_4s_s1,"sqdmlsl2 v29.2d, v20.4s, v3.s[1]",29,20,3) 2182 GEN_THREEVEC_TEST(sqdmlsl2_2d_4s_s2,"sqdmlsl2 v29.2d, v20.4s, v3.s[2]",29,20,3) 2183 GEN_THREEVEC_TEST(sqdmlsl_4s_4h_h0, "sqdmlsl v29.4s, v20.4h, v3.h[0]",29,20,3) 2184 GEN_THREEVEC_TEST(sqdmlsl_4s_4h_h7, "sqdmlsl v29.4s, v20.4h, v3.h[7]",29,20,3) 2185 GEN_THREEVEC_TEST(sqdmlsl2_4s_8h_h1,"sqdmlsl2 v29.4s, v20.8h, v3.h[1]",29,20,3) 2186 GEN_THREEVEC_TEST(sqdmlsl2_4s_8h_h4,"sqdmlsl2 v29.4s, v20.8h, v3.h[1]",29,20,3) 2187 2188 GEN_THREEVEC_TEST(sqdmull_2d_2s_s0, "sqdmull v29.2d, v20.2s, v3.s[0]",29,20,3) 2189 GEN_THREEVEC_TEST(sqdmull_2d_2s_s3, "sqdmull v29.2d, v20.2s, v3.s[3]",29,20,3) 2190 GEN_THREEVEC_TEST(sqdmull2_2d_4s_s1,"sqdmull2 v29.2d, v20.4s, v3.s[1]",29,20,3) 2191 GEN_THREEVEC_TEST(sqdmull2_2d_4s_s2,"sqdmull2 v29.2d, v20.4s, v3.s[2]",29,20,3) 2192 GEN_THREEVEC_TEST(sqdmull_4s_4h_h0, "sqdmull v29.4s, v20.4h, v3.h[0]",29,20,3) 2193 GEN_THREEVEC_TEST(sqdmull_4s_4h_h7, "sqdmull v29.4s, v20.4h, v3.h[7]",29,20,3) 2194 GEN_THREEVEC_TEST(sqdmull2_4s_8h_h1,"sqdmull2 v29.4s, v20.8h, v3.h[1]",29,20,3) 2195 GEN_THREEVEC_TEST(sqdmull2_4s_8h_h4,"sqdmull2 v29.4s, v20.8h, v3.h[1]",29,20,3) 2196 2197 GEN_THREEVEC_TEST(sqdmlal_d_s_s, "sqdmlal d0, s8, s16", 0, 8, 16) 2198 GEN_THREEVEC_TEST(sqdmlal_s_h_h, "sqdmlal s0, h8, h16", 0, 8, 16) 2199 GEN_THREEVEC_TEST(sqdmlsl_d_s_s, "sqdmlsl d0, s8, s16", 0, 8, 16) 2200 GEN_THREEVEC_TEST(sqdmlsl_s_h_h, "sqdmlsl s0, h8, h16", 0, 8, 16) 2201 GEN_THREEVEC_TEST(sqdmull_d_s_s, "sqdmull d0, s8, s16", 0, 8, 16) 2202 GEN_THREEVEC_TEST(sqdmull_s_h_h, "sqdmull s0, h8, h16", 0, 8, 16) 2203 2204 GEN_THREEVEC_TEST(sqdmlal_2d_2s_2s, "sqdmlal v2.2d, v11.2s, v29.2s", 2,11,29) 2205 GEN_THREEVEC_TEST(sqdmlal2_2d_4s_4s, "sqdmlal2 v2.2d, v11.4s, v29.4s", 2,11,29) 2206 GEN_THREEVEC_TEST(sqdmlal_4s_4h_4h, "sqdmlal v2.4s, v11.4h, v29.4h", 2,11,29) 2207 GEN_THREEVEC_TEST(sqdmlal2_4s_8h_8h, "sqdmlal2 v2.4s, v11.8h, v29.8h", 2,11,29) 2208 2209 GEN_THREEVEC_TEST(sqdmlsl_2d_2s_2s, "sqdmlsl v2.2d, v11.2s, v29.2s", 2,11,29) 2210 GEN_THREEVEC_TEST(sqdmlsl2_2d_4s_4s, "sqdmlsl2 v2.2d, v11.4s, v29.4s", 2,11,29) 2211 GEN_THREEVEC_TEST(sqdmlsl_4s_4h_4h, "sqdmlsl v2.4s, v11.4h, v29.4h", 2,11,29) 2212 GEN_THREEVEC_TEST(sqdmlsl2_4s_8h_8h, "sqdmlsl2 v2.4s, v11.8h, v29.8h", 2,11,29) 2213 2214 GEN_THREEVEC_TEST(sqdmull_2d_2s_2s, "sqdmull v2.2d, v11.2s, v29.2s", 2,11,29) 2215 GEN_THREEVEC_TEST(sqdmull2_2d_4s_4s, "sqdmull2 v2.2d, v11.4s, v29.4s", 2,11,29) 2216 GEN_THREEVEC_TEST(sqdmull_4s_4h_4h, "sqdmull v2.4s, v11.4h, v29.4h", 2,11,29) 2217 GEN_THREEVEC_TEST(sqdmull2_4s_8h_8h, "sqdmull2 v2.4s, v11.8h, v29.8h", 2,11,29) 2218 2219 GEN_THREEVEC_TEST(sqdmulh_s_s_s1, "sqdmulh s0, s1, v2.s[1]", 0,1,2) 2220 GEN_THREEVEC_TEST(sqdmulh_s_s_s3, "sqdmulh s0, s1, v2.s[3]", 0,1,2) 2221 GEN_THREEVEC_TEST(sqdmulh_h_h_h2, "sqdmulh h0, h1, v2.h[2]", 0,1,2) 2222 GEN_THREEVEC_TEST(sqdmulh_h_h_h7, "sqdmulh h0, h1, v2.h[7]", 0,1,2) 2223 2224 GEN_THREEVEC_TEST(sqrdmulh_s_s_s1, "sqrdmulh s0, s1, v2.s[1]", 0,1,2) 2225 GEN_THREEVEC_TEST(sqrdmulh_s_s_s3, "sqrdmulh s0, s1, v2.s[3]", 0,1,2) 2226 GEN_THREEVEC_TEST(sqrdmulh_h_h_h2, "sqrdmulh h0, h1, v2.h[2]", 0,1,2) 2227 GEN_THREEVEC_TEST(sqrdmulh_h_h_h7, "sqrdmulh h0, h1, v2.h[7]", 0,1,2) 2228 2229 GEN_THREEVEC_TEST(sqdmulh_4s_4s_s1, "sqdmulh v0.4s, v1.4s, v2.s[1]", 0,1,2) 2230 GEN_THREEVEC_TEST(sqdmulh_4s_4s_s3, "sqdmulh v0.4s, v1.4s, v2.s[3]", 0,1,2) 2231 GEN_THREEVEC_TEST(sqdmulh_2s_2s_s1, "sqdmulh v0.2s, v1.2s, v2.s[1]", 0,1,2) 2232 GEN_THREEVEC_TEST(sqdmulh_2s_2s_s3, "sqdmulh v0.2s, v1.2s, v2.s[3]", 0,1,2) 2233 GEN_THREEVEC_TEST(sqdmulh_8h_8h_h2, "sqdmulh v0.8h, v1.8h, v2.h[2]", 0,1,2) 2234 GEN_THREEVEC_TEST(sqdmulh_8h_8h_h7, "sqdmulh v0.8h, v1.8h, v2.h[7]", 0,1,2) 2235 GEN_THREEVEC_TEST(sqdmulh_4h_4h_h2, "sqdmulh v0.4h, v1.4h, v2.h[2]", 0,1,2) 2236 GEN_THREEVEC_TEST(sqdmulh_4h_4h_h7, "sqdmulh v0.4h, v1.4h, v2.h[7]", 0,1,2) 2237 2238 GEN_THREEVEC_TEST(sqrdmulh_4s_4s_s1, "sqrdmulh v0.4s, v1.4s, v2.s[1]", 0,1,2) 2239 GEN_THREEVEC_TEST(sqrdmulh_4s_4s_s3, "sqrdmulh v0.4s, v1.4s, v2.s[3]", 0,1,2) 2240 GEN_THREEVEC_TEST(sqrdmulh_2s_2s_s1, "sqrdmulh v0.2s, v1.2s, v2.s[1]", 0,1,2) 2241 GEN_THREEVEC_TEST(sqrdmulh_2s_2s_s3, "sqrdmulh v0.2s, v1.2s, v2.s[3]", 0,1,2) 2242 GEN_THREEVEC_TEST(sqrdmulh_8h_8h_h2, "sqrdmulh v0.8h, v1.8h, v2.h[2]", 0,1,2) 2243 GEN_THREEVEC_TEST(sqrdmulh_8h_8h_h7, "sqrdmulh v0.8h, v1.8h, v2.h[7]", 0,1,2) 2244 GEN_THREEVEC_TEST(sqrdmulh_4h_4h_h2, "sqrdmulh v0.4h, v1.4h, v2.h[2]", 0,1,2) 2245 GEN_THREEVEC_TEST(sqrdmulh_4h_4h_h7, "sqrdmulh v0.4h, v1.4h, v2.h[7]", 0,1,2) 2246 2247 GEN_THREEVEC_TEST(sqdmulh_s_s_s, "sqdmulh s1, s2, s4", 1, 2, 4) 2248 GEN_THREEVEC_TEST(sqdmulh_h_h_h, "sqdmulh h1, h2, h4", 1, 2, 4) 2249 GEN_THREEVEC_TEST(sqrdmulh_s_s_s, "sqrdmulh s1, s2, s4", 1, 2, 4) 2250 GEN_THREEVEC_TEST(sqrdmulh_h_h_h, "sqrdmulh h1, h2, h4", 1, 2, 4) 2251 2252 GEN_THREEVEC_TEST(sqdmulh_4s_4s_4s, "sqdmulh v1.4s, v2.4s, v4.4s", 1, 2, 4) 2253 GEN_THREEVEC_TEST(sqdmulh_2s_2s_2s, "sqdmulh v1.2s, v2.2s, v4.2s", 1, 2, 4) 2254 GEN_THREEVEC_TEST(sqdmulh_8h_8h_8h, "sqdmulh v1.8h, v2.8h, v4.8h", 1, 2, 4) 2255 GEN_THREEVEC_TEST(sqdmulh_4h_4h_4h, "sqdmulh v1.4h, v2.4h, v4.4h", 1, 2, 4) 2256 GEN_THREEVEC_TEST(sqrdmulh_4s_4s_4s, "sqrdmulh v1.4s, v2.4s, v4.4s", 1, 2, 4) 2257 GEN_THREEVEC_TEST(sqrdmulh_2s_2s_2s, "sqrdmulh v1.2s, v2.2s, v4.2s", 1, 2, 4) 2258 GEN_THREEVEC_TEST(sqrdmulh_8h_8h_8h, "sqrdmulh v1.8h, v2.8h, v4.8h", 1, 2, 4) 2259 GEN_THREEVEC_TEST(sqrdmulh_4h_4h_4h, "sqrdmulh v1.4h, v2.4h, v4.4h", 1, 2, 4) 2260 2261 GEN_THREEVEC_TEST(sqshl_d_d_d, "sqshl d1, d2, d4", 1, 2, 4) 2262 GEN_THREEVEC_TEST(sqshl_s_s_s, "sqshl s1, s2, s4", 1, 2, 4) 2263 GEN_THREEVEC_TEST(sqshl_h_h_h, "sqshl h1, h2, h4", 1, 2, 4) 2264 GEN_THREEVEC_TEST(sqshl_b_b_b, "sqshl b1, b2, b4", 1, 2, 4) 2265 GEN_THREEVEC_TEST(sqshl_2d_2d_2d, "sqshl v1.2d, v2.2d, v4.2d", 1, 2, 4) 2266 GEN_THREEVEC_TEST(sqshl_4s_4s_4s, "sqshl v1.4s, v2.4s, v4.4s", 1, 2, 4) 2267 GEN_THREEVEC_TEST(sqshl_2s_2s_2s, "sqshl v1.2s, v2.2s, v4.2s", 1, 2, 4) 2268 GEN_THREEVEC_TEST(sqshl_8h_8h_8h, "sqshl v1.8h, v2.8h, v4.8h", 1, 2, 4) 2269 GEN_THREEVEC_TEST(sqshl_4h_4h_4h, "sqshl v1.4h, v2.4h, v4.4h", 1, 2, 4) 2270 GEN_THREEVEC_TEST(sqshl_16b_16b_16b, "sqshl v1.16b, v2.16b, v4.16b", 1, 2, 4) 2271 GEN_THREEVEC_TEST(sqshl_8b_8b_8b, "sqshl v1.8b, v2.8b, v4.8b", 1, 2, 4) 2272 2273 GEN_THREEVEC_TEST(uqshl_d_d_d, "uqshl d1, d2, d4", 1, 2, 4) 2274 GEN_THREEVEC_TEST(uqshl_s_s_s, "uqshl s1, s2, s4", 1, 2, 4) 2275 GEN_THREEVEC_TEST(uqshl_h_h_h, "uqshl h1, h2, h4", 1, 2, 4) 2276 GEN_THREEVEC_TEST(uqshl_b_b_b, "uqshl b1, b2, b4", 1, 2, 4) 2277 GEN_THREEVEC_TEST(uqshl_2d_2d_2d, "uqshl v1.2d, v2.2d, v4.2d", 1, 2, 4) 2278 GEN_THREEVEC_TEST(uqshl_4s_4s_4s, "uqshl v1.4s, v2.4s, v4.4s", 1, 2, 4) 2279 GEN_THREEVEC_TEST(uqshl_2s_2s_2s, "uqshl v1.2s, v2.2s, v4.2s", 1, 2, 4) 2280 GEN_THREEVEC_TEST(uqshl_8h_8h_8h, "uqshl v1.8h, v2.8h, v4.8h", 1, 2, 4) 2281 GEN_THREEVEC_TEST(uqshl_4h_4h_4h, "uqshl v1.4h, v2.4h, v4.4h", 1, 2, 4) 2282 GEN_THREEVEC_TEST(uqshl_16b_16b_16b, "uqshl v1.16b, v2.16b, v4.16b", 1, 2, 4) 2283 GEN_THREEVEC_TEST(uqshl_8b_8b_8b, "uqshl v1.8b, v2.8b, v4.8b", 1, 2, 4) 2284 2285 GEN_THREEVEC_TEST(sqrshl_d_d_d, "sqrshl d1, d2, d4", 1, 2, 4) 2286 GEN_THREEVEC_TEST(sqrshl_s_s_s, "sqrshl s1, s2, s4", 1, 2, 4) 2287 GEN_THREEVEC_TEST(sqrshl_h_h_h, "sqrshl h1, h2, h4", 1, 2, 4) 2288 GEN_THREEVEC_TEST(sqrshl_b_b_b, "sqrshl b1, b2, b4", 1, 2, 4) 2289 GEN_THREEVEC_TEST(sqrshl_2d_2d_2d, "sqrshl v1.2d, v2.2d, v4.2d", 1, 2, 4) 2290 GEN_THREEVEC_TEST(sqrshl_4s_4s_4s, "sqrshl v1.4s, v2.4s, v4.4s", 1, 2, 4) 2291 GEN_THREEVEC_TEST(sqrshl_2s_2s_2s, "sqrshl v1.2s, v2.2s, v4.2s", 1, 2, 4) 2292 GEN_THREEVEC_TEST(sqrshl_8h_8h_8h, "sqrshl v1.8h, v2.8h, v4.8h", 1, 2, 4) 2293 GEN_THREEVEC_TEST(sqrshl_4h_4h_4h, "sqrshl v1.4h, v2.4h, v4.4h", 1, 2, 4) 2294 GEN_THREEVEC_TEST(sqrshl_16b_16b_16b, "sqrshl v1.16b, v2.16b, v4.16b", 1, 2, 4) 2295 GEN_THREEVEC_TEST(sqrshl_8b_8b_8b, "sqrshl v1.8b, v2.8b, v4.8b", 1, 2, 4) 2296 2297 GEN_THREEVEC_TEST(uqrshl_d_d_d, "uqrshl d1, d2, d4", 1, 2, 4) 2298 GEN_THREEVEC_TEST(uqrshl_s_s_s, "uqrshl s1, s2, s4", 1, 2, 4) 2299 GEN_THREEVEC_TEST(uqrshl_h_h_h, "uqrshl h1, h2, h4", 1, 2, 4) 2300 GEN_THREEVEC_TEST(uqrshl_b_b_b, "uqrshl b1, b2, b4", 1, 2, 4) 2301 GEN_THREEVEC_TEST(uqrshl_2d_2d_2d, "uqrshl v1.2d, v2.2d, v4.2d", 1, 2, 4) 2302 GEN_THREEVEC_TEST(uqrshl_4s_4s_4s, "uqrshl v1.4s, v2.4s, v4.4s", 1, 2, 4) 2303 GEN_THREEVEC_TEST(uqrshl_2s_2s_2s, "uqrshl v1.2s, v2.2s, v4.2s", 1, 2, 4) 2304 GEN_THREEVEC_TEST(uqrshl_8h_8h_8h, "uqrshl v1.8h, v2.8h, v4.8h", 1, 2, 4) 2305 GEN_THREEVEC_TEST(uqrshl_4h_4h_4h, "uqrshl v1.4h, v2.4h, v4.4h", 1, 2, 4) 2306 GEN_THREEVEC_TEST(uqrshl_16b_16b_16b, "uqrshl v1.16b, v2.16b, v4.16b", 1, 2, 4) 2307 GEN_THREEVEC_TEST(uqrshl_8b_8b_8b, "uqrshl v1.8b, v2.8b, v4.8b", 1, 2, 4) 2308 2309 GEN_TWOVEC_TEST(sqrshrn_s_d_1, "sqrshrn s2, d5, #1", 2, 5) 2310 GEN_TWOVEC_TEST(sqrshrn_s_d_17, "sqrshrn s2, d5, #17", 2, 5) 2311 GEN_TWOVEC_TEST(sqrshrn_s_d_32, "sqrshrn s2, d5, #32", 2, 5) 2312 GEN_TWOVEC_TEST(sqrshrn_h_s_1, "sqrshrn h2, s5, #1", 2, 5) 2313 GEN_TWOVEC_TEST(sqrshrn_h_s_9, "sqrshrn h2, s5, #9", 2, 5) 2314 GEN_TWOVEC_TEST(sqrshrn_h_s_16, "sqrshrn h2, s5, #16", 2, 5) 2315 GEN_TWOVEC_TEST(sqrshrn_b_h_1, "sqrshrn b2, h5, #1", 2, 5) 2316 GEN_TWOVEC_TEST(sqrshrn_b_h_4, "sqrshrn b2, h5, #4", 2, 5) 2317 GEN_TWOVEC_TEST(sqrshrn_b_h_8, "sqrshrn b2, h5, #8", 2, 5) 2318 2319 GEN_TWOVEC_TEST(uqrshrn_s_d_1, "uqrshrn s2, d5, #1", 2, 5) 2320 GEN_TWOVEC_TEST(uqrshrn_s_d_17, "uqrshrn s2, d5, #17", 2, 5) 2321 GEN_TWOVEC_TEST(uqrshrn_s_d_32, "uqrshrn s2, d5, #32", 2, 5) 2322 GEN_TWOVEC_TEST(uqrshrn_h_s_1, "uqrshrn h2, s5, #1", 2, 5) 2323 GEN_TWOVEC_TEST(uqrshrn_h_s_9, "uqrshrn h2, s5, #9", 2, 5) 2324 GEN_TWOVEC_TEST(uqrshrn_h_s_16, "uqrshrn h2, s5, #16", 2, 5) 2325 GEN_TWOVEC_TEST(uqrshrn_b_h_1, "uqrshrn b2, h5, #1", 2, 5) 2326 GEN_TWOVEC_TEST(uqrshrn_b_h_4, "uqrshrn b2, h5, #4", 2, 5) 2327 GEN_TWOVEC_TEST(uqrshrn_b_h_8, "uqrshrn b2, h5, #8", 2, 5) 2328 2329 GEN_TWOVEC_TEST(sqshrn_s_d_1, "sqshrn s2, d5, #1", 2, 5) 2330 GEN_TWOVEC_TEST(sqshrn_s_d_17, "sqshrn s2, d5, #17", 2, 5) 2331 GEN_TWOVEC_TEST(sqshrn_s_d_32, "sqshrn s2, d5, #32", 2, 5) 2332 GEN_TWOVEC_TEST(sqshrn_h_s_1, "sqshrn h2, s5, #1", 2, 5) 2333 GEN_TWOVEC_TEST(sqshrn_h_s_9, "sqshrn h2, s5, #9", 2, 5) 2334 GEN_TWOVEC_TEST(sqshrn_h_s_16, "sqshrn h2, s5, #16", 2, 5) 2335 GEN_TWOVEC_TEST(sqshrn_b_h_1, "sqshrn b2, h5, #1", 2, 5) 2336 GEN_TWOVEC_TEST(sqshrn_b_h_4, "sqshrn b2, h5, #4", 2, 5) 2337 GEN_TWOVEC_TEST(sqshrn_b_h_8, "sqshrn b2, h5, #8", 2, 5) 2338 2339 GEN_TWOVEC_TEST(uqshrn_s_d_1, "uqshrn s2, d5, #1", 2, 5) 2340 GEN_TWOVEC_TEST(uqshrn_s_d_17, "uqshrn s2, d5, #17", 2, 5) 2341 GEN_TWOVEC_TEST(uqshrn_s_d_32, "uqshrn s2, d5, #32", 2, 5) 2342 GEN_TWOVEC_TEST(uqshrn_h_s_1, "uqshrn h2, s5, #1", 2, 5) 2343 GEN_TWOVEC_TEST(uqshrn_h_s_9, "uqshrn h2, s5, #9", 2, 5) 2344 GEN_TWOVEC_TEST(uqshrn_h_s_16, "uqshrn h2, s5, #16", 2, 5) 2345 GEN_TWOVEC_TEST(uqshrn_b_h_1, "uqshrn b2, h5, #1", 2, 5) 2346 GEN_TWOVEC_TEST(uqshrn_b_h_4, "uqshrn b2, h5, #4", 2, 5) 2347 GEN_TWOVEC_TEST(uqshrn_b_h_8, "uqshrn b2, h5, #8", 2, 5) 2348 2349 GEN_TWOVEC_TEST(sqrshrun_s_d_1, "sqrshrun s2, d5, #1", 2, 5) 2350 GEN_TWOVEC_TEST(sqrshrun_s_d_17, "sqrshrun s2, d5, #17", 2, 5) 2351 GEN_TWOVEC_TEST(sqrshrun_s_d_32, "sqrshrun s2, d5, #32", 2, 5) 2352 GEN_TWOVEC_TEST(sqrshrun_h_s_1, "sqrshrun h2, s5, #1", 2, 5) 2353 GEN_TWOVEC_TEST(sqrshrun_h_s_9, "sqrshrun h2, s5, #9", 2, 5) 2354 GEN_TWOVEC_TEST(sqrshrun_h_s_16, "sqrshrun h2, s5, #16", 2, 5) 2355 GEN_TWOVEC_TEST(sqrshrun_b_h_1, "sqrshrun b2, h5, #1", 2, 5) 2356 GEN_TWOVEC_TEST(sqrshrun_b_h_4, "sqrshrun b2, h5, #4", 2, 5) 2357 GEN_TWOVEC_TEST(sqrshrun_b_h_8, "sqrshrun b2, h5, #8", 2, 5) 2358 2359 GEN_TWOVEC_TEST(sqshrun_s_d_1, "sqshrun s2, d5, #1", 2, 5) 2360 GEN_TWOVEC_TEST(sqshrun_s_d_17, "sqshrun s2, d5, #17", 2, 5) 2361 GEN_TWOVEC_TEST(sqshrun_s_d_32, "sqshrun s2, d5, #32", 2, 5) 2362 GEN_TWOVEC_TEST(sqshrun_h_s_1, "sqshrun h2, s5, #1", 2, 5) 2363 GEN_TWOVEC_TEST(sqshrun_h_s_9, "sqshrun h2, s5, #9", 2, 5) 2364 GEN_TWOVEC_TEST(sqshrun_h_s_16, "sqshrun h2, s5, #16", 2, 5) 2365 GEN_TWOVEC_TEST(sqshrun_b_h_1, "sqshrun b2, h5, #1", 2, 5) 2366 GEN_TWOVEC_TEST(sqshrun_b_h_4, "sqshrun b2, h5, #4", 2, 5) 2367 GEN_TWOVEC_TEST(sqshrun_b_h_8, "sqshrun b2, h5, #8", 2, 5) 2368 2369 GEN_TWOVEC_TEST(sqrshrn_2s_2d_1, "sqrshrn v4.2s, v29.2d, #1", 4, 29) 2370 GEN_TWOVEC_TEST(sqrshrn_2s_2d_17, "sqrshrn v4.2s, v29.2d, #17", 4, 29) 2371 GEN_TWOVEC_TEST(sqrshrn_2s_2d_32, "sqrshrn v4.2s, v29.2d, #32", 4, 29) 2372 GEN_TWOVEC_TEST(sqrshrn2_4s_2d_1, "sqrshrn2 v4.4s, v29.2d, #1", 4, 29) 2373 GEN_TWOVEC_TEST(sqrshrn2_4s_2d_17, "sqrshrn2 v4.4s, v29.2d, #17", 4, 29) 2374 GEN_TWOVEC_TEST(sqrshrn2_4s_2d_32, "sqrshrn2 v4.4s, v29.2d, #32", 4, 29) 2375 GEN_TWOVEC_TEST(sqrshrn_4h_4s_1, "sqrshrn v4.4h, v29.4s, #1", 4, 29) 2376 GEN_TWOVEC_TEST(sqrshrn_4h_4s_9, "sqrshrn v4.4h, v29.4s, #9", 4, 29) 2377 GEN_TWOVEC_TEST(sqrshrn_4h_4s_16, "sqrshrn v4.4h, v29.4s, #16", 4, 29) 2378 GEN_TWOVEC_TEST(sqrshrn2_8h_4s_1, "sqrshrn2 v4.8h, v29.4s, #1", 4, 29) 2379 GEN_TWOVEC_TEST(sqrshrn2_8h_4s_9, "sqrshrn2 v4.8h, v29.4s, #9", 4, 29) 2380 GEN_TWOVEC_TEST(sqrshrn2_8h_4s_16, "sqrshrn2 v4.8h, v29.4s, #16", 4, 29) 2381 GEN_TWOVEC_TEST(sqrshrn_8b_8h_1, "sqrshrn v4.8b, v29.8h, #1", 4, 29) 2382 GEN_TWOVEC_TEST(sqrshrn_8b_8h_4, "sqrshrn v4.8b, v29.8h, #4", 4, 29) 2383 GEN_TWOVEC_TEST(sqrshrn_8b_8h_8, "sqrshrn v4.8b, v29.8h, #8", 4, 29) 2384 GEN_TWOVEC_TEST(sqrshrn2_16b_8h_1, "sqrshrn2 v4.16b, v29.8h, #1", 4, 29) 2385 GEN_TWOVEC_TEST(sqrshrn2_16b_8h_4, "sqrshrn2 v4.16b, v29.8h, #4", 4, 29) 2386 GEN_TWOVEC_TEST(sqrshrn2_16b_8h_8, "sqrshrn2 v4.16b, v29.8h, #8", 4, 29) 2387 2388 GEN_TWOVEC_TEST(uqrshrn_2s_2d_1, "uqrshrn v4.2s, v29.2d, #1", 4, 29) 2389 GEN_TWOVEC_TEST(uqrshrn_2s_2d_17, "uqrshrn v4.2s, v29.2d, #17", 4, 29) 2390 GEN_TWOVEC_TEST(uqrshrn_2s_2d_32, "uqrshrn v4.2s, v29.2d, #32", 4, 29) 2391 GEN_TWOVEC_TEST(uqrshrn2_4s_2d_1, "uqrshrn2 v4.4s, v29.2d, #1", 4, 29) 2392 GEN_TWOVEC_TEST(uqrshrn2_4s_2d_17, "uqrshrn2 v4.4s, v29.2d, #17", 4, 29) 2393 GEN_TWOVEC_TEST(uqrshrn2_4s_2d_32, "uqrshrn2 v4.4s, v29.2d, #32", 4, 29) 2394 GEN_TWOVEC_TEST(uqrshrn_4h_4s_1, "uqrshrn v4.4h, v29.4s, #1", 4, 29) 2395 GEN_TWOVEC_TEST(uqrshrn_4h_4s_9, "uqrshrn v4.4h, v29.4s, #9", 4, 29) 2396 GEN_TWOVEC_TEST(uqrshrn_4h_4s_16, "uqrshrn v4.4h, v29.4s, #16", 4, 29) 2397 GEN_TWOVEC_TEST(uqrshrn2_8h_4s_1, "uqrshrn2 v4.8h, v29.4s, #1", 4, 29) 2398 GEN_TWOVEC_TEST(uqrshrn2_8h_4s_9, "uqrshrn2 v4.8h, v29.4s, #9", 4, 29) 2399 GEN_TWOVEC_TEST(uqrshrn2_8h_4s_16, "uqrshrn2 v4.8h, v29.4s, #16", 4, 29) 2400 GEN_TWOVEC_TEST(uqrshrn_8b_8h_1, "uqrshrn v4.8b, v29.8h, #1", 4, 29) 2401 GEN_TWOVEC_TEST(uqrshrn_8b_8h_4, "uqrshrn v4.8b, v29.8h, #4", 4, 29) 2402 GEN_TWOVEC_TEST(uqrshrn_8b_8h_8, "uqrshrn v4.8b, v29.8h, #8", 4, 29) 2403 GEN_TWOVEC_TEST(uqrshrn2_16b_8h_1, "uqrshrn2 v4.16b, v29.8h, #1", 4, 29) 2404 GEN_TWOVEC_TEST(uqrshrn2_16b_8h_4, "uqrshrn2 v4.16b, v29.8h, #4", 4, 29) 2405 GEN_TWOVEC_TEST(uqrshrn2_16b_8h_8, "uqrshrn2 v4.16b, v29.8h, #8", 4, 29) 2406 2407 GEN_TWOVEC_TEST(sqshrn_2s_2d_1, "sqshrn v4.2s, v29.2d, #1", 4, 29) 2408 GEN_TWOVEC_TEST(sqshrn_2s_2d_17, "sqshrn v4.2s, v29.2d, #17", 4, 29) 2409 GEN_TWOVEC_TEST(sqshrn_2s_2d_32, "sqshrn v4.2s, v29.2d, #32", 4, 29) 2410 GEN_TWOVEC_TEST(sqshrn2_4s_2d_1, "sqshrn2 v4.4s, v29.2d, #1", 4, 29) 2411 GEN_TWOVEC_TEST(sqshrn2_4s_2d_17, "sqshrn2 v4.4s, v29.2d, #17", 4, 29) 2412 GEN_TWOVEC_TEST(sqshrn2_4s_2d_32, "sqshrn2 v4.4s, v29.2d, #32", 4, 29) 2413 GEN_TWOVEC_TEST(sqshrn_4h_4s_1, "sqshrn v4.4h, v29.4s, #1", 4, 29) 2414 GEN_TWOVEC_TEST(sqshrn_4h_4s_9, "sqshrn v4.4h, v29.4s, #9", 4, 29) 2415 GEN_TWOVEC_TEST(sqshrn_4h_4s_16, "sqshrn v4.4h, v29.4s, #16", 4, 29) 2416 GEN_TWOVEC_TEST(sqshrn2_8h_4s_1, "sqshrn2 v4.8h, v29.4s, #1", 4, 29) 2417 GEN_TWOVEC_TEST(sqshrn2_8h_4s_9, "sqshrn2 v4.8h, v29.4s, #9", 4, 29) 2418 GEN_TWOVEC_TEST(sqshrn2_8h_4s_16, "sqshrn2 v4.8h, v29.4s, #16", 4, 29) 2419 GEN_TWOVEC_TEST(sqshrn_8b_8h_1, "sqshrn v4.8b, v29.8h, #1", 4, 29) 2420 GEN_TWOVEC_TEST(sqshrn_8b_8h_4, "sqshrn v4.8b, v29.8h, #4", 4, 29) 2421 GEN_TWOVEC_TEST(sqshrn_8b_8h_8, "sqshrn v4.8b, v29.8h, #8", 4, 29) 2422 GEN_TWOVEC_TEST(sqshrn2_16b_8h_1, "sqshrn2 v4.16b, v29.8h, #1", 4, 29) 2423 GEN_TWOVEC_TEST(sqshrn2_16b_8h_4, "sqshrn2 v4.16b, v29.8h, #4", 4, 29) 2424 GEN_TWOVEC_TEST(sqshrn2_16b_8h_8, "sqshrn2 v4.16b, v29.8h, #8", 4, 29) 2425 2426 GEN_TWOVEC_TEST(uqshrn_2s_2d_1, "uqshrn v4.2s, v29.2d, #1", 4, 29) 2427 GEN_TWOVEC_TEST(uqshrn_2s_2d_17, "uqshrn v4.2s, v29.2d, #17", 4, 29) 2428 GEN_TWOVEC_TEST(uqshrn_2s_2d_32, "uqshrn v4.2s, v29.2d, #32", 4, 29) 2429 GEN_TWOVEC_TEST(uqshrn2_4s_2d_1, "uqshrn2 v4.4s, v29.2d, #1", 4, 29) 2430 GEN_TWOVEC_TEST(uqshrn2_4s_2d_17, "uqshrn2 v4.4s, v29.2d, #17", 4, 29) 2431 GEN_TWOVEC_TEST(uqshrn2_4s_2d_32, "uqshrn2 v4.4s, v29.2d, #32", 4, 29) 2432 GEN_TWOVEC_TEST(uqshrn_4h_4s_1, "uqshrn v4.4h, v29.4s, #1", 4, 29) 2433 GEN_TWOVEC_TEST(uqshrn_4h_4s_9, "uqshrn v4.4h, v29.4s, #9", 4, 29) 2434 GEN_TWOVEC_TEST(uqshrn_4h_4s_16, "uqshrn v4.4h, v29.4s, #16", 4, 29) 2435 GEN_TWOVEC_TEST(uqshrn2_8h_4s_1, "uqshrn2 v4.8h, v29.4s, #1", 4, 29) 2436 GEN_TWOVEC_TEST(uqshrn2_8h_4s_9, "uqshrn2 v4.8h, v29.4s, #9", 4, 29) 2437 GEN_TWOVEC_TEST(uqshrn2_8h_4s_16, "uqshrn2 v4.8h, v29.4s, #16", 4, 29) 2438 GEN_TWOVEC_TEST(uqshrn_8b_8h_1, "uqshrn v4.8b, v29.8h, #1", 4, 29) 2439 GEN_TWOVEC_TEST(uqshrn_8b_8h_4, "uqshrn v4.8b, v29.8h, #4", 4, 29) 2440 GEN_TWOVEC_TEST(uqshrn_8b_8h_8, "uqshrn v4.8b, v29.8h, #8", 4, 29) 2441 GEN_TWOVEC_TEST(uqshrn2_16b_8h_1, "uqshrn2 v4.16b, v29.8h, #1", 4, 29) 2442 GEN_TWOVEC_TEST(uqshrn2_16b_8h_4, "uqshrn2 v4.16b, v29.8h, #4", 4, 29) 2443 GEN_TWOVEC_TEST(uqshrn2_16b_8h_8, "uqshrn2 v4.16b, v29.8h, #8", 4, 29) 2444 2445 GEN_TWOVEC_TEST(sqrshrun_2s_2d_1, "sqrshrun v4.2s, v29.2d, #1", 4, 29) 2446 GEN_TWOVEC_TEST(sqrshrun_2s_2d_17, "sqrshrun v4.2s, v29.2d, #17", 4, 29) 2447 GEN_TWOVEC_TEST(sqrshrun_2s_2d_32, "sqrshrun v4.2s, v29.2d, #32", 4, 29) 2448 GEN_TWOVEC_TEST(sqrshrun2_4s_2d_1, "sqrshrun2 v4.4s, v29.2d, #1", 4, 29) 2449 GEN_TWOVEC_TEST(sqrshrun2_4s_2d_17, "sqrshrun2 v4.4s, v29.2d, #17", 4, 29) 2450 GEN_TWOVEC_TEST(sqrshrun2_4s_2d_32, "sqrshrun2 v4.4s, v29.2d, #32", 4, 29) 2451 GEN_TWOVEC_TEST(sqrshrun_4h_4s_1, "sqrshrun v4.4h, v29.4s, #1", 4, 29) 2452 GEN_TWOVEC_TEST(sqrshrun_4h_4s_9, "sqrshrun v4.4h, v29.4s, #9", 4, 29) 2453 GEN_TWOVEC_TEST(sqrshrun_4h_4s_16, "sqrshrun v4.4h, v29.4s, #16", 4, 29) 2454 GEN_TWOVEC_TEST(sqrshrun2_8h_4s_1, "sqrshrun2 v4.8h, v29.4s, #1", 4, 29) 2455 GEN_TWOVEC_TEST(sqrshrun2_8h_4s_9, "sqrshrun2 v4.8h, v29.4s, #9", 4, 29) 2456 GEN_TWOVEC_TEST(sqrshrun2_8h_4s_16, "sqrshrun2 v4.8h, v29.4s, #16", 4, 29) 2457 GEN_TWOVEC_TEST(sqrshrun_8b_8h_1, "sqrshrun v4.8b, v29.8h, #1", 4, 29) 2458 GEN_TWOVEC_TEST(sqrshrun_8b_8h_4, "sqrshrun v4.8b, v29.8h, #4", 4, 29) 2459 GEN_TWOVEC_TEST(sqrshrun_8b_8h_8, "sqrshrun v4.8b, v29.8h, #8", 4, 29) 2460 GEN_TWOVEC_TEST(sqrshrun2_16b_8h_1, "sqrshrun2 v4.16b, v29.8h, #1", 4, 29) 2461 GEN_TWOVEC_TEST(sqrshrun2_16b_8h_4, "sqrshrun2 v4.16b, v29.8h, #4", 4, 29) 2462 GEN_TWOVEC_TEST(sqrshrun2_16b_8h_8, "sqrshrun2 v4.16b, v29.8h, #8", 4, 29) 2463 2464 GEN_TWOVEC_TEST(sqshrun_2s_2d_1, "sqshrun v4.2s, v29.2d, #1", 4, 29) 2465 GEN_TWOVEC_TEST(sqshrun_2s_2d_17, "sqshrun v4.2s, v29.2d, #17", 4, 29) 2466 GEN_TWOVEC_TEST(sqshrun_2s_2d_32, "sqshrun v4.2s, v29.2d, #32", 4, 29) 2467 GEN_TWOVEC_TEST(sqshrun2_4s_2d_1, "sqshrun2 v4.4s, v29.2d, #1", 4, 29) 2468 GEN_TWOVEC_TEST(sqshrun2_4s_2d_17, "sqshrun2 v4.4s, v29.2d, #17", 4, 29) 2469 GEN_TWOVEC_TEST(sqshrun2_4s_2d_32, "sqshrun2 v4.4s, v29.2d, #32", 4, 29) 2470 GEN_TWOVEC_TEST(sqshrun_4h_4s_1, "sqshrun v4.4h, v29.4s, #1", 4, 29) 2471 GEN_TWOVEC_TEST(sqshrun_4h_4s_9, "sqshrun v4.4h, v29.4s, #9", 4, 29) 2472 GEN_TWOVEC_TEST(sqshrun_4h_4s_16, "sqshrun v4.4h, v29.4s, #16", 4, 29) 2473 GEN_TWOVEC_TEST(sqshrun2_8h_4s_1, "sqshrun2 v4.8h, v29.4s, #1", 4, 29) 2474 GEN_TWOVEC_TEST(sqshrun2_8h_4s_9, "sqshrun2 v4.8h, v29.4s, #9", 4, 29) 2475 GEN_TWOVEC_TEST(sqshrun2_8h_4s_16, "sqshrun2 v4.8h, v29.4s, #16", 4, 29) 2476 GEN_TWOVEC_TEST(sqshrun_8b_8h_1, "sqshrun v4.8b, v29.8h, #1", 4, 29) 2477 GEN_TWOVEC_TEST(sqshrun_8b_8h_4, "sqshrun v4.8b, v29.8h, #4", 4, 29) 2478 GEN_TWOVEC_TEST(sqshrun_8b_8h_8, "sqshrun v4.8b, v29.8h, #8", 4, 29) 2479 GEN_TWOVEC_TEST(sqshrun2_16b_8h_1, "sqshrun2 v4.16b, v29.8h, #1", 4, 29) 2480 GEN_TWOVEC_TEST(sqshrun2_16b_8h_4, "sqshrun2 v4.16b, v29.8h, #4", 4, 29) 2481 GEN_TWOVEC_TEST(sqshrun2_16b_8h_8, "sqshrun2 v4.16b, v29.8h, #8", 4, 29) 2482 2483 GEN_TWOVEC_TEST(sqshl_d_d_0, "sqshl d5, d28, #0", 5, 28) 2484 GEN_TWOVEC_TEST(sqshl_d_d_32, "sqshl d5, d28, #32", 5, 28) 2485 GEN_TWOVEC_TEST(sqshl_d_d_63, "sqshl d5, d28, #63", 5, 28) 2486 GEN_TWOVEC_TEST(sqshl_s_s_0, "sqshl s5, s28, #0", 5, 28) 2487 GEN_TWOVEC_TEST(sqshl_s_s_16, "sqshl s5, s28, #16", 5, 28) 2488 GEN_TWOVEC_TEST(sqshl_s_s_31, "sqshl s5, s28, #31", 5, 28) 2489 GEN_TWOVEC_TEST(sqshl_h_h_0, "sqshl h5, h28, #0", 5, 28) 2490 GEN_TWOVEC_TEST(sqshl_h_h_8, "sqshl h5, h28, #8", 5, 28) 2491 GEN_TWOVEC_TEST(sqshl_h_h_15, "sqshl h5, h28, #15", 5, 28) 2492 GEN_TWOVEC_TEST(sqshl_b_b_0, "sqshl b5, b28, #0", 5, 28) 2493 GEN_TWOVEC_TEST(sqshl_b_b_4, "sqshl b5, b28, #4", 5, 28) 2494 GEN_TWOVEC_TEST(sqshl_b_b_7, "sqshl b5, b28, #7", 5, 28) 2495 2496 GEN_TWOVEC_TEST(uqshl_d_d_0, "uqshl d5, d28, #0", 5, 28) 2497 GEN_TWOVEC_TEST(uqshl_d_d_32, "uqshl d5, d28, #32", 5, 28) 2498 GEN_TWOVEC_TEST(uqshl_d_d_63, "uqshl d5, d28, #63", 5, 28) 2499 GEN_TWOVEC_TEST(uqshl_s_s_0, "uqshl s5, s28, #0", 5, 28) 2500 GEN_TWOVEC_TEST(uqshl_s_s_16, "uqshl s5, s28, #16", 5, 28) 2501 GEN_TWOVEC_TEST(uqshl_s_s_31, "uqshl s5, s28, #31", 5, 28) 2502 GEN_TWOVEC_TEST(uqshl_h_h_0, "uqshl h5, h28, #0", 5, 28) 2503 GEN_TWOVEC_TEST(uqshl_h_h_8, "uqshl h5, h28, #8", 5, 28) 2504 GEN_TWOVEC_TEST(uqshl_h_h_15, "uqshl h5, h28, #15", 5, 28) 2505 GEN_TWOVEC_TEST(uqshl_b_b_0, "uqshl b5, b28, #0", 5, 28) 2506 GEN_TWOVEC_TEST(uqshl_b_b_4, "uqshl b5, b28, #4", 5, 28) 2507 GEN_TWOVEC_TEST(uqshl_b_b_7, "uqshl b5, b28, #7", 5, 28) 2508 2509 GEN_TWOVEC_TEST(sqshlu_d_d_0, "sqshlu d5, d28, #0", 5, 28) 2510 GEN_TWOVEC_TEST(sqshlu_d_d_32, "sqshlu d5, d28, #32", 5, 28) 2511 GEN_TWOVEC_TEST(sqshlu_d_d_63, "sqshlu d5, d28, #63", 5, 28) 2512 GEN_TWOVEC_TEST(sqshlu_s_s_0, "sqshlu s5, s28, #0", 5, 28) 2513 GEN_TWOVEC_TEST(sqshlu_s_s_16, "sqshlu s5, s28, #16", 5, 28) 2514 GEN_TWOVEC_TEST(sqshlu_s_s_31, "sqshlu s5, s28, #31", 5, 28) 2515 GEN_TWOVEC_TEST(sqshlu_h_h_0, "sqshlu h5, h28, #0", 5, 28) 2516 GEN_TWOVEC_TEST(sqshlu_h_h_8, "sqshlu h5, h28, #8", 5, 28) 2517 GEN_TWOVEC_TEST(sqshlu_h_h_15, "sqshlu h5, h28, #15", 5, 28) 2518 GEN_TWOVEC_TEST(sqshlu_b_b_0, "sqshlu b5, b28, #0", 5, 28) 2519 GEN_TWOVEC_TEST(sqshlu_b_b_4, "sqshlu b5, b28, #4", 5, 28) 2520 GEN_TWOVEC_TEST(sqshlu_b_b_7, "sqshlu b5, b28, #7", 5, 28) 2521 2522 GEN_TWOVEC_TEST(sqshl_2d_2d_0, "sqshl v6.2d, v27.2d, #0", 6, 27) 2523 GEN_TWOVEC_TEST(sqshl_2d_2d_32, "sqshl v6.2d, v27.2d, #32", 6, 27) 2524 GEN_TWOVEC_TEST(sqshl_2d_2d_63, "sqshl v6.2d, v27.2d, #63", 6, 27) 2525 GEN_TWOVEC_TEST(sqshl_4s_4s_0, "sqshl v6.4s, v27.4s, #0", 6, 27) 2526 GEN_TWOVEC_TEST(sqshl_4s_4s_16, "sqshl v6.4s, v27.4s, #16", 6, 27) 2527 GEN_TWOVEC_TEST(sqshl_4s_4s_31, "sqshl v6.4s, v27.4s, #31", 6, 27) 2528 GEN_TWOVEC_TEST(sqshl_2s_2s_0, "sqshl v6.2s, v27.2s, #0", 6, 27) 2529 GEN_TWOVEC_TEST(sqshl_2s_2s_16, "sqshl v6.2s, v27.2s, #16", 6, 27) 2530 GEN_TWOVEC_TEST(sqshl_2s_2s_31, "sqshl v6.2s, v27.2s, #31", 6, 27) 2531 GEN_TWOVEC_TEST(sqshl_8h_8h_0, "sqshl v6.8h, v27.8h, #0", 6, 27) 2532 GEN_TWOVEC_TEST(sqshl_8h_8h_8, "sqshl v6.8h, v27.8h, #8", 6, 27) 2533 GEN_TWOVEC_TEST(sqshl_8h_8h_15, "sqshl v6.8h, v27.8h, #15", 6, 27) 2534 GEN_TWOVEC_TEST(sqshl_4h_4h_0, "sqshl v6.4h, v27.4h, #0", 6, 27) 2535 GEN_TWOVEC_TEST(sqshl_4h_4h_8, "sqshl v6.4h, v27.4h, #8", 6, 27) 2536 GEN_TWOVEC_TEST(sqshl_4h_4h_15, "sqshl v6.4h, v27.4h, #15", 6, 27) 2537 GEN_TWOVEC_TEST(sqshl_16b_16b_0, "sqshl v6.16b, v27.16b, #0", 6, 27) 2538 GEN_TWOVEC_TEST(sqshl_16b_16b_3, "sqshl v6.16b, v27.16b, #3", 6, 27) 2539 GEN_TWOVEC_TEST(sqshl_16b_16b_7, "sqshl v6.16b, v27.16b, #7", 6, 27) 2540 GEN_TWOVEC_TEST(sqshl_8b_8b_0, "sqshl v6.8b, v27.8b, #0", 6, 27) 2541 GEN_TWOVEC_TEST(sqshl_8b_8b_3, "sqshl v6.8b, v27.8b, #3", 6, 27) 2542 GEN_TWOVEC_TEST(sqshl_8b_8b_7, "sqshl v6.8b, v27.8b, #7", 6, 27) 2543 2544 GEN_TWOVEC_TEST(uqshl_2d_2d_0, "uqshl v6.2d, v27.2d, #0", 6, 27) 2545 GEN_TWOVEC_TEST(uqshl_2d_2d_32, "uqshl v6.2d, v27.2d, #32", 6, 27) 2546 GEN_TWOVEC_TEST(uqshl_2d_2d_63, "uqshl v6.2d, v27.2d, #63", 6, 27) 2547 GEN_TWOVEC_TEST(uqshl_4s_4s_0, "uqshl v6.4s, v27.4s, #0", 6, 27) 2548 GEN_TWOVEC_TEST(uqshl_4s_4s_16, "uqshl v6.4s, v27.4s, #16", 6, 27) 2549 GEN_TWOVEC_TEST(uqshl_4s_4s_31, "uqshl v6.4s, v27.4s, #31", 6, 27) 2550 GEN_TWOVEC_TEST(uqshl_2s_2s_0, "uqshl v6.2s, v27.2s, #0", 6, 27) 2551 GEN_TWOVEC_TEST(uqshl_2s_2s_16, "uqshl v6.2s, v27.2s, #16", 6, 27) 2552 GEN_TWOVEC_TEST(uqshl_2s_2s_31, "uqshl v6.2s, v27.2s, #31", 6, 27) 2553 GEN_TWOVEC_TEST(uqshl_8h_8h_0, "uqshl v6.8h, v27.8h, #0", 6, 27) 2554 GEN_TWOVEC_TEST(uqshl_8h_8h_8, "uqshl v6.8h, v27.8h, #8", 6, 27) 2555 GEN_TWOVEC_TEST(uqshl_8h_8h_15, "uqshl v6.8h, v27.8h, #15", 6, 27) 2556 GEN_TWOVEC_TEST(uqshl_4h_4h_0, "uqshl v6.4h, v27.4h, #0", 6, 27) 2557 GEN_TWOVEC_TEST(uqshl_4h_4h_8, "uqshl v6.4h, v27.4h, #8", 6, 27) 2558 GEN_TWOVEC_TEST(uqshl_4h_4h_15, "uqshl v6.4h, v27.4h, #15", 6, 27) 2559 GEN_TWOVEC_TEST(uqshl_16b_16b_0, "uqshl v6.16b, v27.16b, #0", 6, 27) 2560 GEN_TWOVEC_TEST(uqshl_16b_16b_3, "uqshl v6.16b, v27.16b, #3", 6, 27) 2561 GEN_TWOVEC_TEST(uqshl_16b_16b_7, "uqshl v6.16b, v27.16b, #7", 6, 27) 2562 GEN_TWOVEC_TEST(uqshl_8b_8b_0, "uqshl v6.8b, v27.8b, #0", 6, 27) 2563 GEN_TWOVEC_TEST(uqshl_8b_8b_3, "uqshl v6.8b, v27.8b, #3", 6, 27) 2564 GEN_TWOVEC_TEST(uqshl_8b_8b_7, "uqshl v6.8b, v27.8b, #7", 6, 27) 2565 2566 GEN_TWOVEC_TEST(sqshlu_2d_2d_0, "sqshlu v6.2d, v27.2d, #0", 6, 27) 2567 GEN_TWOVEC_TEST(sqshlu_2d_2d_32, "sqshlu v6.2d, v27.2d, #32", 6, 27) 2568 GEN_TWOVEC_TEST(sqshlu_2d_2d_63, "sqshlu v6.2d, v27.2d, #63", 6, 27) 2569 GEN_TWOVEC_TEST(sqshlu_4s_4s_0, "sqshlu v6.4s, v27.4s, #0", 6, 27) 2570 GEN_TWOVEC_TEST(sqshlu_4s_4s_16, "sqshlu v6.4s, v27.4s, #16", 6, 27) 2571 GEN_TWOVEC_TEST(sqshlu_4s_4s_31, "sqshlu v6.4s, v27.4s, #31", 6, 27) 2572 GEN_TWOVEC_TEST(sqshlu_2s_2s_0, "sqshlu v6.2s, v27.2s, #0", 6, 27) 2573 GEN_TWOVEC_TEST(sqshlu_2s_2s_16, "sqshlu v6.2s, v27.2s, #16", 6, 27) 2574 GEN_TWOVEC_TEST(sqshlu_2s_2s_31, "sqshlu v6.2s, v27.2s, #31", 6, 27) 2575 GEN_TWOVEC_TEST(sqshlu_8h_8h_0, "sqshlu v6.8h, v27.8h, #0", 6, 27) 2576 GEN_TWOVEC_TEST(sqshlu_8h_8h_8, "sqshlu v6.8h, v27.8h, #8", 6, 27) 2577 GEN_TWOVEC_TEST(sqshlu_8h_8h_15, "sqshlu v6.8h, v27.8h, #15", 6, 27) 2578 GEN_TWOVEC_TEST(sqshlu_4h_4h_0, "sqshlu v6.4h, v27.4h, #0", 6, 27) 2579 GEN_TWOVEC_TEST(sqshlu_4h_4h_8, "sqshlu v6.4h, v27.4h, #8", 6, 27) 2580 GEN_TWOVEC_TEST(sqshlu_4h_4h_15, "sqshlu v6.4h, v27.4h, #15", 6, 27) 2581 GEN_TWOVEC_TEST(sqshlu_16b_16b_0, "sqshlu v6.16b, v27.16b, #0", 6, 27) 2582 GEN_TWOVEC_TEST(sqshlu_16b_16b_3, "sqshlu v6.16b, v27.16b, #3", 6, 27) 2583 GEN_TWOVEC_TEST(sqshlu_16b_16b_7, "sqshlu v6.16b, v27.16b, #7", 6, 27) 2584 GEN_TWOVEC_TEST(sqshlu_8b_8b_0, "sqshlu v6.8b, v27.8b, #0", 6, 27) 2585 GEN_TWOVEC_TEST(sqshlu_8b_8b_3, "sqshlu v6.8b, v27.8b, #3", 6, 27) 2586 GEN_TWOVEC_TEST(sqshlu_8b_8b_7, "sqshlu v6.8b, v27.8b, #7", 6, 27) 2587 2588 GEN_TWOVEC_TEST(sqxtn_s_d, "sqxtn s31, d0", 31, 0) 2589 GEN_TWOVEC_TEST(sqxtn_h_s, "sqxtn h31, s0", 31, 0) 2590 GEN_TWOVEC_TEST(sqxtn_b_h, "sqxtn b31, h0", 31, 0) 2591 GEN_TWOVEC_TEST(uqxtn_s_d, "uqxtn s31, d0", 31, 0) 2592 GEN_TWOVEC_TEST(uqxtn_h_s, "uqxtn h31, s0", 31, 0) 2593 GEN_TWOVEC_TEST(uqxtn_b_h, "uqxtn b31, h0", 31, 0) 2594 GEN_TWOVEC_TEST(sqxtun_s_d, "sqxtun s31, d0", 31, 0) 2595 GEN_TWOVEC_TEST(sqxtun_h_s, "sqxtun h31, s0", 31, 0) 2596 GEN_TWOVEC_TEST(sqxtun_b_h, "sqxtun b31, h0", 31, 0) 2597 2598 GEN_UNARY_TEST(sqxtn, 2s, 2d) 2599 GEN_UNARY_TEST(sqxtn2, 4s, 2d) 2600 GEN_UNARY_TEST(sqxtn, 4h, 4s) 2601 GEN_UNARY_TEST(sqxtn2, 8h, 4s) 2602 GEN_UNARY_TEST(sqxtn, 8b, 8h) 2603 GEN_UNARY_TEST(sqxtn2, 16b, 8h) 2604 2605 GEN_UNARY_TEST(uqxtn, 2s, 2d) 2606 GEN_UNARY_TEST(uqxtn2, 4s, 2d) 2607 GEN_UNARY_TEST(uqxtn, 4h, 4s) 2608 GEN_UNARY_TEST(uqxtn2, 8h, 4s) 2609 GEN_UNARY_TEST(uqxtn, 8b, 8h) 2610 GEN_UNARY_TEST(uqxtn2, 16b, 8h) 2611 2612 GEN_UNARY_TEST(sqxtun, 2s, 2d) 2613 GEN_UNARY_TEST(sqxtun2, 4s, 2d) 2614 GEN_UNARY_TEST(sqxtun, 4h, 4s) 2615 GEN_UNARY_TEST(sqxtun2, 8h, 4s) 2616 GEN_UNARY_TEST(sqxtun, 8b, 8h) 2617 GEN_UNARY_TEST(sqxtun2, 16b, 8h) 2618 2619 GEN_THREEVEC_TEST(srhadd_4s_4s_4s,"srhadd v2.4s, v11.4s, v29.4s", 2, 11, 29) 2620 GEN_THREEVEC_TEST(srhadd_2s_2s_2s,"srhadd v2.2s, v11.2s, v29.2s", 2, 11, 29) 2621 GEN_THREEVEC_TEST(srhadd_8h_8h_8h,"srhadd v2.8h, v11.8h, v29.8h", 2, 11, 29) 2622 GEN_THREEVEC_TEST(srhadd_4h_4h_4h,"srhadd v2.4h, v11.4h, v29.4h", 2, 11, 29) 2623 GEN_THREEVEC_TEST(srhadd_16b_16b_16b, 2624 "srhadd v2.16b, v11.16b, v29.16b", 2, 11, 29) 2625 GEN_THREEVEC_TEST(srhadd_8b_8b_8b,"srhadd v2.8b, v11.8b, v29.8b", 2, 11, 29) 2626 2627 GEN_THREEVEC_TEST(urhadd_4s_4s_4s,"urhadd v2.4s, v11.4s, v29.4s", 2, 11, 29) 2628 GEN_THREEVEC_TEST(urhadd_2s_2s_2s,"urhadd v2.2s, v11.2s, v29.2s", 2, 11, 29) 2629 GEN_THREEVEC_TEST(urhadd_8h_8h_8h,"urhadd v2.8h, v11.8h, v29.8h", 2, 11, 29) 2630 GEN_THREEVEC_TEST(urhadd_4h_4h_4h,"urhadd v2.4h, v11.4h, v29.4h", 2, 11, 29) 2631 GEN_THREEVEC_TEST(urhadd_16b_16b_16b, 2632 "urhadd v2.16b, v11.16b, v29.16b", 2, 11, 29) 2633 GEN_THREEVEC_TEST(urhadd_8b_8b_8b,"urhadd v2.8b, v11.8b, v29.8b", 2, 11, 29) 2634 2635 GEN_THREEVEC_TEST(sshl_d_d_d, "sshl d29, d28, d27", 29, 28, 27) 2636 GEN_THREEVEC_TEST(ushl_d_d_d, "ushl d29, d28, d27", 29, 28, 27) 2637 2638 GEN_THREEVEC_TEST(sshl_2d_2d_2d, "sshl v29.2d, v28.2d, v27.2d", 29,28,27) 2639 GEN_THREEVEC_TEST(sshl_4s_4s_4s, "sshl v29.4s, v28.4s, v27.4s", 29,28,27) 2640 GEN_THREEVEC_TEST(sshl_2s_2s_2s, "sshl v29.2s, v28.2s, v27.2s", 29,28,27) 2641 GEN_THREEVEC_TEST(sshl_8h_8h_8h, "sshl v29.8h, v28.8h, v27.8h", 29,28,27) 2642 GEN_THREEVEC_TEST(sshl_4h_4h_4h, "sshl v29.4h, v28.4h, v27.4h", 29,28,27) 2643 GEN_THREEVEC_TEST(sshl_16b_16b_16b, "sshl v29.16b, v28.16b, v27.16b", 29,28,27) 2644 GEN_THREEVEC_TEST(sshl_8b_8b_8b, "sshl v29.8b, v28.8b, v27.8b", 29,28,27) 2645 2646 GEN_THREEVEC_TEST(ushl_2d_2d_2d, "ushl v29.2d, v28.2d, v27.2d", 29,28,27) 2647 GEN_THREEVEC_TEST(ushl_4s_4s_4s, "ushl v29.4s, v28.4s, v27.4s", 29,28,27) 2648 GEN_THREEVEC_TEST(ushl_2s_2s_2s, "ushl v29.2s, v28.2s, v27.2s", 29,28,27) 2649 GEN_THREEVEC_TEST(ushl_8h_8h_8h, "ushl v29.8h, v28.8h, v27.8h", 29,28,27) 2650 GEN_THREEVEC_TEST(ushl_4h_4h_4h, "ushl v29.4h, v28.4h, v27.4h", 29,28,27) 2651 GEN_THREEVEC_TEST(ushl_16b_16b_16b, "ushl v29.16b, v28.16b, v27.16b", 29,28,27) 2652 GEN_THREEVEC_TEST(ushl_8b_8b_8b, "ushl v29.8b, v28.8b, v27.8b", 29,28,27) 2653 2654 GEN_TWOVEC_TEST(shl_d_d_0, "shl d5, d28, #0", 5, 28) 2655 GEN_TWOVEC_TEST(shl_d_d_32, "shl d5, d28, #32", 5, 28) 2656 GEN_TWOVEC_TEST(shl_d_d_63, "shl d5, d28, #63", 5, 28) 2657 2658 GEN_TWOVEC_TEST(sshr_d_d_1, "sshr d5, d28, #1", 5, 28) 2659 GEN_TWOVEC_TEST(sshr_d_d_32, "sshr d5, d28, #32", 5, 28) 2660 GEN_TWOVEC_TEST(sshr_d_d_64, "sshr d5, d28, #64", 5, 28) 2661 2662 GEN_TWOVEC_TEST(ushr_d_d_1, "ushr d5, d28, #1", 5, 28) 2663 GEN_TWOVEC_TEST(ushr_d_d_32, "ushr d5, d28, #32", 5, 28) 2664 GEN_TWOVEC_TEST(ushr_d_d_64, "ushr d5, d28, #64", 5, 28) 2665 2666 GEN_TWOVEC_TEST(ssra_d_d_1, "ssra d5, d28, #1", 5, 28) 2667 GEN_TWOVEC_TEST(ssra_d_d_32, "ssra d5, d28, #32", 5, 28) 2668 GEN_TWOVEC_TEST(ssra_d_d_64, "ssra d5, d28, #64", 5, 28) 2669 2670 GEN_TWOVEC_TEST(usra_d_d_1, "usra d5, d28, #1", 5, 28) 2671 GEN_TWOVEC_TEST(usra_d_d_32, "usra d5, d28, #32", 5, 28) 2672 GEN_TWOVEC_TEST(usra_d_d_64, "usra d5, d28, #64", 5, 28) 2673 2674 GEN_TWOVEC_TEST(ssra_2d_2d_1, "ssra v6.2d, v27.2d, #1", 6, 27) 2675 GEN_TWOVEC_TEST(ssra_2d_2d_32, "ssra v6.2d, v27.2d, #32", 6, 27) 2676 GEN_TWOVEC_TEST(ssra_2d_2d_64, "ssra v6.2d, v27.2d, #64", 6, 27) 2677 GEN_TWOVEC_TEST(ssra_4s_4s_1, "ssra v6.4s, v27.4s, #1", 6, 27) 2678 GEN_TWOVEC_TEST(ssra_4s_4s_16, "ssra v6.4s, v27.4s, #16", 6, 27) 2679 GEN_TWOVEC_TEST(ssra_4s_4s_32, "ssra v6.4s, v27.4s, #32", 6, 27) 2680 GEN_TWOVEC_TEST(ssra_2s_2s_1, "ssra v6.2s, v27.2s, #1", 6, 27) 2681 GEN_TWOVEC_TEST(ssra_2s_2s_16, "ssra v6.2s, v27.2s, #16", 6, 27) 2682 GEN_TWOVEC_TEST(ssra_2s_2s_32, "ssra v6.2s, v27.2s, #32", 6, 27) 2683 GEN_TWOVEC_TEST(ssra_8h_8h_1, "ssra v6.8h, v27.8h, #1", 6, 27) 2684 GEN_TWOVEC_TEST(ssra_8h_8h_8, "ssra v6.8h, v27.8h, #8", 6, 27) 2685 GEN_TWOVEC_TEST(ssra_8h_8h_16, "ssra v6.8h, v27.8h, #16", 6, 27) 2686 GEN_TWOVEC_TEST(ssra_4h_4h_1, "ssra v6.4h, v27.4h, #1", 6, 27) 2687 GEN_TWOVEC_TEST(ssra_4h_4h_8, "ssra v6.4h, v27.4h, #8", 6, 27) 2688 GEN_TWOVEC_TEST(ssra_4h_4h_16, "ssra v6.4h, v27.4h, #16", 6, 27) 2689 GEN_TWOVEC_TEST(ssra_16b_16b_1, "ssra v6.16b, v27.16b, #1", 6, 27) 2690 GEN_TWOVEC_TEST(ssra_16b_16b_3, "ssra v6.16b, v27.16b, #3", 6, 27) 2691 GEN_TWOVEC_TEST(ssra_16b_16b_8, "ssra v6.16b, v27.16b, #8", 6, 27) 2692 GEN_TWOVEC_TEST(ssra_8b_8b_1, "ssra v6.8b, v27.8b, #1", 6, 27) 2693 GEN_TWOVEC_TEST(ssra_8b_8b_3, "ssra v6.8b, v27.8b, #3", 6, 27) 2694 GEN_TWOVEC_TEST(ssra_8b_8b_8, "ssra v6.8b, v27.8b, #8", 6, 27) 2695 2696 GEN_TWOVEC_TEST(usra_2d_2d_1, "usra v6.2d, v27.2d, #1", 6, 27) 2697 GEN_TWOVEC_TEST(usra_2d_2d_32, "usra v6.2d, v27.2d, #32", 6, 27) 2698 GEN_TWOVEC_TEST(usra_2d_2d_64, "usra v6.2d, v27.2d, #64", 6, 27) 2699 GEN_TWOVEC_TEST(usra_4s_4s_1, "usra v6.4s, v27.4s, #1", 6, 27) 2700 GEN_TWOVEC_TEST(usra_4s_4s_16, "usra v6.4s, v27.4s, #16", 6, 27) 2701 GEN_TWOVEC_TEST(usra_4s_4s_32, "usra v6.4s, v27.4s, #32", 6, 27) 2702 GEN_TWOVEC_TEST(usra_2s_2s_1, "usra v6.2s, v27.2s, #1", 6, 27) 2703 GEN_TWOVEC_TEST(usra_2s_2s_16, "usra v6.2s, v27.2s, #16", 6, 27) 2704 GEN_TWOVEC_TEST(usra_2s_2s_32, "usra v6.2s, v27.2s, #32", 6, 27) 2705 GEN_TWOVEC_TEST(usra_8h_8h_1, "usra v6.8h, v27.8h, #1", 6, 27) 2706 GEN_TWOVEC_TEST(usra_8h_8h_8, "usra v6.8h, v27.8h, #8", 6, 27) 2707 GEN_TWOVEC_TEST(usra_8h_8h_16, "usra v6.8h, v27.8h, #16", 6, 27) 2708 GEN_TWOVEC_TEST(usra_4h_4h_1, "usra v6.4h, v27.4h, #1", 6, 27) 2709 GEN_TWOVEC_TEST(usra_4h_4h_8, "usra v6.4h, v27.4h, #8", 6, 27) 2710 GEN_TWOVEC_TEST(usra_4h_4h_16, "usra v6.4h, v27.4h, #16", 6, 27) 2711 GEN_TWOVEC_TEST(usra_16b_16b_1, "usra v6.16b, v27.16b, #1", 6, 27) 2712 GEN_TWOVEC_TEST(usra_16b_16b_3, "usra v6.16b, v27.16b, #3", 6, 27) 2713 GEN_TWOVEC_TEST(usra_16b_16b_8, "usra v6.16b, v27.16b, #8", 6, 27) 2714 GEN_TWOVEC_TEST(usra_8b_8b_1, "usra v6.8b, v27.8b, #1", 6, 27) 2715 GEN_TWOVEC_TEST(usra_8b_8b_3, "usra v6.8b, v27.8b, #3", 6, 27) 2716 GEN_TWOVEC_TEST(usra_8b_8b_8, "usra v6.8b, v27.8b, #8", 6, 27) 2717 2718 GEN_THREEVEC_TEST(srshl_d_d_d, "srshl d29, d28, d27", 29, 28, 27) 2719 GEN_THREEVEC_TEST(urshl_d_d_d, "urshl d29, d28, d27", 29, 28, 27) 2720 2721 GEN_THREEVEC_TEST(srshl_2d_2d_2d, "srshl v29.2d, v28.2d, v27.2d", 29,28,27) 2722 GEN_THREEVEC_TEST(srshl_4s_4s_4s, "srshl v29.4s, v28.4s, v27.4s", 29,28,27) 2723 GEN_THREEVEC_TEST(srshl_2s_2s_2s, "srshl v29.2s, v28.2s, v27.2s", 29,28,27) 2724 GEN_THREEVEC_TEST(srshl_8h_8h_8h, "srshl v29.8h, v28.8h, v27.8h", 29,28,27) 2725 GEN_THREEVEC_TEST(srshl_4h_4h_4h, "srshl v29.4h, v28.4h, v27.4h", 29,28,27) 2726 GEN_THREEVEC_TEST(srshl_16b_16b_16b,"srshl v29.16b, v28.16b, v27.16b", 29,28,27) 2727 GEN_THREEVEC_TEST(srshl_8b_8b_8b, "srshl v29.8b, v28.8b, v27.8b", 29,28,27) 2728 2729 GEN_THREEVEC_TEST(urshl_2d_2d_2d, "urshl v29.2d, v28.2d, v27.2d", 29,28,27) 2730 GEN_THREEVEC_TEST(urshl_4s_4s_4s, "urshl v29.4s, v28.4s, v27.4s", 29,28,27) 2731 GEN_THREEVEC_TEST(urshl_2s_2s_2s, "urshl v29.2s, v28.2s, v27.2s", 29,28,27) 2732 GEN_THREEVEC_TEST(urshl_8h_8h_8h, "urshl v29.8h, v28.8h, v27.8h", 29,28,27) 2733 GEN_THREEVEC_TEST(urshl_4h_4h_4h, "urshl v29.4h, v28.4h, v27.4h", 29,28,27) 2734 GEN_THREEVEC_TEST(urshl_16b_16b_16b,"urshl v29.16b, v28.16b, v27.16b", 29,28,27) 2735 GEN_THREEVEC_TEST(urshl_8b_8b_8b, "urshl v29.8b, v28.8b, v27.8b", 29,28,27) 2736 2737 GEN_TWOVEC_TEST(srshr_d_d_1, "srshr d5, d28, #1", 5, 28) 2738 GEN_TWOVEC_TEST(srshr_d_d_32, "srshr d5, d28, #32", 5, 28) 2739 GEN_TWOVEC_TEST(srshr_d_d_64, "srshr d5, d28, #64", 5, 28) 2740 2741 GEN_TWOVEC_TEST(urshr_d_d_1, "urshr d5, d28, #1", 5, 28) 2742 GEN_TWOVEC_TEST(urshr_d_d_32, "urshr d5, d28, #32", 5, 28) 2743 GEN_TWOVEC_TEST(urshr_d_d_64, "urshr d5, d28, #64", 5, 28) 2744 2745 GEN_TWOVEC_TEST(srshr_2d_2d_1, "srshr v6.2d, v27.2d, #1", 6, 27) 2746 GEN_TWOVEC_TEST(srshr_2d_2d_32, "srshr v6.2d, v27.2d, #32", 6, 27) 2747 GEN_TWOVEC_TEST(srshr_2d_2d_64, "srshr v6.2d, v27.2d, #64", 6, 27) 2748 GEN_TWOVEC_TEST(srshr_4s_4s_1, "srshr v6.4s, v27.4s, #1", 6, 27) 2749 GEN_TWOVEC_TEST(srshr_4s_4s_16, "srshr v6.4s, v27.4s, #16", 6, 27) 2750 GEN_TWOVEC_TEST(srshr_4s_4s_32, "srshr v6.4s, v27.4s, #32", 6, 27) 2751 GEN_TWOVEC_TEST(srshr_2s_2s_1, "srshr v6.2s, v27.2s, #1", 6, 27) 2752 GEN_TWOVEC_TEST(srshr_2s_2s_16, "srshr v6.2s, v27.2s, #16", 6, 27) 2753 GEN_TWOVEC_TEST(srshr_2s_2s_32, "srshr v6.2s, v27.2s, #32", 6, 27) 2754 GEN_TWOVEC_TEST(srshr_8h_8h_1, "srshr v6.8h, v27.8h, #1", 6, 27) 2755 GEN_TWOVEC_TEST(srshr_8h_8h_8, "srshr v6.8h, v27.8h, #8", 6, 27) 2756 GEN_TWOVEC_TEST(srshr_8h_8h_16, "srshr v6.8h, v27.8h, #16", 6, 27) 2757 GEN_TWOVEC_TEST(srshr_4h_4h_1, "srshr v6.4h, v27.4h, #1", 6, 27) 2758 GEN_TWOVEC_TEST(srshr_4h_4h_8, "srshr v6.4h, v27.4h, #8", 6, 27) 2759 GEN_TWOVEC_TEST(srshr_4h_4h_16, "srshr v6.4h, v27.4h, #16", 6, 27) 2760 GEN_TWOVEC_TEST(srshr_16b_16b_1, "srshr v6.16b, v27.16b, #1", 6, 27) 2761 GEN_TWOVEC_TEST(srshr_16b_16b_3, "srshr v6.16b, v27.16b, #3", 6, 27) 2762 GEN_TWOVEC_TEST(srshr_16b_16b_8, "srshr v6.16b, v27.16b, #8", 6, 27) 2763 GEN_TWOVEC_TEST(srshr_8b_8b_1, "srshr v6.8b, v27.8b, #1", 6, 27) 2764 GEN_TWOVEC_TEST(srshr_8b_8b_3, "srshr v6.8b, v27.8b, #3", 6, 27) 2765 GEN_TWOVEC_TEST(srshr_8b_8b_8, "srshr v6.8b, v27.8b, #8", 6, 27) 2766 2767 GEN_TWOVEC_TEST(urshr_2d_2d_1, "urshr v6.2d, v27.2d, #1", 6, 27) 2768 GEN_TWOVEC_TEST(urshr_2d_2d_32, "urshr v6.2d, v27.2d, #32", 6, 27) 2769 GEN_TWOVEC_TEST(urshr_2d_2d_64, "urshr v6.2d, v27.2d, #64", 6, 27) 2770 GEN_TWOVEC_TEST(urshr_4s_4s_1, "urshr v6.4s, v27.4s, #1", 6, 27) 2771 GEN_TWOVEC_TEST(urshr_4s_4s_16, "urshr v6.4s, v27.4s, #16", 6, 27) 2772 GEN_TWOVEC_TEST(urshr_4s_4s_32, "urshr v6.4s, v27.4s, #32", 6, 27) 2773 GEN_TWOVEC_TEST(urshr_2s_2s_1, "urshr v6.2s, v27.2s, #1", 6, 27) 2774 GEN_TWOVEC_TEST(urshr_2s_2s_16, "urshr v6.2s, v27.2s, #16", 6, 27) 2775 GEN_TWOVEC_TEST(urshr_2s_2s_32, "urshr v6.2s, v27.2s, #32", 6, 27) 2776 GEN_TWOVEC_TEST(urshr_8h_8h_1, "urshr v6.8h, v27.8h, #1", 6, 27) 2777 GEN_TWOVEC_TEST(urshr_8h_8h_8, "urshr v6.8h, v27.8h, #8", 6, 27) 2778 GEN_TWOVEC_TEST(urshr_8h_8h_16, "urshr v6.8h, v27.8h, #16", 6, 27) 2779 GEN_TWOVEC_TEST(urshr_4h_4h_1, "urshr v6.4h, v27.4h, #1", 6, 27) 2780 GEN_TWOVEC_TEST(urshr_4h_4h_8, "urshr v6.4h, v27.4h, #8", 6, 27) 2781 GEN_TWOVEC_TEST(urshr_4h_4h_16, "urshr v6.4h, v27.4h, #16", 6, 27) 2782 GEN_TWOVEC_TEST(urshr_16b_16b_1, "urshr v6.16b, v27.16b, #1", 6, 27) 2783 GEN_TWOVEC_TEST(urshr_16b_16b_3, "urshr v6.16b, v27.16b, #3", 6, 27) 2784 GEN_TWOVEC_TEST(urshr_16b_16b_8, "urshr v6.16b, v27.16b, #8", 6, 27) 2785 GEN_TWOVEC_TEST(urshr_8b_8b_1, "urshr v6.8b, v27.8b, #1", 6, 27) 2786 GEN_TWOVEC_TEST(urshr_8b_8b_3, "urshr v6.8b, v27.8b, #3", 6, 27) 2787 GEN_TWOVEC_TEST(urshr_8b_8b_8, "urshr v6.8b, v27.8b, #8", 6, 27) 2788 2789 GEN_TWOVEC_TEST(srsra_d_d_1, "srsra d5, d28, #1", 5, 28) 2790 GEN_TWOVEC_TEST(srsra_d_d_32, "srsra d5, d28, #32", 5, 28) 2791 GEN_TWOVEC_TEST(srsra_d_d_64, "srsra d5, d28, #64", 5, 28) 2792 2793 GEN_TWOVEC_TEST(ursra_d_d_1, "ursra d5, d28, #1", 5, 28) 2794 GEN_TWOVEC_TEST(ursra_d_d_32, "ursra d5, d28, #32", 5, 28) 2795 GEN_TWOVEC_TEST(ursra_d_d_64, "ursra d5, d28, #64", 5, 28) 2796 2797 GEN_TWOVEC_TEST(srsra_2d_2d_1, "srsra v6.2d, v27.2d, #1", 6, 27) 2798 GEN_TWOVEC_TEST(srsra_2d_2d_32, "srsra v6.2d, v27.2d, #32", 6, 27) 2799 GEN_TWOVEC_TEST(srsra_2d_2d_64, "srsra v6.2d, v27.2d, #64", 6, 27) 2800 GEN_TWOVEC_TEST(srsra_4s_4s_1, "srsra v6.4s, v27.4s, #1", 6, 27) 2801 GEN_TWOVEC_TEST(srsra_4s_4s_16, "srsra v6.4s, v27.4s, #16", 6, 27) 2802 GEN_TWOVEC_TEST(srsra_4s_4s_32, "srsra v6.4s, v27.4s, #32", 6, 27) 2803 GEN_TWOVEC_TEST(srsra_2s_2s_1, "srsra v6.2s, v27.2s, #1", 6, 27) 2804 GEN_TWOVEC_TEST(srsra_2s_2s_16, "srsra v6.2s, v27.2s, #16", 6, 27) 2805 GEN_TWOVEC_TEST(srsra_2s_2s_32, "srsra v6.2s, v27.2s, #32", 6, 27) 2806 GEN_TWOVEC_TEST(srsra_8h_8h_1, "srsra v6.8h, v27.8h, #1", 6, 27) 2807 GEN_TWOVEC_TEST(srsra_8h_8h_8, "srsra v6.8h, v27.8h, #8", 6, 27) 2808 GEN_TWOVEC_TEST(srsra_8h_8h_16, "srsra v6.8h, v27.8h, #16", 6, 27) 2809 GEN_TWOVEC_TEST(srsra_4h_4h_1, "srsra v6.4h, v27.4h, #1", 6, 27) 2810 GEN_TWOVEC_TEST(srsra_4h_4h_8, "srsra v6.4h, v27.4h, #8", 6, 27) 2811 GEN_TWOVEC_TEST(srsra_4h_4h_16, "srsra v6.4h, v27.4h, #16", 6, 27) 2812 GEN_TWOVEC_TEST(srsra_16b_16b_1, "srsra v6.16b, v27.16b, #1", 6, 27) 2813 GEN_TWOVEC_TEST(srsra_16b_16b_3, "srsra v6.16b, v27.16b, #3", 6, 27) 2814 GEN_TWOVEC_TEST(srsra_16b_16b_8, "srsra v6.16b, v27.16b, #8", 6, 27) 2815 GEN_TWOVEC_TEST(srsra_8b_8b_1, "srsra v6.8b, v27.8b, #1", 6, 27) 2816 GEN_TWOVEC_TEST(srsra_8b_8b_3, "srsra v6.8b, v27.8b, #3", 6, 27) 2817 GEN_TWOVEC_TEST(srsra_8b_8b_8, "srsra v6.8b, v27.8b, #8", 6, 27) 2818 2819 GEN_TWOVEC_TEST(ursra_2d_2d_1, "ursra v6.2d, v27.2d, #1", 6, 27) 2820 GEN_TWOVEC_TEST(ursra_2d_2d_32, "ursra v6.2d, v27.2d, #32", 6, 27) 2821 GEN_TWOVEC_TEST(ursra_2d_2d_64, "ursra v6.2d, v27.2d, #64", 6, 27) 2822 GEN_TWOVEC_TEST(ursra_4s_4s_1, "ursra v6.4s, v27.4s, #1", 6, 27) 2823 GEN_TWOVEC_TEST(ursra_4s_4s_16, "ursra v6.4s, v27.4s, #16", 6, 27) 2824 GEN_TWOVEC_TEST(ursra_4s_4s_32, "ursra v6.4s, v27.4s, #32", 6, 27) 2825 GEN_TWOVEC_TEST(ursra_2s_2s_1, "ursra v6.2s, v27.2s, #1", 6, 27) 2826 GEN_TWOVEC_TEST(ursra_2s_2s_16, "ursra v6.2s, v27.2s, #16", 6, 27) 2827 GEN_TWOVEC_TEST(ursra_2s_2s_32, "ursra v6.2s, v27.2s, #32", 6, 27) 2828 GEN_TWOVEC_TEST(ursra_8h_8h_1, "ursra v6.8h, v27.8h, #1", 6, 27) 2829 GEN_TWOVEC_TEST(ursra_8h_8h_8, "ursra v6.8h, v27.8h, #8", 6, 27) 2830 GEN_TWOVEC_TEST(ursra_8h_8h_16, "ursra v6.8h, v27.8h, #16", 6, 27) 2831 GEN_TWOVEC_TEST(ursra_4h_4h_1, "ursra v6.4h, v27.4h, #1", 6, 27) 2832 GEN_TWOVEC_TEST(ursra_4h_4h_8, "ursra v6.4h, v27.4h, #8", 6, 27) 2833 GEN_TWOVEC_TEST(ursra_4h_4h_16, "ursra v6.4h, v27.4h, #16", 6, 27) 2834 GEN_TWOVEC_TEST(ursra_16b_16b_1, "ursra v6.16b, v27.16b, #1", 6, 27) 2835 GEN_TWOVEC_TEST(ursra_16b_16b_3, "ursra v6.16b, v27.16b, #3", 6, 27) 2836 GEN_TWOVEC_TEST(ursra_16b_16b_8, "ursra v6.16b, v27.16b, #8", 6, 27) 2837 GEN_TWOVEC_TEST(ursra_8b_8b_1, "ursra v6.8b, v27.8b, #1", 6, 27) 2838 GEN_TWOVEC_TEST(ursra_8b_8b_3, "ursra v6.8b, v27.8b, #3", 6, 27) 2839 GEN_TWOVEC_TEST(ursra_8b_8b_8, "ursra v6.8b, v27.8b, #8", 6, 27) 2840 2841 GEN_TWOVEC_TEST(suqadd_d_d, "suqadd d22, d23", 22, 23) 2842 GEN_TWOVEC_TEST(suqadd_s_s, "suqadd s22, s23", 22, 23) 2843 GEN_TWOVEC_TEST(suqadd_h_h, "suqadd h22, h23", 22, 23) 2844 GEN_TWOVEC_TEST(suqadd_b_b, "suqadd b22, b23", 22, 23) 2845 2846 GEN_TWOVEC_TEST(suqadd_2d_2d, "suqadd v6.2d, v27.2d", 6, 27) 2847 GEN_TWOVEC_TEST(suqadd_4s_4s, "suqadd v6.4s, v27.4s", 6, 27) 2848 GEN_TWOVEC_TEST(suqadd_2s_2s, "suqadd v6.2s, v27.2s", 6, 27) 2849 GEN_TWOVEC_TEST(suqadd_8h_8h, "suqadd v6.8h, v27.8h", 6, 27) 2850 GEN_TWOVEC_TEST(suqadd_4h_4h, "suqadd v6.4h, v27.4h", 6, 27) 2851 GEN_TWOVEC_TEST(suqadd_16b_16b, "suqadd v6.16b, v27.16b", 6, 27) 2852 GEN_TWOVEC_TEST(suqadd_8b_8b, "suqadd v6.8b, v27.8b", 6, 27) 2853 2854 GEN_TWOVEC_TEST(usqadd_d_d, "usqadd d22, d23", 22, 23) 2855 GEN_TWOVEC_TEST(usqadd_s_s, "usqadd s22, s23", 22, 23) 2856 GEN_TWOVEC_TEST(usqadd_h_h, "usqadd h22, h23", 22, 23) 2857 GEN_TWOVEC_TEST(usqadd_b_b, "usqadd b22, b23", 22, 23) 2858 2859 GEN_TWOVEC_TEST(usqadd_2d_2d, "usqadd v6.2d, v27.2d", 6, 27) 2860 GEN_TWOVEC_TEST(usqadd_4s_4s, "usqadd v6.4s, v27.4s", 6, 27) 2861 GEN_TWOVEC_TEST(usqadd_2s_2s, "usqadd v6.2s, v27.2s", 6, 27) 2862 GEN_TWOVEC_TEST(usqadd_8h_8h, "usqadd v6.8h, v27.8h", 6, 27) 2863 GEN_TWOVEC_TEST(usqadd_4h_4h, "usqadd v6.4h, v27.4h", 6, 27) 2864 GEN_TWOVEC_TEST(usqadd_16b_16b, "usqadd v6.16b, v27.16b", 6, 27) 2865 GEN_TWOVEC_TEST(usqadd_8b_8b, "usqadd v6.8b, v27.8b", 6, 27) 2866 2867 GEN_THREEVEC_TEST(trn1_2d_2d_2d, "trn1 v1.2d, v2.2d, v4.2d", 1, 2, 4) 2868 GEN_THREEVEC_TEST(trn1_4s_4s_4s, "trn1 v1.4s, v2.4s, v4.4s", 1, 2, 4) 2869 GEN_THREEVEC_TEST(trn1_2s_2s_2s, "trn1 v1.2s, v2.2s, v4.2s", 1, 2, 4) 2870 GEN_THREEVEC_TEST(trn1_8h_8h_8h, "trn1 v1.8h, v2.8h, v4.8h", 1, 2, 4) 2871 GEN_THREEVEC_TEST(trn1_4h_4h_4h, "trn1 v1.4h, v2.4h, v4.4h", 1, 2, 4) 2872 GEN_THREEVEC_TEST(trn1_16b_16b_16b, "trn1 v1.16b, v2.16b, v4.16b", 1, 2, 4) 2873 GEN_THREEVEC_TEST(trn1_8b_8b_8b, "trn1 v1.8b, v2.8b, v4.8b", 1, 2, 4) 2874 2875 GEN_THREEVEC_TEST(trn2_2d_2d_2d, "trn2 v1.2d, v2.2d, v4.2d", 1, 2, 4) 2876 GEN_THREEVEC_TEST(trn2_4s_4s_4s, "trn2 v1.4s, v2.4s, v4.4s", 1, 2, 4) 2877 GEN_THREEVEC_TEST(trn2_2s_2s_2s, "trn2 v1.2s, v2.2s, v4.2s", 1, 2, 4) 2878 GEN_THREEVEC_TEST(trn2_8h_8h_8h, "trn2 v1.8h, v2.8h, v4.8h", 1, 2, 4) 2879 GEN_THREEVEC_TEST(trn2_4h_4h_4h, "trn2 v1.4h, v2.4h, v4.4h", 1, 2, 4) 2880 GEN_THREEVEC_TEST(trn2_16b_16b_16b, "trn2 v1.16b, v2.16b, v4.16b", 1, 2, 4) 2881 GEN_THREEVEC_TEST(trn2_8b_8b_8b, "trn2 v1.8b, v2.8b, v4.8b", 1, 2, 4) 2882 2883 GEN_THREEVEC_TEST(uzp1_2d_2d_2d, "uzp1 v1.2d, v2.2d, v4.2d", 1, 2, 4) 2884 GEN_THREEVEC_TEST(uzp1_4s_4s_4s, "uzp1 v1.4s, v2.4s, v4.4s", 1, 2, 4) 2885 GEN_THREEVEC_TEST(uzp1_2s_2s_2s, "uzp1 v1.2s, v2.2s, v4.2s", 1, 2, 4) 2886 GEN_THREEVEC_TEST(uzp1_8h_8h_8h, "uzp1 v1.8h, v2.8h, v4.8h", 1, 2, 4) 2887 GEN_THREEVEC_TEST(uzp1_4h_4h_4h, "uzp1 v1.4h, v2.4h, v4.4h", 1, 2, 4) 2888 GEN_THREEVEC_TEST(uzp1_16b_16b_16b, "uzp1 v1.16b, v2.16b, v4.16b", 1, 2, 4) 2889 GEN_THREEVEC_TEST(uzp1_8b_8b_8b, "uzp1 v1.8b, v2.8b, v4.8b", 1, 2, 4) 2890 2891 GEN_THREEVEC_TEST(uzp2_2d_2d_2d, "uzp2 v1.2d, v2.2d, v4.2d", 1, 2, 4) 2892 GEN_THREEVEC_TEST(uzp2_4s_4s_4s, "uzp2 v1.4s, v2.4s, v4.4s", 1, 2, 4) 2893 GEN_THREEVEC_TEST(uzp2_2s_2s_2s, "uzp2 v1.2s, v2.2s, v4.2s", 1, 2, 4) 2894 GEN_THREEVEC_TEST(uzp2_8h_8h_8h, "uzp2 v1.8h, v2.8h, v4.8h", 1, 2, 4) 2895 GEN_THREEVEC_TEST(uzp2_4h_4h_4h, "uzp2 v1.4h, v2.4h, v4.4h", 1, 2, 4) 2896 GEN_THREEVEC_TEST(uzp2_16b_16b_16b, "uzp2 v1.16b, v2.16b, v4.16b", 1, 2, 4) 2897 GEN_THREEVEC_TEST(uzp2_8b_8b_8b, "uzp2 v1.8b, v2.8b, v4.8b", 1, 2, 4) 2898 2899 GEN_THREEVEC_TEST(zip1_2d_2d_2d, "zip1 v1.2d, v2.2d, v4.2d", 1, 2, 4) 2900 GEN_THREEVEC_TEST(zip1_4s_4s_4s, "zip1 v1.4s, v2.4s, v4.4s", 1, 2, 4) 2901 GEN_THREEVEC_TEST(zip1_2s_2s_2s, "zip1 v1.2s, v2.2s, v4.2s", 1, 2, 4) 2902 GEN_THREEVEC_TEST(zip1_8h_8h_8h, "zip1 v1.8h, v2.8h, v4.8h", 1, 2, 4) 2903 GEN_THREEVEC_TEST(zip1_4h_4h_4h, "zip1 v1.4h, v2.4h, v4.4h", 1, 2, 4) 2904 GEN_THREEVEC_TEST(zip1_16b_16b_16b, "zip1 v1.16b, v2.16b, v4.16b", 1, 2, 4) 2905 GEN_THREEVEC_TEST(zip1_8b_8b_8b, "zip1 v1.8b, v2.8b, v4.8b", 1, 2, 4) 2906 2907 GEN_THREEVEC_TEST(zip2_2d_2d_2d, "zip2 v1.2d, v2.2d, v4.2d", 1, 2, 4) 2908 GEN_THREEVEC_TEST(zip2_4s_4s_4s, "zip2 v1.4s, v2.4s, v4.4s", 1, 2, 4) 2909 GEN_THREEVEC_TEST(zip2_2s_2s_2s, "zip2 v1.2s, v2.2s, v4.2s", 1, 2, 4) 2910 GEN_THREEVEC_TEST(zip2_8h_8h_8h, "zip2 v1.8h, v2.8h, v4.8h", 1, 2, 4) 2911 GEN_THREEVEC_TEST(zip2_4h_4h_4h, "zip2 v1.4h, v2.4h, v4.4h", 1, 2, 4) 2912 GEN_THREEVEC_TEST(zip2_16b_16b_16b, "zip2 v1.16b, v2.16b, v4.16b", 1, 2, 4) 2913 GEN_THREEVEC_TEST(zip2_8b_8b_8b, "zip2 v1.8b, v2.8b, v4.8b", 1, 2, 4) 2914 2915 GEN_TWOVEC_TEST(urecpe_4s_4s, "urecpe v6.4s, v27.4s", 6, 27) 2916 GEN_TWOVEC_TEST(urecpe_2s_2s, "urecpe v6.2s, v27.2s", 6, 27) 2917 2918 GEN_TWOVEC_TEST(ursqrte_4s_4s, "ursqrte v6.4s, v27.4s", 6, 27) 2919 GEN_TWOVEC_TEST(ursqrte_2s_2s, "ursqrte v6.2s, v27.2s", 6, 27) 2920 2921 2922 /* ---------------------------------------------------------------- */ 2923 /* -- main() -- */ 2924 /* ---------------------------------------------------------------- */ 2925 2926 int main ( void ) 2927 { 2928 assert(sizeof(V128) == 16); 2929 2930 // ======================== FP ======================== 2931 2932 // fabs d,s 2933 // fabs 2d,4s,2s 2934 if (1) test_fabs_d_d(TyDF); 2935 if (1) test_fabs_s_s(TySF); 2936 if (1) test_fabs_2d_2d(TyDF); 2937 if (1) test_fabs_4s_4s(TySF); 2938 if (1) test_fabs_2s_2s(TyDF); 2939 if (1) test_fneg_2d_2d(TySF); 2940 if (1) test_fneg_4s_4s(TyDF); 2941 if (1) test_fneg_2s_2s(TySF); 2942 2943 // fneg d,s 2944 // fneg 2d,4s,2s 2945 if (1) test_fneg_d_d(TyDF); 2946 if (1) test_fneg_s_s(TySF); 2947 2948 // fsqrt d,s 2949 // fsqrt 2d,4s,2s 2950 if (1) test_fsqrt_d_d(TyDF); 2951 if (1) test_fsqrt_s_s(TySF); 2952 2953 // fadd d,s 2954 // fsub d,s 2955 if (1) test_fadd_d_d_d(TyDF); 2956 if (1) test_fadd_s_s_s(TySF); 2957 if (1) test_fsub_d_d_d(TyDF); 2958 if (1) test_fsub_s_s_s(TySF); 2959 2960 // fadd 2d,4s,2s 2961 // fsub 2d,4s,2s 2962 if (1) test_fadd_2d_2d_2d(TyDF); 2963 if (1) test_fadd_4s_4s_4s(TySF); 2964 if (1) test_fadd_2s_2s_2s(TySF); 2965 if (1) test_fsub_2d_2d_2d(TyDF); 2966 if (1) test_fsub_4s_4s_4s(TySF); 2967 if (1) test_fsub_2s_2s_2s(TySF); 2968 2969 // fabd d,s 2970 // fabd 2d,4s,2s 2971 if (1) test_fabd_d_d_d(TyDF); 2972 if (1) test_fabd_s_s_s(TySF); 2973 if (1) test_fabd_2d_2d_2d(TyDF); 2974 if (1) test_fabd_4s_4s_4s(TySF); 2975 if (1) test_fabd_2s_2s_2s(TySF); 2976 2977 // faddp d,s (floating add pair) 2978 // faddp 2d,4s,2s 2979 2980 // fccmp d,s (floating point conditional quiet compare) 2981 // fccmpe d,s (floating point conditional signaling compare) 2982 2983 // fcmeq d,s 2984 // fcmge d,s 2985 // fcmgt d,s 2986 // facgt d,s (floating abs compare GE) 2987 // facge d,s (floating abs compare GE) 2988 2989 // fcmeq 2d,4s,2s 2990 // fcmge 2d,4s,2s 2991 // fcmgt 2d,4s,2s 2992 // facge 2d,4s,2s 2993 // facgt 2d,4s,2s 2994 if (1) test_fcmeq_2d_2d_2d(TyDF); 2995 if (1) test_fcmeq_4s_4s_4s(TySF); 2996 if (1) test_fcmeq_2s_2s_2s(TySF); 2997 if (1) test_fcmge_2d_2d_2d(TyDF); 2998 if (1) test_fcmge_4s_4s_4s(TySF); 2999 if (1) test_fcmge_2s_2s_2s(TySF); 3000 if (1) test_fcmgt_2d_2d_2d(TyDF); 3001 if (1) test_fcmgt_4s_4s_4s(TySF); 3002 if (1) test_fcmgt_2s_2s_2s(TySF); 3003 if (1) test_facge_2d_2d_2d(TyDF); 3004 if (1) test_facge_4s_4s_4s(TySF); 3005 if (1) test_facge_2s_2s_2s(TySF); 3006 if (1) test_facgt_2d_2d_2d(TyDF); 3007 if (1) test_facgt_4s_4s_4s(TySF); 3008 if (1) test_facgt_2s_2s_2s(TySF); 3009 3010 // fcmeq_z d,s 3011 // fcmge_z d,s 3012 // fcmgt_z d,s 3013 // fcmle_z d,s 3014 // fcmlt_z d,s 3015 3016 // fcmeq_z 2d,4s,2s 3017 // fcmge_z 2d,4s,2s 3018 // fcmgt_z 2d,4s,2s 3019 // fcmle_z 2d,4s,2s 3020 // fcmlt_z 2d,4s,2s 3021 3022 // fcmp_z d,s 3023 // fcmpe_z d,s 3024 // fcmp d,s (floating point quiet, set flags) 3025 // fcmpe d,s (floating point signaling, set flags) 3026 3027 // fcsel d,s (fp cond select) 3028 3029 // fdiv d,s 3030 // fdiv 2d,4s,2s 3031 if (1) test_fdiv_d_d_d(TyDF); 3032 if (1) test_fdiv_s_s_s(TySF); 3033 if (1) test_fdiv_2d_2d_2d(TyDF); 3034 if (1) test_fdiv_4s_4s_4s(TySF); 3035 if (1) test_fdiv_2s_2s_2s(TySF); 3036 3037 // fmadd d,s 3038 // fnmadd d,s 3039 // fmsub d,s 3040 // fnmsub d,s 3041 3042 // fnmul d,s 3043 if (1) test_fnmul_d_d_d(TyDF); 3044 if (1) test_fnmul_s_s_s(TySF); 3045 3046 // fmax d,s 3047 // fmin d,s 3048 // fmaxnm d,s ("max number") 3049 // fminnm d,s 3050 3051 // fmax 2d,4s,2s 3052 // fmin 2d,4s,2s 3053 // fmaxnm 2d,4s,2s 3054 // fminnm 2d,4s,2s 3055 3056 // fmaxnmp d_2d,s_2s ("max number pairwise") 3057 // fminnmp d_2d,s_2s 3058 3059 // fmaxnmp 2d,4s,2s 3060 // fminnmp 2d,4s,2s 3061 3062 // fmaxnmv s_4s (maxnum across vector) 3063 // fminnmv s_4s 3064 3065 // fmaxp d_2d,s_2s (max of a pair) 3066 // fminp d_2d,s_2s (max of a pair) 3067 3068 // fmaxp 2d,4s,2s (max pairwise) 3069 // fminp 2d,4s,2s 3070 3071 // fmaxv s_4s (max across vector) 3072 // fminv s_4s 3073 3074 // fmla 2d,4s,2s 3075 // fmls 2d,4s,2s 3076 if (1) test_fmla_2d_2d_2d(TyDF); 3077 if (1) test_fmla_4s_4s_4s(TySF); 3078 if (1) test_fmla_2s_2s_2s(TySF); 3079 if (1) test_fmls_2d_2d_2d(TyDF); 3080 if (1) test_fmls_4s_4s_4s(TySF); 3081 if (1) test_fmls_2s_2s_2s(TySF); 3082 3083 // fmla d_d_d[],s_s_s[] (by element) 3084 // fmls d_d_d[],s_s_s[] (by element) 3085 3086 // fmla 2d_2d_d[],4s_4s_s[],2s_2s_s[] 3087 // fmls 2d_2d_d[],4s_4s_s[],2s_2s_s[] 3088 3089 // fmov 2d,4s,2s #imm (part of the MOVI/MVNI/ORR/BIC imm group) 3090 // INCOMPLETE 3091 if (1) test_fmov_2d_imm_01(TyD); 3092 if (1) test_fmov_2d_imm_02(TyD); 3093 if (1) test_fmov_2d_imm_03(TyD); 3094 if (0) test_fmov_4s_imm_01(TyS); 3095 if (0) test_fmov_4s_imm_02(TyS); 3096 if (0) test_fmov_4s_imm_03(TyS); 3097 if (0) test_fmov_2s_imm_01(TyS); 3098 if (0) test_fmov_2s_imm_02(TyS); 3099 if (0) test_fmov_2s_imm_03(TyS); 3100 3101 // fmov d_d,s_s 3102 if (1) test_fmov_d_d(TyDF); 3103 if (1) test_fmov_s_s(TySF); 3104 3105 // fmov s_w,w_s,d_x,d[1]_x,x_d,x_d[1] 3106 if (1) test_fmov_s_w(TyS); 3107 if (1) test_fmov_d_x(TyD); 3108 if (1) test_fmov_d1_x(TyD); 3109 if (1) test_fmov_w_s(TyS); 3110 if (1) test_fmov_x_d(TyD); 3111 if (1) test_fmov_x_d1(TyD); 3112 3113 // fmov d,s #imm 3114 if (1) test_fmov_d_imm_01(TyNONE); 3115 if (1) test_fmov_d_imm_02(TyNONE); 3116 if (1) test_fmov_d_imm_03(TyNONE); 3117 if (1) test_fmov_s_imm_01(TyNONE); 3118 if (1) test_fmov_s_imm_02(TyNONE); 3119 if (1) test_fmov_s_imm_03(TyNONE); 3120 3121 // fmul d_d_d[],s_s_s[] 3122 // fmul 2d_2d_d[],4s_4s_s[],2s_2s_s[] 3123 3124 // fmul 2d,4s,2s 3125 // fmul d,s 3126 if (1) test_fmul_d_d_d(TyDF); 3127 if (1) test_fmul_s_s_s(TySF); 3128 if (1) test_fmul_2d_2d_2d(TyDF); 3129 if (1) test_fmul_4s_4s_4s(TySF); 3130 if (1) test_fmul_2s_2s_2s(TySF); 3131 3132 // fmulx d_d_d[],s_s_s[] 3133 // fmulx 2d_2d_d[],4s_4s_s[],2s_2s_s[] 3134 3135 // fmulx d,s 3136 // fmulx 2d,4s,2s 3137 3138 // frecpe d,s (recip estimate) 3139 // frecpe 2d,4s,2s 3140 3141 // frecps d,s (recip step) 3142 // frecps 2d,4s,2s 3143 3144 // frecpx d,s (recip exponent) 3145 3146 // frinta d,s 3147 // frinti d,s 3148 // frintm d,s 3149 // frintn d,s 3150 // frintp d,s 3151 // frintx d,s 3152 // frintz d,s 3153 3154 // frinta 2d,4s,2s (round to integral, nearest away) 3155 // frinti 2d,4s,2s (round to integral, per FPCR) 3156 // frintm 2d,4s,2s (round to integral, minus inf) 3157 // frintn 2d,4s,2s (round to integral, nearest, to even) 3158 // frintp 2d,4s,2s (round to integral, plus inf) 3159 // frintx 2d,4s,2s (round to integral exact, per FPCR) 3160 // frintz 2d,4s,2s (round to integral, zero) 3161 3162 // frsqrte d,s (est) 3163 // frsqrte 2d,4s,2s 3164 3165 // frsqrts d,s (step) 3166 // frsqrts 2d,4s,2s 3167 3168 // ======================== CONV ======================== 3169 3170 // fcvt s_h,d_h,h_s,d_s,h_d,s_d (fp convert, scalar) 3171 3172 // fcvtl{2} 4s/4h, 4s/8h, 2d/2s, 2d/4s (float convert to longer form) 3173 3174 // fcvtn{2} 4h/4s, 8h/4s, 2s/2d, 4s/2d (float convert to narrower form) 3175 // INCOMPLETE 3176 if (1) test_fcvtn_2s_2d(TyDF); 3177 if (1) test_fcvtn_4s_2d(TyDF); 3178 3179 // fcvtas d,s (fcvt to signed int, nearest, ties away) 3180 // fcvtau d,s (fcvt to unsigned int, nearest, ties away) 3181 // fcvtas 2d,4s,2s 3182 // fcvtau 2d,4s,2s 3183 // fcvtas w_s,x_s,w_d,x_d 3184 // fcvtau w_s,x_s,w_d,x_d 3185 3186 // fcvtms d,s (fcvt to signed int, minus inf) 3187 // fcvtmu d,s (fcvt to unsigned int, minus inf) 3188 // fcvtms 2d,4s,2s 3189 // fcvtmu 2d,4s,2s 3190 // fcvtms w_s,x_s,w_d,x_d 3191 // fcvtmu w_s,x_s,w_d,x_d 3192 3193 // fcvtns d,s (fcvt to signed int, nearest) 3194 // fcvtnu d,s (fcvt to unsigned int, nearest) 3195 // fcvtns 2d,4s,2s 3196 // fcvtnu 2d,4s,2s 3197 // fcvtns w_s,x_s,w_d,x_d 3198 // fcvtnu w_s,x_s,w_d,x_d 3199 3200 // fcvtps d,s (fcvt to signed int, plus inf) 3201 // fcvtpu d,s (fcvt to unsigned int, plus inf) 3202 // fcvtps 2d,4s,2s 3203 // fcvtpu 2d,4s,2s 3204 // fcvtps w_s,x_s,w_d,x_d 3205 // fcvtpu w_s,x_s,w_d,x_d 3206 3207 // fcvtzs d,s (fcvt to signed integer, to zero) 3208 // fcvtzu d,s (fcvt to unsigned integer, to zero) 3209 // fcvtzs 2d,4s,2s 3210 // fcvtzu 2d,4s,2s 3211 // fcvtzs w_s,x_s,w_d,x_d 3212 // fcvtzu w_s,x_s,w_d,x_d 3213 3214 // fcvtzs d,s (fcvt to signed fixedpt, to zero) (w/ #fbits) 3215 // fcvtzu d,s (fcvt to unsigned fixedpt, to zero) (w/ #fbits) 3216 // fcvtzs 2d,4s,2s 3217 // fcvtzu 2d,4s,2s 3218 // fcvtzs w_s,x_s,w_d,x_d (fcvt to signed fixedpt, to zero) (w/ #fbits) 3219 // fcvtzu w_s,x_s,w_d,x_d (fcvt to unsigned fixedpt, to zero) (w/ #fbits) 3220 3221 // fcvtxn s_d (fcvt to lower prec narrow, rounding to odd) 3222 // fcvtxn 2s_2d,4s_2d 3223 3224 // scvtf d,s _#fbits 3225 // ucvtf d,s _#fbits 3226 3227 // scvtf 2d,4s,2s _#fbits 3228 // ucvtf 2d,4s,2s _#fbits 3229 3230 // scvtf d,s 3231 // ucvtf d,s 3232 if (1) test_scvtf_s_s(TyS); 3233 if (1) test_scvtf_d_d(TyD); 3234 if (1) test_ucvtf_s_s(TyS); 3235 if (1) test_ucvtf_d_d(TyD); 3236 3237 // scvtf 2d,4s,2s 3238 // ucvtf 2d,4s,2s 3239 3240 // scvtf s_w, d_w, s_x, d_x, _#fbits 3241 // ucvtf s_w, d_w, s_x, d_x, _#fbits 3242 3243 // scvtf s_w, d_w, s_x, d_x 3244 // ucvtf s_w, d_w, s_x, d_x 3245 if (1) test_scvtf_s_w(TyS); 3246 if (1) test_scvtf_d_w(TyS); 3247 if (1) test_scvtf_s_x(TyD); 3248 if (1) test_scvtf_d_x(TyD); 3249 if (1) test_ucvtf_s_w(TyS); 3250 if (1) test_ucvtf_d_w(TyS); 3251 if (1) test_ucvtf_s_x(TyD); 3252 if (1) test_ucvtf_d_x(TyD); 3253 3254 // ======================== INT ======================== 3255 3256 // abs d 3257 // neg d 3258 if (0) test_abs_d_d(TyD); 3259 if (0) test_neg_d_d(TyD); 3260 3261 // abs 2d,4s,2s,8h,4h,16b,8b 3262 // neg 2d,4s,2s,8h,4h,16b,8b 3263 if (0) test_abs_2d_2d(TyD); 3264 if (0) test_abs_4s_4s(TyS); 3265 if (0) test_abs_2s_2s(TyS); 3266 if (0) test_abs_8h_8h(TyH); 3267 if (0) test_abs_4h_4h(TyH); 3268 if (0) test_abs_16b_16b(TyB); 3269 if (0) test_abs_8b_8b(TyB); 3270 if (1) test_neg_2d_2d(TyD); 3271 if (1) test_neg_4s_4s(TyS); 3272 if (1) test_neg_2s_2s(TyS); 3273 if (1) test_neg_8h_8h(TyH); 3274 if (1) test_neg_4h_4h(TyH); 3275 if (1) test_neg_16b_16b(TyB); 3276 if (1) test_neg_8b_8b(TyB); 3277 3278 // add d 3279 // sub d 3280 if (1) test_add_d_d_d(TyD); 3281 if (1) test_sub_d_d_d(TyD); 3282 3283 // add 2d,4s,2s,8h,4h,16b,8b 3284 // sub 2d,4s,2s,8h,4h,16b,8b 3285 if (1) test_add_2d_2d_2d(TyD); 3286 if (1) test_add_4s_4s_4s(TyS); 3287 if (1) test_add_2s_2s_2s(TyS); 3288 if (1) test_add_8h_8h_8h(TyH); 3289 if (1) test_add_4h_4h_4h(TyH); 3290 if (1) test_add_16b_16b_16b(TyB); 3291 if (1) test_add_8b_8b_8b(TyB); 3292 if (1) test_sub_2d_2d_2d(TyD); 3293 if (1) test_sub_4s_4s_4s(TyS); 3294 if (1) test_sub_2s_2s_2s(TyS); 3295 if (1) test_sub_8h_8h_8h(TyH); 3296 if (1) test_sub_4h_4h_4h(TyH); 3297 if (1) test_sub_16b_16b_16b(TyB); 3298 if (1) test_sub_8b_8b_8b(TyB); 3299 3300 // addhn{2} 2s/4s_2d_2d, 4h/8h_4s_4s, 8b/16b_8h_8h 3301 // subhn{2} 2s/4s_2d_2d, 4h/8h_4s_4s, 8b/16b_8h_8h 3302 // raddhn{2} 2s/4s_2d_2d, 4h/8h_4s_4s, 8b/16b_8h_8h 3303 // rsubhn{2} 2s/4s_2d_2d, 4h/8h_4s_4s, 8b/16b_8h_8h 3304 if (0) test_addhn_2s_2d_2d(TyD); 3305 if (0) test_addhn2_4s_2d_2d(TyD); 3306 if (0) test_addhn_4h_4s_4s(TyS); 3307 if (0) test_addhn2_8h_4s_4s(TyS); 3308 if (0) test_addhn_8b_8h_8h(TyH); 3309 if (0) test_addhn2_16b_8h_8h(TyH); 3310 if (0) test_subhn_2s_2d_2d(TyD); 3311 if (0) test_subhn2_4s_2d_2d(TyD); 3312 if (0) test_subhn_4h_4s_4s(TyS); 3313 if (0) test_subhn2_8h_4s_4s(TyS); 3314 if (0) test_subhn_8b_8h_8h(TyH); 3315 if (0) test_subhn2_16b_8h_8h(TyH); 3316 if (0) test_raddhn_2s_2d_2d(TyD); 3317 if (0) test_raddhn2_4s_2d_2d(TyD); 3318 if (0) test_raddhn_4h_4s_4s(TyS); 3319 if (0) test_raddhn2_8h_4s_4s(TyS); 3320 if (0) test_raddhn_8b_8h_8h(TyH); 3321 if (0) test_raddhn2_16b_8h_8h(TyH); 3322 if (0) test_rsubhn_2s_2d_2d(TyD); 3323 if (0) test_rsubhn2_4s_2d_2d(TyD); 3324 if (0) test_rsubhn_4h_4s_4s(TyS); 3325 if (0) test_rsubhn2_8h_4s_4s(TyS); 3326 if (0) test_rsubhn_8b_8h_8h(TyH); 3327 if (0) test_rsubhn2_16b_8h_8h(TyH); 3328 3329 // addp d (add pairs, across) 3330 if (0) test_addp_d_2d(TyD); 3331 3332 // addp 2d,4s,2s,8h,4h,16b,8b 3333 if (0) test_addp_2d_2d_2d(TyD); 3334 if (0) test_addp_4s_4s_4s(TyS); 3335 if (0) test_addp_2s_2s_2s(TyS); 3336 if (0) test_addp_8h_8h_8h(TyH); 3337 if (0) test_addp_4h_4h_4h(TyH); 3338 if (0) test_addp_16b_16b_16b(TyB); 3339 if (0) test_addp_8b_8b_8b(TyB); 3340 3341 // addv 4s,8h,4h,16b,18b (reduce across vector) 3342 if (0) test_addv_s_4s(TyS); 3343 if (0) test_addv_h_8h(TyH); 3344 if (0) test_addv_h_4h(TyH); 3345 if (0) test_addv_b_16b(TyB); 3346 if (0) test_addv_b_8b(TyB); 3347 3348 // and 16b,8b 3349 // bic 16b,8b 3350 // orn 16b,8b 3351 // orr 16b,8b 3352 if (1) test_and_16b_16b_16b(TyB); 3353 if (1) test_and_8b_8b_8b(TyB); 3354 if (1) test_bic_16b_16b_16b(TyB); 3355 if (1) test_bic_8b_8b_8b(TyB); 3356 if (1) test_orr_16b_16b_16b(TyB); 3357 if (1) test_orr_8b_8b_8b(TyB); 3358 if (1) test_orn_16b_16b_16b(TyB); 3359 if (1) test_orn_8b_8b_8b(TyB); 3360 3361 // orr 8h,4h #imm8, LSL #0 or 8 3362 // orr 4s,2s #imm8, LSL #0, 8, 16 or 24 3363 // bic 8h,4h #imm8, LSL #0 or 8 3364 // bic 4s,2s #imm8, LSL #0, 8, 16 or 24 3365 // movi and mvni are very similar, a superset of these. 3366 // Cases are below. 3367 if (0) test_orr_8h_0x5A_lsl0(TyH); 3368 if (0) test_orr_8h_0xA5_lsl8(TyH); 3369 if (0) test_orr_4h_0x5A_lsl0(TyH); 3370 if (0) test_orr_4h_0xA5_lsl8(TyH); 3371 if (0) test_orr_4s_0x5A_lsl0(TyS); 3372 if (0) test_orr_4s_0x6B_lsl8(TyS); 3373 if (0) test_orr_4s_0x49_lsl16(TyS); 3374 if (0) test_orr_4s_0x3D_lsl24(TyS); 3375 if (0) test_orr_2s_0x5A_lsl0(TyS); 3376 if (0) test_orr_2s_0x6B_lsl8(TyS); 3377 if (0) test_orr_2s_0x49_lsl16(TyS); 3378 if (0) test_orr_2s_0x3D_lsl24(TyS); 3379 if (0) test_bic_8h_0x5A_lsl0(TyH); 3380 if (0) test_bic_8h_0xA5_lsl8(TyH); 3381 if (0) test_bic_4h_0x5A_lsl0(TyH); 3382 if (0) test_bic_4h_0xA5_lsl8(TyH); 3383 if (0) test_bic_4s_0x5A_lsl0(TyS); 3384 if (0) test_bic_4s_0x6B_lsl8(TyS); 3385 if (0) test_bic_4s_0x49_lsl16(TyS); 3386 if (0) test_bic_4s_0x3D_lsl24(TyS); 3387 if (0) test_bic_2s_0x5A_lsl0(TyS); 3388 if (0) test_bic_2s_0x6B_lsl8(TyS); 3389 if (0) test_bic_2s_0x49_lsl16(TyS); 3390 if (0) test_bic_2s_0x3D_lsl24(TyS); 3391 3392 // bif 16b,8b (vector) (bit insert if false) 3393 // bit 16b,8b (vector) (bit insert if true) 3394 // bsl 16b,8b (vector) (bit select) 3395 // eor 16b,8b (vector) 3396 if (1) test_bif_16b_16b_16b(TyB); 3397 if (1) test_bif_8b_8b_8b(TyB); 3398 if (1) test_bit_16b_16b_16b(TyB); 3399 if (1) test_bit_8b_8b_8b(TyB); 3400 if (1) test_bsl_16b_16b_16b(TyB); 3401 if (1) test_bsl_8b_8b_8b(TyB); 3402 if (1) test_eor_16b_16b_16b(TyB); 3403 if (1) test_eor_8b_8b_8b(TyB); 3404 3405 // cls 4s,2s,8h,4h,16b,8b (count leading sign bits) 3406 // clz 4s,2s,8h,4h,16b,8b (count leading zero bits) 3407 if (0) test_cls_4s_4s(TyS); 3408 if (0) test_cls_2s_2s(TyS); 3409 if (0) test_cls_8h_8h(TyH); 3410 if (0) test_cls_4h_4h(TyH); 3411 if (0) test_cls_16b_16b(TyB); 3412 if (0) test_cls_8b_8b(TyB); 3413 if (0) test_clz_4s_4s(TyS); 3414 if (0) test_clz_2s_2s(TyS); 3415 if (0) test_clz_8h_8h(TyH); 3416 if (0) test_clz_4h_4h(TyH); 3417 if (0) test_clz_16b_16b(TyB); 3418 if (0) test_clz_8b_8b(TyB); 3419 3420 // cmeq d 3421 // cmge d 3422 // cmgt d 3423 // cmhi d 3424 // cmhs d 3425 // cmtst d 3426 if (0) test_cmeq_d_d_d(TyD); 3427 if (0) test_cmge_d_d_d(TyD); 3428 if (0) test_cmgt_d_d_d(TyD); 3429 if (0) test_cmhi_d_d_d(TyD); 3430 if (0) test_cmhs_d_d_d(TyD); 3431 if (0) test_cmtst_d_d_d(TyD); 3432 3433 // cmeq 2d,4s,2s,8h,4h,16b,8b 3434 // cmge 2d,4s,2s,8h,4h,16b,8b 3435 // cmgt 2d,4s,2s,8h,4h,16b,8b 3436 // cmhi 2d,4s,2s,8h,4h,16b,8b 3437 // cmhs 2d,4s,2s,8h,4h,16b,8b 3438 // cmtst 2d,4s,2s,8h,4h,16b,8b 3439 if (1) test_cmeq_2d_2d_2d(TyD); 3440 if (1) test_cmeq_4s_4s_4s(TyS); 3441 if (1) test_cmeq_2s_2s_2s(TyS); 3442 if (1) test_cmeq_8h_8h_8h(TyH); 3443 if (1) test_cmeq_4h_4h_4h(TyH); 3444 if (1) test_cmeq_16b_16b_16b(TyB); 3445 if (1) test_cmeq_8b_8b_8b(TyB); 3446 if (1) test_cmge_2d_2d_2d(TyD); 3447 if (1) test_cmge_4s_4s_4s(TyS); 3448 if (1) test_cmge_2s_2s_2s(TyS); 3449 if (1) test_cmge_8h_8h_8h(TyH); 3450 if (1) test_cmge_4h_4h_4h(TyH); 3451 if (1) test_cmge_16b_16b_16b(TyB); 3452 if (1) test_cmge_8b_8b_8b(TyB); 3453 if (1) test_cmgt_2d_2d_2d(TyD); 3454 if (1) test_cmgt_4s_4s_4s(TyS); 3455 if (1) test_cmgt_2s_2s_2s(TyS); 3456 if (1) test_cmgt_8h_8h_8h(TyH); 3457 if (1) test_cmgt_4h_4h_4h(TyH); 3458 if (1) test_cmgt_16b_16b_16b(TyB); 3459 if (1) test_cmgt_8b_8b_8b(TyB); 3460 if (1) test_cmhi_2d_2d_2d(TyD); 3461 if (1) test_cmhi_4s_4s_4s(TyS); 3462 if (1) test_cmhi_2s_2s_2s(TyS); 3463 if (1) test_cmhi_8h_8h_8h(TyH); 3464 if (1) test_cmhi_4h_4h_4h(TyH); 3465 if (1) test_cmhi_16b_16b_16b(TyB); 3466 if (1) test_cmhi_8b_8b_8b(TyB); 3467 if (1) test_cmhs_2d_2d_2d(TyD); 3468 if (1) test_cmhs_4s_4s_4s(TyS); 3469 if (1) test_cmhs_2s_2s_2s(TyS); 3470 if (1) test_cmhs_8h_8h_8h(TyH); 3471 if (1) test_cmhs_4h_4h_4h(TyH); 3472 if (1) test_cmhs_16b_16b_16b(TyB); 3473 if (1) test_cmhs_8b_8b_8b(TyB); 3474 if (1) test_cmtst_2d_2d_2d(TyD); 3475 if (1) test_cmtst_4s_4s_4s(TyS); 3476 if (1) test_cmtst_2s_2s_2s(TyS); 3477 if (1) test_cmtst_8h_8h_8h(TyH); 3478 if (1) test_cmtst_4h_4h_4h(TyH); 3479 if (1) test_cmtst_16b_16b_16b(TyB); 3480 if (1) test_cmtst_8b_8b_8b(TyB); 3481 3482 // cmeq_z d 3483 // cmge_z d 3484 // cmgt_z d 3485 // cmle_z d 3486 // cmlt_z d 3487 if (1) test_cmeq_zero_d_d(TyD); 3488 if (0) test_cmge_zero_d_d(TyD); 3489 if (0) test_cmgt_zero_d_d(TyD); 3490 if (0) test_cmle_zero_d_d(TyD); 3491 if (0) test_cmlt_zero_d_d(TyD); 3492 3493 // cmeq_z 2d,4s,2s,8h,4h,16b,8b 3494 // cmge_z 2d,4s,2s,8h,4h,16b,8b 3495 // cmgt_z 2d,4s,2s,8h,4h,16b,8b 3496 // cmle_z 2d,4s,2s,8h,4h,16b,8b 3497 // cmlt_z 2d,4s,2s,8h,4h,16b,8b 3498 if (1) test_cmeq_zero_2d_2d(TyD); 3499 if (1) test_cmeq_zero_4s_4s(TyS); 3500 if (1) test_cmeq_zero_2s_2s(TyS); 3501 if (1) test_cmeq_zero_8h_8h(TyH); 3502 if (1) test_cmeq_zero_4h_4h(TyH); 3503 if (1) test_cmeq_zero_16b_16b(TyB); 3504 if (1) test_cmeq_zero_8b_8b(TyB); 3505 if (1) test_cmge_zero_2d_2d(TyD); 3506 if (1) test_cmge_zero_4s_4s(TyS); 3507 if (1) test_cmge_zero_2s_2s(TyS); 3508 if (1) test_cmge_zero_8h_8h(TyH); 3509 if (1) test_cmge_zero_4h_4h(TyH); 3510 if (1) test_cmge_zero_16b_16b(TyB); 3511 if (1) test_cmge_zero_8b_8b(TyB); 3512 if (1) test_cmgt_zero_2d_2d(TyD); 3513 if (1) test_cmgt_zero_4s_4s(TyS); 3514 if (1) test_cmgt_zero_2s_2s(TyS); 3515 if (1) test_cmgt_zero_8h_8h(TyH); 3516 if (1) test_cmgt_zero_4h_4h(TyH); 3517 if (1) test_cmgt_zero_16b_16b(TyB); 3518 if (1) test_cmgt_zero_8b_8b(TyB); 3519 if (1) test_cmle_zero_2d_2d(TyD); 3520 if (1) test_cmle_zero_4s_4s(TyS); 3521 if (1) test_cmle_zero_2s_2s(TyS); 3522 if (1) test_cmle_zero_8h_8h(TyH); 3523 if (1) test_cmle_zero_4h_4h(TyH); 3524 if (1) test_cmle_zero_16b_16b(TyB); 3525 if (1) test_cmle_zero_8b_8b(TyB); 3526 if (1) test_cmlt_zero_2d_2d(TyD); 3527 if (1) test_cmlt_zero_4s_4s(TyS); 3528 if (1) test_cmlt_zero_2s_2s(TyS); 3529 if (1) test_cmlt_zero_8h_8h(TyH); 3530 if (1) test_cmlt_zero_4h_4h(TyH); 3531 if (1) test_cmlt_zero_16b_16b(TyB); 3532 if (1) test_cmlt_zero_8b_8b(TyB); 3533 3534 // cnt 16b,8b (population count per byte) 3535 if (0) test_cnt_16b_16b(TyB); 3536 if (0) test_cnt_8b_8b(TyB); 3537 3538 // dup d,s,h,b (vec elem to scalar) 3539 if (0) test_dup_d_d0(TyD); 3540 if (0) test_dup_d_d1(TyD); 3541 if (0) test_dup_s_s0(TyS); 3542 if (0) test_dup_s_s3(TyS); 3543 if (0) test_dup_h_h0(TyH); 3544 if (0) test_dup_h_h6(TyH); 3545 if (0) test_dup_b_b0(TyB); 3546 if (0) test_dup_b_b13(TyB); 3547 3548 // dup 2d,4s,2s,8h,4h,16b,8b (vec elem to vector) 3549 if (1) test_dup_2d_d0(TyD); 3550 if (1) test_dup_2d_d1(TyD); 3551 if (1) test_dup_4s_s0(TyS); 3552 if (1) test_dup_4s_s3(TyS); 3553 if (1) test_dup_2s_s0(TyS); 3554 if (1) test_dup_2s_s2(TyS); 3555 if (1) test_dup_8h_h0(TyH); 3556 if (1) test_dup_8h_h6(TyH); 3557 if (1) test_dup_4h_h1(TyH); 3558 if (1) test_dup_4h_h5(TyH); 3559 if (1) test_dup_16b_b2(TyB); 3560 if (1) test_dup_16b_b12(TyB); 3561 if (1) test_dup_8b_b3(TyB); 3562 if (1) test_dup_8b_b13(TyB); 3563 3564 // dup 2d,4s,2s,8h,4h,16b,8b (general reg to vector) 3565 if (1) test_dup_2d_x(TyD); 3566 if (1) test_dup_4s_w(TyS); 3567 if (1) test_dup_2s_w(TyS); 3568 if (1) test_dup_8h_w(TyH); 3569 if (1) test_dup_4h_w(TyH); 3570 if (1) test_dup_16b_w(TyB); 3571 if (1) test_dup_8b_w(TyB); 3572 3573 // ext 16b,8b,#imm4 (concat 2 vectors, then slice) 3574 if (0) test_ext_16b_16b_16b_0x0(TyB); 3575 if (0) test_ext_16b_16b_16b_0x7(TyB); 3576 if (0) test_ext_16b_16b_16b_0x8(TyB); 3577 if (0) test_ext_16b_16b_16b_0x9(TyB); 3578 if (0) test_ext_16b_16b_16b_0xF(TyB); 3579 if (0) test_ext_8b_8b_8b_0x0(TyB); 3580 if (0) test_ext_8b_8b_8b_0x1(TyB); 3581 if (0) test_ext_8b_8b_8b_0x6(TyB); 3582 if (0) test_ext_8b_8b_8b_0x7(TyB); 3583 3584 // ins d[]_d[],s[]_s[],h[]_h[],b[]_b[] 3585 if (0) test_ins_d0_d0(TyD); 3586 if (0) test_ins_d0_d1(TyD); 3587 if (0) test_ins_d1_d0(TyD); 3588 if (0) test_ins_d1_d1(TyD); 3589 if (0) test_ins_s0_s2(TyS); 3590 if (0) test_ins_s3_s0(TyS); 3591 if (0) test_ins_s2_s1(TyS); 3592 if (0) test_ins_s1_s3(TyS); 3593 if (0) test_ins_h0_h6(TyH); 3594 if (0) test_ins_h7_h0(TyH); 3595 if (0) test_ins_h6_h1(TyH); 3596 if (0) test_ins_h1_h7(TyH); 3597 if (1) test_ins_b0_b14(TyB); 3598 if (1) test_ins_b15_b8(TyB); 3599 if (1) test_ins_b13_b9(TyB); 3600 if (1) test_ins_b5_b12(TyB); 3601 3602 // ins d[]_x, s[]_w, h[]_w, b[]_w 3603 if (1) test_INS_general(); 3604 3605 // mla 4s_4s_s[],2s_2s_s[],8h_8h_h[],4h_4h_h[] 3606 // mls 4s_4s_s[],2s_2s_s[],8h_8h_h[],4h_4h_h[] 3607 // mul 4s_4s_s[],2s_2s_s[],8h_8h_h[],4h_4h_h[] 3608 if (0) test_mla_4s_4s_s0(TyS); 3609 if (0) test_mla_4s_4s_s3(TyS); 3610 if (0) test_mla_2s_2s_s0(TyS); 3611 if (0) test_mla_2s_2s_s3(TyS); 3612 if (0) test_mla_8h_8h_h1(TyH); 3613 if (0) test_mla_8h_8h_h5(TyH); 3614 if (0) test_mla_4h_4h_h2(TyH); 3615 if (0) test_mla_4h_4h_h7(TyH); 3616 if (0) test_mls_4s_4s_s0(TyS); 3617 if (0) test_mls_4s_4s_s3(TyS); 3618 if (0) test_mls_2s_2s_s0(TyS); 3619 if (0) test_mls_2s_2s_s3(TyS); 3620 if (0) test_mls_8h_8h_h1(TyH); 3621 if (0) test_mls_8h_8h_h5(TyH); 3622 if (0) test_mls_4h_4h_h2(TyH); 3623 if (0) test_mls_4h_4h_h7(TyH); 3624 if (0) test_mul_4s_4s_s0(TyS); 3625 if (0) test_mul_4s_4s_s3(TyS); 3626 if (0) test_mul_2s_2s_s0(TyS); 3627 if (0) test_mul_2s_2s_s3(TyS); 3628 if (0) test_mul_8h_8h_h1(TyH); 3629 if (0) test_mul_8h_8h_h5(TyH); 3630 if (0) test_mul_4h_4h_h2(TyH); 3631 if (0) test_mul_4h_4h_h7(TyH); 3632 3633 // mla 4s,2s,8h,4h,16b,8b 3634 // mls 4s,2s,8h,4h,16b,8b 3635 // mul 4s,2s,8h,4h,16b,8b 3636 if (1) test_mla_4s_4s_4s(TyS); 3637 if (1) test_mla_2s_2s_2s(TyS); 3638 if (1) test_mla_8h_8h_8h(TyH); 3639 if (1) test_mla_4h_4h_4h(TyH); 3640 if (1) test_mla_16b_16b_16b(TyB); 3641 if (1) test_mla_8b_8b_8b(TyB); 3642 if (1) test_mls_4s_4s_4s(TyS); 3643 if (1) test_mls_2s_2s_2s(TyS); 3644 if (1) test_mls_8h_8h_8h(TyH); 3645 if (1) test_mls_4h_4h_4h(TyH); 3646 if (1) test_mls_16b_16b_16b(TyB); 3647 if (1) test_mls_8b_8b_8b(TyB); 3648 if (1) test_mul_4s_4s_4s(TyS); 3649 if (1) test_mul_2s_2s_2s(TyS); 3650 if (1) test_mul_8h_8h_8h(TyH); 3651 if (1) test_mul_4h_4h_4h(TyH); 3652 if (1) test_mul_16b_16b_16b(TyB); 3653 if (1) test_mul_8b_8b_8b(TyB); 3654 3655 // Some of these movi and mvni cases are similar to orr and bic 3656 // cases with immediates. Maybe they should be moved together. 3657 // movi 16b,8b #imm8, LSL #0 3658 if (0) test_movi_16b_0x9C_lsl0(TyB); 3659 if (0) test_movi_8b_0x8B_lsl0(TyB); 3660 3661 // movi 8h,4h #imm8, LSL #0 or 8 3662 // mvni 8h,4h #imm8, LSL #0 or 8 3663 if (0) test_movi_8h_0x5A_lsl0(TyH); 3664 if (0) test_movi_8h_0xA5_lsl8(TyH); 3665 if (0) test_movi_4h_0x5A_lsl0(TyH); 3666 if (0) test_movi_4h_0xA5_lsl8(TyH); 3667 if (0) test_mvni_8h_0x5A_lsl0(TyH); 3668 if (0) test_mvni_8h_0xA5_lsl8(TyH); 3669 if (0) test_mvni_4h_0x5A_lsl0(TyH); 3670 if (0) test_mvni_4h_0xA5_lsl8(TyH); 3671 3672 // movi 4s,2s #imm8, LSL #0, 8, 16, 24 3673 // mvni 4s,2s #imm8, LSL #0, 8, 16, 24 3674 if (1) test_movi_4s_0x5A_lsl0(TyS); 3675 if (0) test_movi_4s_0x6B_lsl8(TyS); 3676 if (0) test_movi_4s_0x49_lsl16(TyS); 3677 if (0) test_movi_4s_0x3D_lsl24(TyS); 3678 if (0) test_movi_2s_0x5A_lsl0(TyS); 3679 if (0) test_movi_2s_0x6B_lsl8(TyS); 3680 if (0) test_movi_2s_0x49_lsl16(TyS); 3681 if (0) test_movi_2s_0x3D_lsl24(TyS); 3682 if (0) test_mvni_4s_0x5A_lsl0(TyS); 3683 if (0) test_mvni_4s_0x6B_lsl8(TyS); 3684 if (0) test_mvni_4s_0x49_lsl16(TyS); 3685 if (0) test_mvni_4s_0x3D_lsl24(TyS); 3686 if (0) test_mvni_2s_0x5A_lsl0(TyS); 3687 if (0) test_mvni_2s_0x6B_lsl8(TyS); 3688 if (0) test_mvni_2s_0x49_lsl16(TyS); 3689 if (0) test_mvni_2s_0x3D_lsl24(TyS); 3690 3691 // movi 4s,2s #imm8, MSL #8 or 16 3692 // mvni 4s,2s #imm8, MSL #8 or 16 3693 if (0) test_movi_4s_0x6B_msl8(TyS); 3694 if (0) test_movi_4s_0x94_msl16(TyS); 3695 if (0) test_movi_2s_0x7A_msl8(TyS); 3696 if (0) test_movi_2s_0xA5_msl16(TyS); 3697 if (0) test_mvni_4s_0x6B_msl8(TyS); 3698 if (0) test_mvni_4s_0x94_msl16(TyS); 3699 if (0) test_mvni_2s_0x7A_msl8(TyS); 3700 if (0) test_mvni_2s_0xA5_msl16(TyS); 3701 3702 // movi d, #imm64 3703 // movi 2d, #imm64 3704 if (0) test_movi_d_0xA5(TyD); 3705 if (0) test_movi_2d_0xB4(TyD); 3706 3707 // not 16b,8b 3708 if (0) test_not_16b_16b(TyB); 3709 if (0) test_not_8b_8b(TyB); 3710 3711 // pmul 16b,8b 3712 if (0) test_pmul_16b_16b_16b(TyB); 3713 if (0) test_pmul_8b_8b_8b(TyB); 3714 3715 // pmull{2} 8h_8b_8b,8h_16b_16b,1q_1d_1d,1q_2d_2d 3716 if (0) test_pmull_8h_8b_8b(TyB); 3717 if (0) test_pmull2_8h_16b_16b(TyB); 3718 //if (0) test_pmull_1q_1d_1d(TyD); 3719 //if (0) test_pmull_1q_2d_2d(TyD); 3720 3721 // rbit 16b,8b 3722 // rev16 16b,8b 3723 // rev32 16b,8b,8h,4h 3724 // rev64 16b,8b,8h,4h,4s,2s 3725 if (0) test_rbit_16b_16b(TyB); 3726 if (0) test_rbit_8b_8b(TyB); 3727 if (0) test_rev16_16b_16b(TyB); 3728 if (0) test_rev16_8b_8b(TyB); 3729 if (0) test_rev32_16b_16b(TyB); 3730 if (0) test_rev32_8b_8b(TyB); 3731 if (0) test_rev32_8h_8h(TyH); 3732 if (0) test_rev32_4h_4h(TyH); 3733 if (0) test_rev64_16b_16b(TyB); 3734 if (0) test_rev64_8b_8b(TyB); 3735 if (0) test_rev64_8h_8h(TyH); 3736 if (0) test_rev64_4h_4h(TyH); 3737 if (0) test_rev64_4s_4s(TyS); 3738 if (0) test_rev64_2s_2s(TyS); 3739 3740 // saba 16b,8b,8h,4h,4s,2s 3741 // uaba 16b,8b,8h,4h,4s,2s 3742 if (0) test_saba_4s_4s_4s(TyS); 3743 if (0) test_saba_2s_2s_2s(TyS); 3744 if (0) test_saba_8h_8h_8h(TyH); 3745 if (0) test_saba_4h_4h_4h(TyH); 3746 if (0) test_saba_16b_16b_16b(TyB); 3747 if (0) test_saba_8b_8b_8b(TyB); 3748 if (0) test_uaba_4s_4s_4s(TyS); 3749 if (0) test_uaba_2s_2s_2s(TyS); 3750 if (0) test_uaba_8h_8h_8h(TyH); 3751 if (0) test_uaba_4h_4h_4h(TyH); 3752 if (0) test_uaba_16b_16b_16b(TyB); 3753 if (0) test_uaba_8b_8b_8b(TyB); 3754 3755 // sabal{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 3756 // uabal{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 3757 if (0) test_sabal_2d_2s_2s(TyS); 3758 if (0) test_sabal2_2d_4s_4s(TyS); 3759 if (0) test_sabal_4s_4h_4h(TyH); 3760 if (0) test_sabal2_4s_8h_8h(TyH); 3761 if (0) test_sabal_8h_8b_8b(TyB); 3762 if (0) test_sabal2_8h_16b_16b(TyB); 3763 if (0) test_uabal_2d_2s_2s(TyS); 3764 if (0) test_uabal2_2d_4s_4s(TyS); 3765 if (0) test_uabal_4s_4h_4h(TyH); 3766 if (0) test_uabal2_4s_8h_8h(TyH); 3767 if (0) test_uabal_8h_8b_8b(TyB); 3768 if (0) test_uabal2_8h_16b_16b(TyB); 3769 3770 // sabd 16b,8b,8h,4h,4s,2s 3771 // uabd 16b,8b,8h,4h,4s,2s 3772 if (0) test_sabd_4s_4s_4s(TyS); 3773 if (0) test_sabd_2s_2s_2s(TyS); 3774 if (0) test_sabd_8h_8h_8h(TyH); 3775 if (0) test_sabd_4h_4h_4h(TyH); 3776 if (0) test_sabd_16b_16b_16b(TyB); 3777 if (0) test_sabd_8b_8b_8b(TyB); 3778 if (0) test_uabd_4s_4s_4s(TyS); 3779 if (0) test_uabd_2s_2s_2s(TyS); 3780 if (0) test_uabd_8h_8h_8h(TyH); 3781 if (0) test_uabd_4h_4h_4h(TyH); 3782 if (0) test_uabd_16b_16b_16b(TyB); 3783 if (0) test_uabd_8b_8b_8b(TyB); 3784 3785 // sabdl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 3786 // uabdl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 3787 if (0) test_sabdl_2d_2s_2s(TyS); 3788 if (0) test_sabdl2_2d_4s_4s(TyS); 3789 if (0) test_sabdl_4s_4h_4h(TyH); 3790 if (0) test_sabdl2_4s_8h_8h(TyH); 3791 if (0) test_sabdl_8h_8b_8b(TyB); 3792 if (0) test_sabdl2_8h_16b_16b(TyB); 3793 if (0) test_uabdl_2d_2s_2s(TyS); 3794 if (0) test_uabdl2_2d_4s_4s(TyS); 3795 if (0) test_uabdl_4s_4h_4h(TyH); 3796 if (0) test_uabdl2_4s_8h_8h(TyH); 3797 if (0) test_uabdl_8h_8b_8b(TyB); 3798 if (0) test_uabdl2_8h_16b_16b(TyB); 3799 3800 // sadalp 4h_8b,8h_16b,2s_4h,4s_8h,1d_2s,2d_4s 3801 // uadalp 4h_8b,8h_16b,2s_4h,4s_8h,1d_2s,2d_4s 3802 if (0) test_sadalp_1d_2s(TyS); 3803 if (0) test_sadalp_2d_4s(TyS); 3804 if (0) test_sadalp_2s_4h(TyH); 3805 if (0) test_sadalp_4s_8h(TyH); 3806 if (0) test_sadalp_4h_8b(TyB); 3807 if (0) test_sadalp_8h_16b(TyB); 3808 if (0) test_uadalp_1d_2s(TyS); 3809 if (0) test_uadalp_2d_4s(TyS); 3810 if (0) test_uadalp_2s_4h(TyH); 3811 if (0) test_uadalp_4s_8h(TyH); 3812 if (0) test_uadalp_4h_8b(TyB); 3813 if (0) test_uadalp_8h_16b(TyB); 3814 3815 // saddl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 3816 // uaddl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 3817 // ssubl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 3818 // usubl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 3819 if (0) test_saddl_2d_2s_2s(TyS); 3820 if (0) test_saddl2_2d_4s_4s(TyS); 3821 if (0) test_saddl_4s_4h_4h(TyH); 3822 if (0) test_saddl2_4s_8h_8h(TyH); 3823 if (0) test_saddl_8h_8b_8b(TyB); 3824 if (0) test_saddl2_8h_16b_16b(TyB); 3825 if (0) test_uaddl_2d_2s_2s(TyS); 3826 if (0) test_uaddl2_2d_4s_4s(TyS); 3827 if (0) test_uaddl_4s_4h_4h(TyH); 3828 if (0) test_uaddl2_4s_8h_8h(TyH); 3829 if (0) test_uaddl_8h_8b_8b(TyB); 3830 if (0) test_uaddl2_8h_16b_16b(TyB); 3831 if (0) test_ssubl_2d_2s_2s(TyS); 3832 if (0) test_ssubl2_2d_4s_4s(TyS); 3833 if (0) test_ssubl_4s_4h_4h(TyH); 3834 if (0) test_ssubl2_4s_8h_8h(TyH); 3835 if (0) test_ssubl_8h_8b_8b(TyB); 3836 if (0) test_ssubl2_8h_16b_16b(TyB); 3837 if (0) test_usubl_2d_2s_2s(TyS); 3838 if (0) test_usubl2_2d_4s_4s(TyS); 3839 if (0) test_usubl_4s_4h_4h(TyH); 3840 if (0) test_usubl2_4s_8h_8h(TyH); 3841 if (0) test_usubl_8h_8b_8b(TyB); 3842 if (0) test_usubl2_8h_16b_16b(TyB); 3843 3844 // saddlp 4h_8b,8h_16b,2s_4h,4s_8h,1d_2s,2d_4s 3845 // uaddlp 4h_8b,8h_16b,2s_4h,4s_8h,1d_2s,2d_4s 3846 if (0) test_saddlp_1d_2s(TyS); 3847 if (0) test_saddlp_2d_4s(TyS); 3848 if (0) test_saddlp_2s_4h(TyH); 3849 if (0) test_saddlp_4s_8h(TyH); 3850 if (0) test_saddlp_4h_8b(TyB); 3851 if (0) test_saddlp_8h_16b(TyB); 3852 if (0) test_uaddlp_1d_2s(TyS); 3853 if (0) test_uaddlp_2d_4s(TyS); 3854 if (0) test_uaddlp_2s_4h(TyH); 3855 if (0) test_uaddlp_4s_8h(TyH); 3856 if (0) test_uaddlp_4h_8b(TyB); 3857 if (0) test_uaddlp_8h_16b(TyB); 3858 3859 // saddlv h_16b/8b, s_8h/4h, d_4s 3860 // uaddlv h_16b/8b, s_8h/4h, d_4s 3861 if (0) test_saddlv_h_16b(TyB); 3862 if (0) test_saddlv_h_8b(TyB); 3863 if (0) test_saddlv_s_8h(TyH); 3864 if (0) test_saddlv_s_4h(TyH); 3865 if (0) test_saddlv_d_4s(TyH); 3866 if (0) test_uaddlv_h_16b(TyB); 3867 if (0) test_uaddlv_h_8b(TyB); 3868 if (0) test_uaddlv_s_8h(TyH); 3869 if (0) test_uaddlv_s_4h(TyH); 3870 if (0) test_uaddlv_d_4s(TyH); 3871 3872 // saddw{2} 8h_8h_16b/8b, 4s_4s_8h/4h, 2d_2d_4s/2s 3873 // uaddw{2} 8h_8h_16b/8b, 4s_4s_8h/4h, 2d_2d_4s/2s 3874 // ssubw{2} 8h_8h_16b/8b, 4s_4s_8h/4h, 2d_2d_4s/2s 3875 // usubw{2} 8h_8h_16b/8b, 4s_4s_8h/4h, 2d_2d_4s/2s 3876 if (0) test_saddw2_8h_8h_16b(TyB); 3877 if (0) test_saddw_8h_8h_8b(TyB); 3878 if (0) test_saddw2_4s_4s_8h(TyH); 3879 if (0) test_saddw_4s_4s_4h(TyH); 3880 if (0) test_saddw2_2d_2d_4s(TyS); 3881 if (0) test_saddw_2d_2d_2s(TyS); 3882 if (0) test_uaddw2_8h_8h_16b(TyB); 3883 if (0) test_uaddw_8h_8h_8b(TyB); 3884 if (0) test_uaddw2_4s_4s_8h(TyH); 3885 if (0) test_uaddw_4s_4s_4h(TyH); 3886 if (0) test_uaddw2_2d_2d_4s(TyS); 3887 if (0) test_uaddw_2d_2d_2s(TyS); 3888 if (0) test_ssubw2_8h_8h_16b(TyB); 3889 if (0) test_ssubw_8h_8h_8b(TyB); 3890 if (0) test_ssubw2_4s_4s_8h(TyH); 3891 if (0) test_ssubw_4s_4s_4h(TyH); 3892 if (0) test_ssubw2_2d_2d_4s(TyS); 3893 if (0) test_ssubw_2d_2d_2s(TyS); 3894 if (0) test_usubw2_8h_8h_16b(TyB); 3895 if (0) test_usubw_8h_8h_8b(TyB); 3896 if (0) test_usubw2_4s_4s_8h(TyH); 3897 if (0) test_usubw_4s_4s_4h(TyH); 3898 if (0) test_usubw2_2d_2d_4s(TyS); 3899 if (0) test_usubw_2d_2d_2s(TyS); 3900 3901 // shadd 16b,8b,8h,4h,4s,2s 3902 // uhadd 16b,8b,8h,4h,4s,2s 3903 // shsub 16b,8b,8h,4h,4s,2s 3904 // uhsub 16b,8b,8h,4h,4s,2s 3905 if (0) test_shadd_4s_4s_4s(TyS); 3906 if (0) test_shadd_2s_2s_2s(TyS); 3907 if (0) test_shadd_8h_8h_8h(TyH); 3908 if (0) test_shadd_4h_4h_4h(TyH); 3909 if (0) test_shadd_16b_16b_16b(TyB); 3910 if (0) test_shadd_8b_8b_8b(TyB); 3911 if (0) test_uhadd_4s_4s_4s(TyS); 3912 if (0) test_uhadd_2s_2s_2s(TyS); 3913 if (0) test_uhadd_8h_8h_8h(TyH); 3914 if (0) test_uhadd_4h_4h_4h(TyH); 3915 if (0) test_uhadd_16b_16b_16b(TyB); 3916 if (0) test_uhadd_8b_8b_8b(TyB); 3917 if (0) test_shsub_4s_4s_4s(TyS); 3918 if (0) test_shsub_2s_2s_2s(TyS); 3919 if (0) test_shsub_8h_8h_8h(TyH); 3920 if (0) test_shsub_4h_4h_4h(TyH); 3921 if (0) test_shsub_16b_16b_16b(TyB); 3922 if (0) test_shsub_8b_8b_8b(TyB); 3923 if (0) test_uhsub_4s_4s_4s(TyS); 3924 if (0) test_uhsub_2s_2s_2s(TyS); 3925 if (0) test_uhsub_8h_8h_8h(TyH); 3926 if (0) test_uhsub_4h_4h_4h(TyH); 3927 if (0) test_uhsub_16b_16b_16b(TyB); 3928 if (0) test_uhsub_8b_8b_8b(TyB); 3929 3930 // shll{2} 8h_8b/16b_#8, 4s_4h/8h_#16, 2d_2s/4s_#32 3931 if (0) test_shll_8h_8b_8(TyB); 3932 if (0) test_shll2_8h_16b_8(TyB); 3933 if (0) test_shll_4s_4h_16(TyH); 3934 if (0) test_shll2_4s_8h_16(TyH); 3935 if (0) test_shll_2d_2s_32(TyS); 3936 if (0) test_shll2_2d_4s_32(TyS); 3937 3938 // shrn{2} 2s/4s_2d, 8h/4h_4s, 8b/16b_8h, #imm in 1 .. elem_bits 3939 // rshrn{2} 2s/4s_2d, 8h/4h_4s, 8b/16b_8h, #imm in 1 .. elem_bits 3940 if (1) test_shrn_2s_2d_1(TyD); 3941 if (0) test_shrn_2s_2d_32(TyD); 3942 if (1) test_shrn2_4s_2d_1(TyD); 3943 if (0) test_shrn2_4s_2d_32(TyD); 3944 if (1) test_shrn_4h_4s_1(TyS); 3945 if (0) test_shrn_4h_4s_16(TyS); 3946 if (1) test_shrn2_8h_4s_1(TyS); 3947 if (0) test_shrn2_8h_4s_16(TyS); 3948 if (1) test_shrn_8b_8h_1(TyH); 3949 if (0) test_shrn_8b_8h_8(TyH); 3950 if (1) test_shrn2_16b_8h_1(TyH); 3951 if (0) test_shrn2_16b_8h_8(TyH); 3952 if (0) test_rshrn_2s_2d_1(TyD); 3953 if (0) test_rshrn_2s_2d_32(TyD); 3954 if (0) test_rshrn2_4s_2d_1(TyD); 3955 if (0) test_rshrn2_4s_2d_32(TyD); 3956 if (0) test_rshrn_4h_4s_1(TyS); 3957 if (0) test_rshrn_4h_4s_16(TyS); 3958 if (0) test_rshrn2_8h_4s_1(TyS); 3959 if (0) test_rshrn2_8h_4s_16(TyS); 3960 if (0) test_rshrn_8b_8h_1(TyH); 3961 if (0) test_rshrn_8b_8h_8(TyH); 3962 if (0) test_rshrn2_16b_8h_1(TyH); 3963 if (0) test_rshrn2_16b_8h_8(TyH); 3964 3965 // sli d_#imm 3966 // sri d_#imm 3967 if (0) test_sli_d_d_0(TyD); 3968 if (0) test_sli_d_d_32(TyD); 3969 if (0) test_sli_d_d_63(TyD); 3970 if (0) test_sri_d_d_1(TyD); 3971 if (0) test_sri_d_d_33(TyD); 3972 if (0) test_sri_d_d_64(TyD); 3973 3974 // sli 2d,4s,2s,8h,4h,16b,8b _#imm 3975 // sri 2d,4s,2s,8h,4h,16b,8b _#imm 3976 if (0) test_sli_2d_2d_0(TyD); 3977 if (1) test_sli_2d_2d_32(TyD); 3978 if (1) test_sli_2d_2d_63(TyD); 3979 if (0) test_sli_4s_4s_0(TyS); 3980 if (1) test_sli_4s_4s_16(TyS); 3981 if (1) test_sli_4s_4s_31(TyS); 3982 if (0) test_sli_2s_2s_0(TyS); 3983 if (1) test_sli_2s_2s_16(TyS); 3984 if (1) test_sli_2s_2s_31(TyS); 3985 if (0) test_sli_8h_8h_0(TyH); 3986 if (1) test_sli_8h_8h_8(TyH); 3987 if (1) test_sli_8h_8h_15(TyH); 3988 if (0) test_sli_4h_4h_0(TyH); 3989 if (1) test_sli_4h_4h_8(TyH); 3990 if (1) test_sli_4h_4h_15(TyH); 3991 if (0) test_sli_16b_16b_0(TyB); 3992 if (1) test_sli_16b_16b_3(TyB); 3993 if (1) test_sli_16b_16b_7(TyB); 3994 if (0) test_sli_8b_8b_0(TyB); 3995 if (1) test_sli_8b_8b_3(TyB); 3996 if (1) test_sli_8b_8b_7(TyB); 3997 if (1) test_sri_2d_2d_1(TyD); 3998 if (1) test_sri_2d_2d_33(TyD); 3999 if (0) test_sri_2d_2d_64(TyD); 4000 if (1) test_sri_4s_4s_1(TyS); 4001 if (1) test_sri_4s_4s_17(TyS); 4002 if (0) test_sri_4s_4s_32(TyS); 4003 if (1) test_sri_2s_2s_1(TyS); 4004 if (1) test_sri_2s_2s_17(TyS); 4005 if (0) test_sri_2s_2s_32(TyS); 4006 if (1) test_sri_8h_8h_1(TyH); 4007 if (1) test_sri_8h_8h_8(TyH); 4008 if (0) test_sri_8h_8h_16(TyH); 4009 if (1) test_sri_4h_4h_1(TyH); 4010 if (1) test_sri_4h_4h_8(TyH); 4011 if (0) test_sri_4h_4h_16(TyH); 4012 if (1) test_sri_16b_16b_1(TyB); 4013 if (1) test_sri_16b_16b_4(TyB); 4014 if (0) test_sri_16b_16b_8(TyB); 4015 if (1) test_sri_8b_8b_1(TyB); 4016 if (1) test_sri_8b_8b_4(TyB); 4017 if (0) test_sri_8b_8b_8(TyB); 4018 4019 // smax 4s,2s,8h,4h,16b,8b 4020 // umax 4s,2s,8h,4h,16b,8b 4021 // smin 4s,2s,8h,4h,16b,8b 4022 // umin 4s,2s,8h,4h,16b,8b 4023 if (1) test_smax_4s_4s_4s(TyS); 4024 if (1) test_smax_2s_2s_2s(TyS); 4025 if (1) test_smax_8h_8h_8h(TyH); 4026 if (1) test_smax_4h_4h_4h(TyH); 4027 if (1) test_smax_16b_16b_16b(TyB); 4028 if (1) test_smax_8b_8b_8b(TyB); 4029 if (1) test_umax_4s_4s_4s(TyS); 4030 if (1) test_umax_2s_2s_2s(TyS); 4031 if (1) test_umax_8h_8h_8h(TyH); 4032 if (1) test_umax_4h_4h_4h(TyH); 4033 if (1) test_umax_16b_16b_16b(TyB); 4034 if (1) test_umax_8b_8b_8b(TyB); 4035 if (1) test_smin_4s_4s_4s(TyS); 4036 if (1) test_smin_2s_2s_2s(TyS); 4037 if (1) test_smin_8h_8h_8h(TyH); 4038 if (1) test_smin_4h_4h_4h(TyH); 4039 if (1) test_smin_16b_16b_16b(TyB); 4040 if (1) test_smin_8b_8b_8b(TyB); 4041 if (1) test_umin_4s_4s_4s(TyS); 4042 if (1) test_umin_2s_2s_2s(TyS); 4043 if (1) test_umin_8h_8h_8h(TyH); 4044 if (1) test_umin_4h_4h_4h(TyH); 4045 if (1) test_umin_16b_16b_16b(TyB); 4046 if (1) test_umin_8b_8b_8b(TyB); 4047 4048 // smaxp 4s,2s,8h,4h,16b,8b 4049 // umaxp 4s,2s,8h,4h,16b,8b 4050 // sminp 4s,2s,8h,4h,16b,8b 4051 // uminp 4s,2s,8h,4h,16b,8b 4052 if (0) test_smaxp_4s_4s_4s(TyS); 4053 if (0) test_smaxp_2s_2s_2s(TyS); 4054 if (0) test_smaxp_8h_8h_8h(TyH); 4055 if (0) test_smaxp_4h_4h_4h(TyH); 4056 if (0) test_smaxp_16b_16b_16b(TyB); 4057 if (0) test_smaxp_8b_8b_8b(TyB); 4058 if (0) test_umaxp_4s_4s_4s(TyS); 4059 if (0) test_umaxp_2s_2s_2s(TyS); 4060 if (0) test_umaxp_8h_8h_8h(TyH); 4061 if (0) test_umaxp_4h_4h_4h(TyH); 4062 if (0) test_umaxp_16b_16b_16b(TyB); 4063 if (0) test_umaxp_8b_8b_8b(TyB); 4064 if (0) test_sminp_4s_4s_4s(TyS); 4065 if (0) test_sminp_2s_2s_2s(TyS); 4066 if (0) test_sminp_8h_8h_8h(TyH); 4067 if (0) test_sminp_4h_4h_4h(TyH); 4068 if (0) test_sminp_16b_16b_16b(TyB); 4069 if (0) test_sminp_8b_8b_8b(TyB); 4070 if (0) test_uminp_4s_4s_4s(TyS); 4071 if (0) test_uminp_2s_2s_2s(TyS); 4072 if (0) test_uminp_8h_8h_8h(TyH); 4073 if (0) test_uminp_4h_4h_4h(TyH); 4074 if (0) test_uminp_16b_16b_16b(TyB); 4075 if (0) test_uminp_8b_8b_8b(TyB); 4076 4077 // smaxv s_4s,h_8h,h_4h,b_16b,b_8b 4078 // umaxv s_4s,h_8h,h_4h,b_16b,b_8b 4079 // sminv s_4s,h_8h,h_4h,b_16b,b_8b 4080 // uminv s_4s,h_8h,h_4h,b_16b,b_8b 4081 if (1) test_SMAXV(); 4082 if (1) test_UMAXV(); 4083 if (1) test_SMINV(); 4084 if (1) test_UMINV(); 4085 4086 // smlal{2} 2d_2s/4s_s[], 4s_4h/8h_h[] 4087 // umlal{2} 2d_2s/4s_s[], 4s_4h/8h_h[] 4088 // smlsl{2} 2d_2s/4s_s[], 4s_4h/8h_h[] 4089 // umlsl{2} 2d_2s/4s_s[], 4s_4h/8h_h[] 4090 // smull{2} 2d_2s/4s_s[]. 4s_4h/8h_h[] 4091 // umull{2} 2d_2s/4s_s[]. 4s_4h/8h_h[] 4092 if (0) test_smlal_2d_2s_s0(TyS); 4093 if (0) test_smlal_2d_2s_s3(TyS); 4094 if (0) test_smlal2_2d_4s_s1(TyS); 4095 if (0) test_smlal2_2d_4s_s2(TyS); 4096 if (0) test_smlal_4s_4h_h0(TyH); 4097 if (0) test_smlal_4s_4h_h7(TyH); 4098 if (0) test_smlal2_4s_8h_h1(TyH); 4099 if (0) test_smlal2_4s_8h_h4(TyH); 4100 if (0) test_umlal_2d_2s_s0(TyS); 4101 if (0) test_umlal_2d_2s_s3(TyS); 4102 if (0) test_umlal2_2d_4s_s1(TyS); 4103 if (0) test_umlal2_2d_4s_s2(TyS); 4104 if (0) test_umlal_4s_4h_h0(TyH); 4105 if (0) test_umlal_4s_4h_h7(TyH); 4106 if (0) test_umlal2_4s_8h_h1(TyH); 4107 if (0) test_umlal2_4s_8h_h4(TyH); 4108 if (0) test_smlsl_2d_2s_s0(TyS); 4109 if (0) test_smlsl_2d_2s_s3(TyS); 4110 if (0) test_smlsl2_2d_4s_s1(TyS); 4111 if (0) test_smlsl2_2d_4s_s2(TyS); 4112 if (0) test_smlsl_4s_4h_h0(TyH); 4113 if (0) test_smlsl_4s_4h_h7(TyH); 4114 if (0) test_smlsl2_4s_8h_h1(TyH); 4115 if (0) test_smlsl2_4s_8h_h4(TyH); 4116 if (0) test_umlsl_2d_2s_s0(TyS); 4117 if (0) test_umlsl_2d_2s_s3(TyS); 4118 if (0) test_umlsl2_2d_4s_s1(TyS); 4119 if (0) test_umlsl2_2d_4s_s2(TyS); 4120 if (0) test_umlsl_4s_4h_h0(TyH); 4121 if (0) test_umlsl_4s_4h_h7(TyH); 4122 if (0) test_umlsl2_4s_8h_h1(TyH); 4123 if (0) test_umlsl2_4s_8h_h4(TyH); 4124 if (0) test_smull_2d_2s_s0(TyS); 4125 if (0) test_smull_2d_2s_s3(TyS); 4126 if (0) test_smull2_2d_4s_s1(TyS); 4127 if (0) test_smull2_2d_4s_s2(TyS); 4128 if (0) test_smull_4s_4h_h0(TyH); 4129 if (0) test_smull_4s_4h_h7(TyH); 4130 if (0) test_smull2_4s_8h_h1(TyH); 4131 if (0) test_smull2_4s_8h_h4(TyH); 4132 if (0) test_umull_2d_2s_s0(TyS); 4133 if (0) test_umull_2d_2s_s3(TyS); 4134 if (0) test_umull2_2d_4s_s1(TyS); 4135 if (0) test_umull2_2d_4s_s2(TyS); 4136 if (0) test_umull_4s_4h_h0(TyH); 4137 if (0) test_umull_4s_4h_h7(TyH); 4138 if (0) test_umull2_4s_8h_h1(TyH); 4139 if (0) test_umull2_4s_8h_h4(TyH); 4140 4141 // smlal{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 4142 // umlal{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 4143 // smlsl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 4144 // umlsl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 4145 // smull{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 4146 // umull{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 4147 if (0) test_smlal_2d_2s_2s(TyS); 4148 if (0) test_smlal2_2d_4s_4s(TyS); 4149 if (0) test_smlal_4s_4h_4h(TyH); 4150 if (0) test_smlal2_4s_8h_8h(TyH); 4151 if (0) test_smlal_8h_8b_8b(TyB); 4152 if (0) test_smlal2_8h_16b_16b(TyB); 4153 if (0) test_umlal_2d_2s_2s(TyS); 4154 if (0) test_umlal2_2d_4s_4s(TyS); 4155 if (0) test_umlal_4s_4h_4h(TyH); 4156 if (0) test_umlal2_4s_8h_8h(TyH); 4157 if (0) test_umlal_8h_8b_8b(TyB); 4158 if (0) test_umlal2_8h_16b_16b(TyB); 4159 if (0) test_smlsl_2d_2s_2s(TyS); 4160 if (0) test_smlsl2_2d_4s_4s(TyS); 4161 if (0) test_smlsl_4s_4h_4h(TyH); 4162 if (0) test_smlsl2_4s_8h_8h(TyH); 4163 if (0) test_smlsl_8h_8b_8b(TyB); 4164 if (0) test_smlsl2_8h_16b_16b(TyB); 4165 if (0) test_umlsl_2d_2s_2s(TyS); 4166 if (0) test_umlsl2_2d_4s_4s(TyS); 4167 if (0) test_umlsl_4s_4h_4h(TyH); 4168 if (0) test_umlsl2_4s_8h_8h(TyH); 4169 if (0) test_umlsl_8h_8b_8b(TyB); 4170 if (0) test_umlsl2_8h_16b_16b(TyB); 4171 if (0) test_smull_2d_2s_2s(TyS); 4172 if (0) test_smull2_2d_4s_4s(TyS); 4173 if (0) test_smull_4s_4h_4h(TyH); 4174 if (0) test_smull2_4s_8h_8h(TyH); 4175 if (0) test_smull_8h_8b_8b(TyB); 4176 if (0) test_smull2_8h_16b_16b(TyB); 4177 if (1) test_umull_2d_2s_2s(TyS); 4178 if (0) test_umull2_2d_4s_4s(TyS); 4179 if (1) test_umull_4s_4h_4h(TyH); 4180 if (0) test_umull2_4s_8h_8h(TyH); 4181 if (1) test_umull_8h_8b_8b(TyB); 4182 if (0) test_umull2_8h_16b_16b(TyB); 4183 4184 // smov w_b[], w_h[], x_b[], x_h[], x_s[] 4185 // umov w_b[], w_h[], w_s[], x_d[] 4186 if (1) test_umov_x_d0(TyD); 4187 if (1) test_umov_x_d1(TyD); 4188 if (1) test_umov_w_s0(TyS); 4189 if (1) test_umov_w_s3(TyS); 4190 if (1) test_umov_w_h0(TyH); 4191 if (1) test_umov_w_h7(TyH); 4192 if (1) test_umov_w_b0(TyB); 4193 if (1) test_umov_w_b15(TyB); 4194 if (1) test_smov_x_s0(TyS); 4195 if (1) test_smov_x_s3(TyS); 4196 if (1) test_smov_x_h0(TyH); 4197 if (1) test_smov_x_h7(TyH); 4198 if (1) test_smov_w_h0(TyH); 4199 if (1) test_smov_w_h7(TyH); 4200 if (1) test_smov_x_b0(TyB); 4201 if (1) test_smov_x_b15(TyB); 4202 if (1) test_smov_w_b0(TyB); 4203 if (1) test_smov_w_b15(TyB); 4204 4205 // sqabs d,s,h,b 4206 // sqneg d,s,h,b 4207 if (0) test_sqabs_d_d(TyD); 4208 if (0) test_sqabs_s_s(TyS); 4209 if (0) test_sqabs_h_h(TyH); 4210 if (0) test_sqabs_b_b(TyB); 4211 if (0) test_sqneg_d_d(TyD); 4212 if (0) test_sqneg_s_s(TyS); 4213 if (0) test_sqneg_h_h(TyH); 4214 if (0) test_sqneg_b_b(TyB); 4215 4216 // sqabs 2d,4s,2s,8h,4h,16b,8b 4217 // sqneg 2d,4s,2s,8h,4h,16b,8b 4218 if (0) test_sqabs_2d_2d(TyD); 4219 if (0) test_sqabs_4s_4s(TyS); 4220 if (0) test_sqabs_2s_2s(TyS); 4221 if (0) test_sqabs_8h_8h(TyH); 4222 if (0) test_sqabs_4h_4h(TyH); 4223 if (0) test_sqabs_16b_16b(TyB); 4224 if (0) test_sqabs_8b_8b(TyB); 4225 if (0) test_sqneg_2d_2d(TyD); 4226 if (0) test_sqneg_4s_4s(TyS); 4227 if (0) test_sqneg_2s_2s(TyS); 4228 if (0) test_sqneg_8h_8h(TyH); 4229 if (0) test_sqneg_4h_4h(TyH); 4230 if (0) test_sqneg_16b_16b(TyB); 4231 if (0) test_sqneg_8b_8b(TyB); 4232 4233 // sqadd d,s,h,b 4234 // uqadd d,s,h,b 4235 // sqsub d,s,h,b 4236 // uqsub d,s,h,b 4237 if (0) test_sqadd_d_d_d(TyD); 4238 if (0) test_sqadd_s_s_s(TyS); 4239 if (0) test_sqadd_h_h_h(TyH); 4240 if (0) test_sqadd_b_b_b(TyB); 4241 if (0) test_uqadd_d_d_d(TyD); 4242 if (0) test_uqadd_s_s_s(TyS); 4243 if (0) test_uqadd_h_h_h(TyH); 4244 if (0) test_uqadd_b_b_b(TyB); 4245 if (0) test_sqsub_d_d_d(TyD); 4246 if (0) test_sqsub_s_s_s(TyS); 4247 if (0) test_sqsub_h_h_h(TyH); 4248 if (0) test_sqsub_b_b_b(TyB); 4249 if (0) test_uqsub_d_d_d(TyD); 4250 if (0) test_uqsub_s_s_s(TyS); 4251 if (0) test_uqsub_h_h_h(TyH); 4252 if (0) test_uqsub_b_b_b(TyB); 4253 4254 // sqadd 2d,4s,2s,8h,4h,16b,8b 4255 // uqadd 2d,4s,2s,8h,4h,16b,8b 4256 // sqsub 2d,4s,2s,8h,4h,16b,8b 4257 // uqsub 2d,4s,2s,8h,4h,16b,8b 4258 if (0) test_sqadd_2d_2d_2d(TyD); 4259 if (0) test_sqadd_4s_4s_4s(TyS); 4260 if (0) test_sqadd_2s_2s_2s(TyS); 4261 if (0) test_sqadd_8h_8h_8h(TyH); 4262 if (0) test_sqadd_4h_4h_4h(TyH); 4263 if (0) test_sqadd_16b_16b_16b(TyB); 4264 if (0) test_sqadd_8b_8b_8b(TyB); 4265 if (0) test_uqadd_2d_2d_2d(TyD); 4266 if (0) test_uqadd_4s_4s_4s(TyS); 4267 if (0) test_uqadd_2s_2s_2s(TyS); 4268 if (0) test_uqadd_8h_8h_8h(TyH); 4269 if (0) test_uqadd_4h_4h_4h(TyH); 4270 if (0) test_uqadd_16b_16b_16b(TyB); 4271 if (0) test_uqadd_8b_8b_8b(TyB); 4272 if (0) test_sqsub_2d_2d_2d(TyD); 4273 if (0) test_sqsub_4s_4s_4s(TyS); 4274 if (0) test_sqsub_2s_2s_2s(TyS); 4275 if (0) test_sqsub_8h_8h_8h(TyH); 4276 if (0) test_sqsub_4h_4h_4h(TyH); 4277 if (0) test_sqsub_16b_16b_16b(TyB); 4278 if (0) test_sqsub_8b_8b_8b(TyB); 4279 if (0) test_uqsub_2d_2d_2d(TyD); 4280 if (0) test_uqsub_4s_4s_4s(TyS); 4281 if (0) test_uqsub_2s_2s_2s(TyS); 4282 if (0) test_uqsub_8h_8h_8h(TyH); 4283 if (0) test_uqsub_4h_4h_4h(TyH); 4284 if (0) test_uqsub_16b_16b_16b(TyB); 4285 if (0) test_uqsub_8b_8b_8b(TyB); 4286 4287 // sqdmlal d_s_s[], s_h_h[] 4288 // sqdmlsl d_s_s[], s_h_h[] 4289 // sqdmull d_s_s[], s_h_h[] 4290 if (0) test_sqdmlal_d_s_s0(TyS); 4291 if (0) test_sqdmlal_d_s_s3(TyS); 4292 if (0) test_sqdmlal_s_h_h1(TyH); 4293 if (0) test_sqdmlal_s_h_h5(TyH); 4294 if (0) test_sqdmlsl_d_s_s0(TyS); 4295 if (0) test_sqdmlsl_d_s_s3(TyS); 4296 if (0) test_sqdmlsl_s_h_h1(TyH); 4297 if (0) test_sqdmlsl_s_h_h5(TyH); 4298 if (0) test_sqdmull_d_s_s0(TyS); 4299 if (0) test_sqdmull_d_s_s3(TyS); 4300 if (0) test_sqdmull_s_h_h1(TyH); 4301 if (0) test_sqdmull_s_h_h5(TyH); 4302 4303 // sqdmlal{2} 2d_2s/4s_s[], 4s_4h/8h_h[] 4304 // sqdmlsl{2} 2d_2s/4s_s[], 4s_4h/8h_h[] 4305 // sqdmull{2} 2d_2s/4s_s[], 4s_4h/2h_h[] 4306 if (0) test_sqdmlal_2d_2s_s0(TyS); 4307 if (0) test_sqdmlal_2d_2s_s3(TyS); 4308 if (0) test_sqdmlal2_2d_4s_s1(TyS); 4309 if (0) test_sqdmlal2_2d_4s_s2(TyS); 4310 if (0) test_sqdmlal_4s_4h_h0(TyH); 4311 if (0) test_sqdmlal_4s_4h_h7(TyH); 4312 if (0) test_sqdmlal2_4s_8h_h1(TyH); 4313 if (0) test_sqdmlal2_4s_8h_h4(TyH); 4314 if (0) test_sqdmlsl_2d_2s_s0(TyS); 4315 if (0) test_sqdmlsl_2d_2s_s3(TyS); 4316 if (0) test_sqdmlsl2_2d_4s_s1(TyS); 4317 if (0) test_sqdmlsl2_2d_4s_s2(TyS); 4318 if (0) test_sqdmlsl_4s_4h_h0(TyH); 4319 if (0) test_sqdmlsl_4s_4h_h7(TyH); 4320 if (0) test_sqdmlsl2_4s_8h_h1(TyH); 4321 if (0) test_sqdmlsl2_4s_8h_h4(TyH); 4322 if (0) test_sqdmull_2d_2s_s0(TyS); 4323 if (0) test_sqdmull_2d_2s_s3(TyS); 4324 if (0) test_sqdmull2_2d_4s_s1(TyS); 4325 if (0) test_sqdmull2_2d_4s_s2(TyS); 4326 if (0) test_sqdmull_4s_4h_h0(TyH); 4327 if (0) test_sqdmull_4s_4h_h7(TyH); 4328 if (0) test_sqdmull2_4s_8h_h1(TyH); 4329 if (0) test_sqdmull2_4s_8h_h4(TyH); 4330 4331 // sqdmlal d_s_s, s_h_h 4332 // sqdmlsl d_s_s, s_h_h 4333 // sqdmull d_s_s, s_h_h 4334 if (0) test_sqdmlal_d_s_s(TyS); 4335 if (0) test_sqdmlal_s_h_h(TyH); 4336 if (0) test_sqdmlsl_d_s_s(TyS); 4337 if (0) test_sqdmlsl_s_h_h(TyH); 4338 if (0) test_sqdmull_d_s_s(TyS); 4339 if (0) test_sqdmull_s_h_h(TyH); 4340 4341 // sqdmlal{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h) 4342 // sqdmlsl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h) 4343 // sqdmull{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h) 4344 if (0) test_sqdmlal_2d_2s_2s(TyS); 4345 if (0) test_sqdmlal2_2d_4s_4s(TyS); 4346 if (0) test_sqdmlal_4s_4h_4h(TyH); 4347 if (0) test_sqdmlal2_4s_8h_8h(TyH); 4348 if (0) test_sqdmlsl_2d_2s_2s(TyS); 4349 if (0) test_sqdmlsl2_2d_4s_4s(TyS); 4350 if (0) test_sqdmlsl_4s_4h_4h(TyH); 4351 if (0) test_sqdmlsl2_4s_8h_8h(TyH); 4352 if (0) test_sqdmull_2d_2s_2s(TyS); 4353 if (0) test_sqdmull2_2d_4s_4s(TyS); 4354 if (0) test_sqdmull_4s_4h_4h(TyH); 4355 if (0) test_sqdmull2_4s_8h_8h(TyH); 4356 4357 // sqdmulh s_s_s[], h_h_h[] 4358 // sqrdmulh s_s_s[], h_h_h[] 4359 if (0) test_sqdmulh_s_s_s1(TyS); 4360 if (0) test_sqdmulh_s_s_s3(TyS); 4361 if (0) test_sqdmulh_h_h_h2(TyH); 4362 if (0) test_sqdmulh_h_h_h7(TyH); 4363 if (0) test_sqrdmulh_s_s_s1(TyS); 4364 if (0) test_sqrdmulh_s_s_s3(TyS); 4365 if (0) test_sqrdmulh_h_h_h2(TyH); 4366 if (0) test_sqrdmulh_h_h_h7(TyH); 4367 4368 // sqdmulh 4s_4s_s[], 2s_2s_s[], 8h_8h_h[], 4h_4h_h[] 4369 // sqrdmulh 4s_4s_s[], 2s_2s_s[], 8h_8h_h[], 4h_4h_h[] 4370 if (0) test_sqdmulh_4s_4s_s1(TyS); 4371 if (0) test_sqdmulh_4s_4s_s3(TyS); 4372 if (0) test_sqdmulh_2s_2s_s1(TyS); 4373 if (0) test_sqdmulh_2s_2s_s3(TyS); 4374 if (0) test_sqdmulh_8h_8h_h2(TyH); 4375 if (0) test_sqdmulh_8h_8h_h7(TyH); 4376 if (0) test_sqdmulh_4h_4h_h2(TyH); 4377 if (0) test_sqdmulh_4h_4h_h7(TyH); 4378 if (0) test_sqrdmulh_4s_4s_s1(TyS); 4379 if (0) test_sqrdmulh_4s_4s_s3(TyS); 4380 if (0) test_sqrdmulh_2s_2s_s1(TyS); 4381 if (0) test_sqrdmulh_2s_2s_s3(TyS); 4382 if (0) test_sqrdmulh_8h_8h_h2(TyH); 4383 if (0) test_sqrdmulh_8h_8h_h7(TyH); 4384 if (0) test_sqrdmulh_4h_4h_h2(TyH); 4385 if (0) test_sqrdmulh_4h_4h_h7(TyH); 4386 4387 // sqdmulh h,s 4388 // sqrdmulh h,s 4389 if (0) test_sqdmulh_s_s_s(TyS); 4390 if (0) test_sqdmulh_h_h_h(TyH); 4391 if (0) test_sqrdmulh_s_s_s(TyS); 4392 if (0) test_sqrdmulh_h_h_h(TyH); 4393 4394 // sqdmulh 4s,2s,8h,4h 4395 // sqrdmulh 4s,2s,8h,4h 4396 if (0) test_sqdmulh_4s_4s_4s(TyS); 4397 if (0) test_sqdmulh_2s_2s_2s(TyS); 4398 if (0) test_sqdmulh_8h_8h_8h(TyH); 4399 if (0) test_sqdmulh_4h_4h_4h(TyH); 4400 if (0) test_sqrdmulh_4s_4s_4s(TyS); 4401 if (0) test_sqrdmulh_2s_2s_2s(TyS); 4402 if (0) test_sqrdmulh_8h_8h_8h(TyH); 4403 if (0) test_sqrdmulh_4h_4h_4h(TyH); 4404 4405 // sqshl (reg) d,s,h,b 4406 // uqshl (reg) d,s,h,b 4407 // sqrshl (reg) d,s,h,b 4408 // uqrshl (reg) d,s,h,b 4409 if (0) test_sqshl_d_d_d(TyD); 4410 if (0) test_sqshl_s_s_s(TyS); 4411 if (0) test_sqshl_h_h_h(TyH); 4412 if (0) test_sqshl_b_b_b(TyB); 4413 if (0) test_uqshl_d_d_d(TyD); 4414 if (0) test_uqshl_s_s_s(TyS); 4415 if (0) test_uqshl_h_h_h(TyH); 4416 if (0) test_uqshl_b_b_b(TyB); 4417 if (0) test_sqrshl_d_d_d(TyD); 4418 if (0) test_sqrshl_s_s_s(TyS); 4419 if (0) test_sqrshl_h_h_h(TyH); 4420 if (0) test_sqrshl_b_b_b(TyB); 4421 if (0) test_uqrshl_d_d_d(TyD); 4422 if (0) test_uqrshl_s_s_s(TyS); 4423 if (0) test_uqrshl_h_h_h(TyH); 4424 if (0) test_uqrshl_b_b_b(TyB); 4425 4426 // sqshl (reg) 2d,4s,2s,8h,4h,16b,8b 4427 // uqshl (reg) 2d,4s,2s,8h,4h,16b,8b 4428 // sqrshl (reg) 2d,4s,2s,8h,4h,16b,8b 4429 // uqrshl (reg) 2d,4s,2s,8h,4h,16b,8b 4430 if (0) test_sqshl_2d_2d_2d(TyD); 4431 if (0) test_sqshl_4s_4s_4s(TyS); 4432 if (0) test_sqshl_2s_2s_2s(TyS); 4433 if (0) test_sqshl_8h_8h_8h(TyH); 4434 if (0) test_sqshl_4h_4h_4h(TyH); 4435 if (0) test_sqshl_16b_16b_16b(TyB); 4436 if (0) test_sqshl_8b_8b_8b(TyB); 4437 if (0) test_uqshl_2d_2d_2d(TyD); 4438 if (0) test_uqshl_4s_4s_4s(TyS); 4439 if (0) test_uqshl_2s_2s_2s(TyS); 4440 if (0) test_uqshl_8h_8h_8h(TyH); 4441 if (0) test_uqshl_4h_4h_4h(TyH); 4442 if (0) test_uqshl_16b_16b_16b(TyB); 4443 if (0) test_uqshl_8b_8b_8b(TyB); 4444 if (0) test_sqrshl_2d_2d_2d(TyD); 4445 if (0) test_sqrshl_4s_4s_4s(TyS); 4446 if (0) test_sqrshl_2s_2s_2s(TyS); 4447 if (0) test_sqrshl_8h_8h_8h(TyH); 4448 if (0) test_sqrshl_4h_4h_4h(TyH); 4449 if (0) test_sqrshl_16b_16b_16b(TyB); 4450 if (0) test_sqrshl_8b_8b_8b(TyB); 4451 if (0) test_uqrshl_2d_2d_2d(TyD); 4452 if (0) test_uqrshl_4s_4s_4s(TyS); 4453 if (0) test_uqrshl_2s_2s_2s(TyS); 4454 if (0) test_uqrshl_8h_8h_8h(TyH); 4455 if (0) test_uqrshl_4h_4h_4h(TyH); 4456 if (0) test_uqrshl_16b_16b_16b(TyB); 4457 if (0) test_uqrshl_8b_8b_8b(TyB); 4458 4459 // sqrshrn s_d, h_s, b_h #imm 4460 // uqrshrn s_d, h_s, b_h #imm 4461 // sqshrn s_d, h_s, b_h #imm 4462 // uqshrn s_d, h_s, b_h #imm 4463 // sqrshrun s_d, h_s, b_h #imm 4464 // sqshrun s_d, h_s, b_h #imm 4465 if (0) test_sqrshrn_s_d_1(TyD); 4466 if (0) test_sqrshrn_s_d_17(TyD); 4467 if (0) test_sqrshrn_s_d_32(TyD); 4468 if (0) test_sqrshrn_h_s_1(TyS); 4469 if (0) test_sqrshrn_h_s_9(TyS); 4470 if (0) test_sqrshrn_h_s_16(TyS); 4471 if (0) test_sqrshrn_b_h_1(TyH); 4472 if (0) test_sqrshrn_b_h_4(TyH); 4473 if (0) test_sqrshrn_b_h_8(TyH); 4474 if (0) test_uqrshrn_s_d_1(TyD); 4475 if (0) test_uqrshrn_s_d_17(TyD); 4476 if (0) test_uqrshrn_s_d_32(TyD); 4477 if (0) test_uqrshrn_h_s_1(TyS); 4478 if (0) test_uqrshrn_h_s_9(TyS); 4479 if (0) test_uqrshrn_h_s_16(TyS); 4480 if (0) test_uqrshrn_b_h_1(TyH); 4481 if (0) test_uqrshrn_b_h_4(TyH); 4482 if (0) test_uqrshrn_b_h_8(TyH); 4483 if (0) test_sqshrn_s_d_1(TyD); 4484 if (0) test_sqshrn_s_d_17(TyD); 4485 if (0) test_sqshrn_s_d_32(TyD); 4486 if (0) test_sqshrn_h_s_1(TyS); 4487 if (0) test_sqshrn_h_s_9(TyS); 4488 if (0) test_sqshrn_h_s_16(TyS); 4489 if (0) test_sqshrn_b_h_1(TyH); 4490 if (0) test_sqshrn_b_h_4(TyH); 4491 if (0) test_sqshrn_b_h_8(TyH); 4492 if (0) test_uqshrn_s_d_1(TyD); 4493 if (0) test_uqshrn_s_d_17(TyD); 4494 if (0) test_uqshrn_s_d_32(TyD); 4495 if (0) test_uqshrn_h_s_1(TyS); 4496 if (0) test_uqshrn_h_s_9(TyS); 4497 if (0) test_uqshrn_h_s_16(TyS); 4498 if (0) test_uqshrn_b_h_1(TyH); 4499 if (0) test_uqshrn_b_h_4(TyH); 4500 if (0) test_uqshrn_b_h_8(TyH); 4501 if (0) test_sqrshrun_s_d_1(TyD); 4502 if (0) test_sqrshrun_s_d_17(TyD); 4503 if (0) test_sqrshrun_s_d_32(TyD); 4504 if (0) test_sqrshrun_h_s_1(TyS); 4505 if (0) test_sqrshrun_h_s_9(TyS); 4506 if (0) test_sqrshrun_h_s_16(TyS); 4507 if (0) test_sqrshrun_b_h_1(TyH); 4508 if (0) test_sqrshrun_b_h_4(TyH); 4509 if (0) test_sqrshrun_b_h_8(TyH); 4510 if (0) test_sqshrun_s_d_1(TyD); 4511 if (0) test_sqshrun_s_d_17(TyD); 4512 if (0) test_sqshrun_s_d_32(TyD); 4513 if (0) test_sqshrun_h_s_1(TyS); 4514 if (0) test_sqshrun_h_s_9(TyS); 4515 if (0) test_sqshrun_h_s_16(TyS); 4516 if (0) test_sqshrun_b_h_1(TyH); 4517 if (0) test_sqshrun_b_h_4(TyH); 4518 if (0) test_sqshrun_b_h_8(TyH); 4519 4520 // sqrshrn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h, #imm 4521 // uqrshrn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h, #imm 4522 // sqshrn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h, #imm 4523 // uqshrn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h, #imm 4524 // sqrshrun{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h, #imm 4525 // sqshrun{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h, #imm 4526 if (0) test_sqrshrn_2s_2d_1(TyD); 4527 if (0) test_sqrshrn_2s_2d_17(TyD); 4528 if (0) test_sqrshrn_2s_2d_32(TyD); 4529 if (0) test_sqrshrn2_4s_2d_1(TyD); 4530 if (0) test_sqrshrn2_4s_2d_17(TyD); 4531 if (0) test_sqrshrn2_4s_2d_32(TyD); 4532 if (0) test_sqrshrn_4h_4s_1(TyS); 4533 if (0) test_sqrshrn_4h_4s_9(TyS); 4534 if (0) test_sqrshrn_4h_4s_16(TyS); 4535 if (0) test_sqrshrn2_8h_4s_1(TyS); 4536 if (0) test_sqrshrn2_8h_4s_9(TyS); 4537 if (0) test_sqrshrn2_8h_4s_16(TyS); 4538 if (0) test_sqrshrn_8b_8h_1(TyH); 4539 if (0) test_sqrshrn_8b_8h_4(TyH); 4540 if (0) test_sqrshrn_8b_8h_8(TyH); 4541 if (0) test_sqrshrn2_16b_8h_1(TyH); 4542 if (0) test_sqrshrn2_16b_8h_4(TyH); 4543 if (0) test_sqrshrn2_16b_8h_8(TyH); 4544 if (0) test_uqrshrn_2s_2d_1(TyD); 4545 if (0) test_uqrshrn_2s_2d_17(TyD); 4546 if (0) test_uqrshrn_2s_2d_32(TyD); 4547 if (0) test_uqrshrn2_4s_2d_1(TyD); 4548 if (0) test_uqrshrn2_4s_2d_17(TyD); 4549 if (0) test_uqrshrn2_4s_2d_32(TyD); 4550 if (0) test_uqrshrn_4h_4s_1(TyS); 4551 if (0) test_uqrshrn_4h_4s_9(TyS); 4552 if (0) test_uqrshrn_4h_4s_16(TyS); 4553 if (0) test_uqrshrn2_8h_4s_1(TyS); 4554 if (0) test_uqrshrn2_8h_4s_9(TyS); 4555 if (0) test_uqrshrn2_8h_4s_16(TyS); 4556 if (0) test_uqrshrn_8b_8h_1(TyH); 4557 if (0) test_uqrshrn_8b_8h_4(TyH); 4558 if (0) test_uqrshrn_8b_8h_8(TyH); 4559 if (0) test_uqrshrn2_16b_8h_1(TyH); 4560 if (0) test_uqrshrn2_16b_8h_4(TyH); 4561 if (0) test_uqrshrn2_16b_8h_8(TyH); 4562 if (0) test_sqshrn_2s_2d_1(TyD); 4563 if (0) test_sqshrn_2s_2d_17(TyD); 4564 if (0) test_sqshrn_2s_2d_32(TyD); 4565 if (0) test_sqshrn2_4s_2d_1(TyD); 4566 if (0) test_sqshrn2_4s_2d_17(TyD); 4567 if (0) test_sqshrn2_4s_2d_32(TyD); 4568 if (0) test_sqshrn_4h_4s_1(TyS); 4569 if (0) test_sqshrn_4h_4s_9(TyS); 4570 if (0) test_sqshrn_4h_4s_16(TyS); 4571 if (0) test_sqshrn2_8h_4s_1(TyS); 4572 if (0) test_sqshrn2_8h_4s_9(TyS); 4573 if (0) test_sqshrn2_8h_4s_16(TyS); 4574 if (0) test_sqshrn_8b_8h_1(TyH); 4575 if (0) test_sqshrn_8b_8h_4(TyH); 4576 if (0) test_sqshrn_8b_8h_8(TyH); 4577 if (0) test_sqshrn2_16b_8h_1(TyH); 4578 if (0) test_sqshrn2_16b_8h_4(TyH); 4579 if (0) test_sqshrn2_16b_8h_8(TyH); 4580 if (0) test_uqshrn_2s_2d_1(TyD); 4581 if (0) test_uqshrn_2s_2d_17(TyD); 4582 if (0) test_uqshrn_2s_2d_32(TyD); 4583 if (0) test_uqshrn2_4s_2d_1(TyD); 4584 if (0) test_uqshrn2_4s_2d_17(TyD); 4585 if (0) test_uqshrn2_4s_2d_32(TyD); 4586 if (0) test_uqshrn_4h_4s_1(TyS); 4587 if (0) test_uqshrn_4h_4s_9(TyS); 4588 if (0) test_uqshrn_4h_4s_16(TyS); 4589 if (0) test_uqshrn2_8h_4s_1(TyS); 4590 if (0) test_uqshrn2_8h_4s_9(TyS); 4591 if (0) test_uqshrn2_8h_4s_16(TyS); 4592 if (0) test_uqshrn_8b_8h_1(TyH); 4593 if (0) test_uqshrn_8b_8h_4(TyH); 4594 if (0) test_uqshrn_8b_8h_8(TyH); 4595 if (0) test_uqshrn2_16b_8h_1(TyH); 4596 if (0) test_uqshrn2_16b_8h_4(TyH); 4597 if (0) test_uqshrn2_16b_8h_8(TyH); 4598 if (0) test_sqrshrun_2s_2d_1(TyD); 4599 if (0) test_sqrshrun_2s_2d_17(TyD); 4600 if (0) test_sqrshrun_2s_2d_32(TyD); 4601 if (0) test_sqrshrun2_4s_2d_1(TyD); 4602 if (0) test_sqrshrun2_4s_2d_17(TyD); 4603 if (0) test_sqrshrun2_4s_2d_32(TyD); 4604 if (0) test_sqrshrun_4h_4s_1(TyS); 4605 if (0) test_sqrshrun_4h_4s_9(TyS); 4606 if (0) test_sqrshrun_4h_4s_16(TyS); 4607 if (0) test_sqrshrun2_8h_4s_1(TyS); 4608 if (0) test_sqrshrun2_8h_4s_9(TyS); 4609 if (0) test_sqrshrun2_8h_4s_16(TyS); 4610 if (0) test_sqrshrun_8b_8h_1(TyH); 4611 if (0) test_sqrshrun_8b_8h_4(TyH); 4612 if (0) test_sqrshrun_8b_8h_8(TyH); 4613 if (0) test_sqrshrun2_16b_8h_1(TyH); 4614 if (0) test_sqrshrun2_16b_8h_4(TyH); 4615 if (0) test_sqrshrun2_16b_8h_8(TyH); 4616 if (0) test_sqshrun_2s_2d_1(TyD); 4617 if (0) test_sqshrun_2s_2d_17(TyD); 4618 if (0) test_sqshrun_2s_2d_32(TyD); 4619 if (0) test_sqshrun2_4s_2d_1(TyD); 4620 if (0) test_sqshrun2_4s_2d_17(TyD); 4621 if (0) test_sqshrun2_4s_2d_32(TyD); 4622 if (0) test_sqshrun_4h_4s_1(TyS); 4623 if (0) test_sqshrun_4h_4s_9(TyS); 4624 if (0) test_sqshrun_4h_4s_16(TyS); 4625 if (0) test_sqshrun2_8h_4s_1(TyS); 4626 if (0) test_sqshrun2_8h_4s_9(TyS); 4627 if (0) test_sqshrun2_8h_4s_16(TyS); 4628 if (0) test_sqshrun_8b_8h_1(TyH); 4629 if (0) test_sqshrun_8b_8h_4(TyH); 4630 if (0) test_sqshrun_8b_8h_8(TyH); 4631 if (0) test_sqshrun2_16b_8h_1(TyH); 4632 if (0) test_sqshrun2_16b_8h_4(TyH); 4633 if (0) test_sqshrun2_16b_8h_8(TyH); 4634 4635 // sqshl (imm) d,s,h,b _#imm 4636 // uqshl (imm) d,s,h,b _#imm 4637 // sqshlu (imm) d,s,h,b _#imm 4638 if (0) test_sqshl_d_d_0(TyD); 4639 if (0) test_sqshl_d_d_32(TyD); 4640 if (0) test_sqshl_d_d_63(TyD); 4641 if (0) test_sqshl_s_s_0(TyS); 4642 if (0) test_sqshl_s_s_16(TyS); 4643 if (0) test_sqshl_s_s_31(TyS); 4644 if (0) test_sqshl_h_h_0(TyH); 4645 if (0) test_sqshl_h_h_8(TyH); 4646 if (0) test_sqshl_h_h_15(TyH); 4647 if (0) test_sqshl_b_b_0(TyB); 4648 if (0) test_sqshl_b_b_4(TyB); 4649 if (0) test_sqshl_b_b_7(TyB); 4650 if (0) test_uqshl_d_d_0(TyD); 4651 if (0) test_uqshl_d_d_32(TyD); 4652 if (0) test_uqshl_d_d_63(TyD); 4653 if (0) test_uqshl_s_s_0(TyS); 4654 if (0) test_uqshl_s_s_16(TyS); 4655 if (0) test_uqshl_s_s_31(TyS); 4656 if (0) test_uqshl_h_h_0(TyH); 4657 if (0) test_uqshl_h_h_8(TyH); 4658 if (0) test_uqshl_h_h_15(TyH); 4659 if (0) test_uqshl_b_b_0(TyB); 4660 if (0) test_uqshl_b_b_4(TyB); 4661 if (0) test_uqshl_b_b_7(TyB); 4662 if (0) test_sqshlu_d_d_0(TyD); 4663 if (0) test_sqshlu_d_d_32(TyD); 4664 if (0) test_sqshlu_d_d_63(TyD); 4665 if (0) test_sqshlu_s_s_0(TyS); 4666 if (0) test_sqshlu_s_s_16(TyS); 4667 if (0) test_sqshlu_s_s_31(TyS); 4668 if (0) test_sqshlu_h_h_0(TyH); 4669 if (0) test_sqshlu_h_h_8(TyH); 4670 if (0) test_sqshlu_h_h_15(TyH); 4671 if (0) test_sqshlu_b_b_0(TyB); 4672 if (0) test_sqshlu_b_b_4(TyB); 4673 if (0) test_sqshlu_b_b_7(TyB); 4674 4675 // sqshl (imm) 2d,4s,2s,8h,4h,16b,8b _#imm 4676 // uqshl (imm) 2d,4s,2s,8h,4h,16b,8b _#imm 4677 // sqshlu (imm) 2d,4s,2s,8h,4h,16b,8b _#imm 4678 if (0) test_sqshl_2d_2d_0(TyD); 4679 if (0) test_sqshl_2d_2d_32(TyD); 4680 if (0) test_sqshl_2d_2d_63(TyD); 4681 if (0) test_sqshl_4s_4s_0(TyS); 4682 if (0) test_sqshl_4s_4s_16(TyS); 4683 if (0) test_sqshl_4s_4s_31(TyS); 4684 if (0) test_sqshl_2s_2s_0(TyS); 4685 if (0) test_sqshl_2s_2s_16(TyS); 4686 if (0) test_sqshl_2s_2s_31(TyS); 4687 if (0) test_sqshl_8h_8h_0(TyH); 4688 if (0) test_sqshl_8h_8h_8(TyH); 4689 if (0) test_sqshl_8h_8h_15(TyH); 4690 if (0) test_sqshl_4h_4h_0(TyH); 4691 if (0) test_sqshl_4h_4h_8(TyH); 4692 if (0) test_sqshl_4h_4h_15(TyH); 4693 if (0) test_sqshl_16b_16b_0(TyB); 4694 if (0) test_sqshl_16b_16b_3(TyB); 4695 if (0) test_sqshl_16b_16b_7(TyB); 4696 if (0) test_sqshl_8b_8b_0(TyB); 4697 if (0) test_sqshl_8b_8b_3(TyB); 4698 if (0) test_sqshl_8b_8b_7(TyB); 4699 if (0) test_uqshl_2d_2d_0(TyD); 4700 if (0) test_uqshl_2d_2d_32(TyD); 4701 if (0) test_uqshl_2d_2d_63(TyD); 4702 if (0) test_uqshl_4s_4s_0(TyS); 4703 if (0) test_uqshl_4s_4s_16(TyS); 4704 if (0) test_uqshl_4s_4s_31(TyS); 4705 if (0) test_uqshl_2s_2s_0(TyS); 4706 if (0) test_uqshl_2s_2s_16(TyS); 4707 if (0) test_uqshl_2s_2s_31(TyS); 4708 if (0) test_uqshl_8h_8h_0(TyH); 4709 if (0) test_uqshl_8h_8h_8(TyH); 4710 if (0) test_uqshl_8h_8h_15(TyH); 4711 if (0) test_uqshl_4h_4h_0(TyH); 4712 if (0) test_uqshl_4h_4h_8(TyH); 4713 if (0) test_uqshl_4h_4h_15(TyH); 4714 if (0) test_uqshl_16b_16b_0(TyB); 4715 if (0) test_uqshl_16b_16b_3(TyB); 4716 if (0) test_uqshl_16b_16b_7(TyB); 4717 if (0) test_uqshl_8b_8b_0(TyB); 4718 if (0) test_uqshl_8b_8b_3(TyB); 4719 if (0) test_uqshl_8b_8b_7(TyB); 4720 if (0) test_sqshlu_2d_2d_0(TyD); 4721 if (0) test_sqshlu_2d_2d_32(TyD); 4722 if (0) test_sqshlu_2d_2d_63(TyD); 4723 if (0) test_sqshlu_4s_4s_0(TyS); 4724 if (0) test_sqshlu_4s_4s_16(TyS); 4725 if (0) test_sqshlu_4s_4s_31(TyS); 4726 if (0) test_sqshlu_2s_2s_0(TyS); 4727 if (0) test_sqshlu_2s_2s_16(TyS); 4728 if (0) test_sqshlu_2s_2s_31(TyS); 4729 if (0) test_sqshlu_8h_8h_0(TyH); 4730 if (0) test_sqshlu_8h_8h_8(TyH); 4731 if (0) test_sqshlu_8h_8h_15(TyH); 4732 if (0) test_sqshlu_4h_4h_0(TyH); 4733 if (0) test_sqshlu_4h_4h_8(TyH); 4734 if (0) test_sqshlu_4h_4h_15(TyH); 4735 if (0) test_sqshlu_16b_16b_0(TyB); 4736 if (0) test_sqshlu_16b_16b_3(TyB); 4737 if (0) test_sqshlu_16b_16b_7(TyB); 4738 if (0) test_sqshlu_8b_8b_0(TyB); 4739 if (0) test_sqshlu_8b_8b_3(TyB); 4740 if (0) test_sqshlu_8b_8b_7(TyB); 4741 4742 // sqxtn s_d,h_s,b_h 4743 // uqxtn s_d,h_s,b_h 4744 // sqxtun s_d,h_s,b_h 4745 if (0) test_sqxtn_s_d(TyD); 4746 if (0) test_sqxtn_h_s(TyS); 4747 if (0) test_sqxtn_b_h(TyH); 4748 if (0) test_uqxtn_s_d(TyD); 4749 if (0) test_uqxtn_h_s(TyS); 4750 if (0) test_uqxtn_b_h(TyH); 4751 if (0) test_sqxtun_s_d(TyD); 4752 if (0) test_sqxtun_h_s(TyS); 4753 if (0) test_sqxtun_b_h(TyH); 4754 4755 // sqxtn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h 4756 // uqxtn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h 4757 // sqxtun{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h 4758 if (0) test_sqxtn_2s_2d(TyD); 4759 if (0) test_sqxtn2_4s_2d(TyD); 4760 if (0) test_sqxtn_4h_4s(TyS); 4761 if (0) test_sqxtn2_8h_4s(TyS); 4762 if (0) test_sqxtn_8b_8h(TyH); 4763 if (0) test_sqxtn2_16b_8h(TyH); 4764 if (0) test_uqxtn_2s_2d(TyD); 4765 if (0) test_uqxtn2_4s_2d(TyD); 4766 if (0) test_uqxtn_4h_4s(TyS); 4767 if (0) test_uqxtn2_8h_4s(TyS); 4768 if (0) test_uqxtn_8b_8h(TyH); 4769 if (0) test_uqxtn2_16b_8h(TyH); 4770 if (0) test_sqxtun_2s_2d(TyD); 4771 if (0) test_sqxtun2_4s_2d(TyD); 4772 if (0) test_sqxtun_4h_4s(TyS); 4773 if (0) test_sqxtun2_8h_4s(TyS); 4774 if (0) test_sqxtun_8b_8h(TyH); 4775 if (0) test_sqxtun2_16b_8h(TyH); 4776 4777 // srhadd 4s,2s,8h,4h,16b,8b 4778 // urhadd 4s,2s,8h,4h,16b,8b 4779 if (0) test_srhadd_4s_4s_4s(TyS); 4780 if (0) test_srhadd_2s_2s_2s(TyS); 4781 if (0) test_srhadd_8h_8h_8h(TyH); 4782 if (0) test_srhadd_4h_4h_4h(TyH); 4783 if (0) test_srhadd_16b_16b_16b(TyB); 4784 if (0) test_srhadd_8b_8b_8b(TyB); 4785 if (0) test_urhadd_4s_4s_4s(TyS); 4786 if (0) test_urhadd_2s_2s_2s(TyS); 4787 if (0) test_urhadd_8h_8h_8h(TyH); 4788 if (0) test_urhadd_4h_4h_4h(TyH); 4789 if (0) test_urhadd_16b_16b_16b(TyB); 4790 if (0) test_urhadd_8b_8b_8b(TyB); 4791 4792 // sshl (reg) d 4793 // ushl (reg) d 4794 if (0) test_sshl_d_d_d(TyD); 4795 if (0) test_ushl_d_d_d(TyD); 4796 4797 // sshl (reg) 2d,4s,2s,8h,4h,16b,8b 4798 // ushl (reg) 2d,4s,2s,8h,4h,16b,8b 4799 if (0) test_sshl_2d_2d_2d(TyD); 4800 if (0) test_sshl_4s_4s_4s(TyS); 4801 if (0) test_sshl_2s_2s_2s(TyS); 4802 if (0) test_sshl_8h_8h_8h(TyH); 4803 if (0) test_sshl_4h_4h_4h(TyH); 4804 if (0) test_sshl_16b_16b_16b(TyB); 4805 if (0) test_sshl_8b_8b_8b(TyB); 4806 if (0) test_ushl_2d_2d_2d(TyD); 4807 if (0) test_ushl_4s_4s_4s(TyS); 4808 if (0) test_ushl_2s_2s_2s(TyS); 4809 if (0) test_ushl_8h_8h_8h(TyH); 4810 if (0) test_ushl_4h_4h_4h(TyH); 4811 if (0) test_ushl_16b_16b_16b(TyB); 4812 if (0) test_ushl_8b_8b_8b(TyB); 4813 4814 // shl (imm) d 4815 // sshr (imm) d 4816 // ushr (imm) d 4817 if (1) test_shl_d_d_0(TyD); 4818 if (1) test_shl_d_d_32(TyD); 4819 if (1) test_shl_d_d_63(TyD); 4820 if (0) test_sshr_d_d_1(TyD); 4821 if (0) test_sshr_d_d_32(TyD); 4822 if (0) test_sshr_d_d_64(TyD); 4823 if (1) test_ushr_d_d_1(TyD); 4824 if (1) test_ushr_d_d_32(TyD); 4825 if (0) test_ushr_d_d_64(TyD); 4826 4827 // shl (imm) 16b,8b,8h,4h,4s,2s,2d 4828 // sshr (imm) 2d,4s,2s,8h,4h,16b,8b 4829 // ushr (imm) 2d,4s,2s,8h,4h,16b,8b 4830 if (0) test_shl_2d_2d_0(TyD); 4831 if (1) test_shl_2d_2d_13(TyD); 4832 if (1) test_shl_2d_2d_63(TyD); 4833 if (0) test_shl_4s_4s_0(TyS); 4834 if (1) test_shl_4s_4s_13(TyS); 4835 if (1) test_shl_4s_4s_31(TyS); 4836 if (0) test_shl_2s_2s_0(TyS); 4837 if (1) test_shl_2s_2s_13(TyS); 4838 if (1) test_shl_2s_2s_31(TyS); 4839 if (0) test_shl_8h_8h_0(TyH); 4840 if (1) test_shl_8h_8h_13(TyH); 4841 if (1) test_shl_8h_8h_15(TyH); 4842 if (0) test_shl_4h_4h_0(TyH); 4843 if (1) test_shl_4h_4h_13(TyH); 4844 if (1) test_shl_4h_4h_15(TyH); 4845 if (0) test_shl_16b_16b_0(TyB); 4846 if (1) test_shl_16b_16b_7(TyB); 4847 if (0) test_shl_8b_8b_0(TyB); 4848 if (1) test_shl_8b_8b_7(TyB); 4849 if (1) test_sshr_2d_2d_1(TyD); 4850 if (1) test_sshr_2d_2d_13(TyD); 4851 if (0) test_sshr_2d_2d_64(TyD); 4852 if (1) test_sshr_4s_4s_1(TyS); 4853 if (1) test_sshr_4s_4s_13(TyS); 4854 if (0) test_sshr_4s_4s_32(TyS); 4855 if (1) test_sshr_2s_2s_1(TyS); 4856 if (1) test_sshr_2s_2s_13(TyS); 4857 if (0) test_sshr_2s_2s_32(TyS); 4858 if (1) test_sshr_8h_8h_1(TyH); 4859 if (1) test_sshr_8h_8h_13(TyH); 4860 if (0) test_sshr_8h_8h_16(TyH); 4861 if (1) test_sshr_4h_4h_1(TyH); 4862 if (1) test_sshr_4h_4h_13(TyH); 4863 if (0) test_sshr_4h_4h_16(TyH); 4864 if (1) test_sshr_16b_16b_1(TyB); 4865 if (0) test_sshr_16b_16b_8(TyB); 4866 if (1) test_sshr_8b_8b_1(TyB); 4867 if (0) test_sshr_8b_8b_8(TyB); 4868 if (1) test_ushr_2d_2d_1(TyD); 4869 if (1) test_ushr_2d_2d_13(TyD); 4870 if (0) test_ushr_2d_2d_64(TyD); 4871 if (1) test_ushr_4s_4s_1(TyS); 4872 if (1) test_ushr_4s_4s_13(TyS); 4873 if (0) test_ushr_4s_4s_32(TyS); 4874 if (1) test_ushr_2s_2s_1(TyS); 4875 if (1) test_ushr_2s_2s_13(TyS); 4876 if (0) test_ushr_2s_2s_32(TyS); 4877 if (1) test_ushr_8h_8h_1(TyH); 4878 if (1) test_ushr_8h_8h_13(TyH); 4879 if (0) test_ushr_8h_8h_16(TyH); 4880 if (1) test_ushr_4h_4h_1(TyH); 4881 if (1) test_ushr_4h_4h_13(TyH); 4882 if (0) test_ushr_4h_4h_16(TyH); 4883 if (1) test_ushr_16b_16b_1(TyB); 4884 if (0) test_ushr_16b_16b_8(TyB); 4885 if (1) test_ushr_8b_8b_1(TyB); 4886 if (0) test_ushr_8b_8b_8(TyB); 4887 4888 // ssra (imm) d 4889 // usra (imm) d 4890 if (0) test_ssra_d_d_1(TyD); 4891 if (0) test_ssra_d_d_32(TyD); 4892 if (0) test_ssra_d_d_64(TyD); 4893 if (0) test_usra_d_d_1(TyD); 4894 if (0) test_usra_d_d_32(TyD); 4895 if (0) test_usra_d_d_64(TyD); 4896 4897 // ssra (imm) 2d,4s,2s,8h,4h,16b,8b 4898 // usra (imm) 2d,4s,2s,8h,4h,16b,8b 4899 if (0) test_ssra_2d_2d_1(TyD); 4900 if (0) test_ssra_2d_2d_32(TyD); 4901 if (0) test_ssra_2d_2d_64(TyD); 4902 if (0) test_ssra_4s_4s_1(TyS); 4903 if (0) test_ssra_4s_4s_16(TyS); 4904 if (0) test_ssra_4s_4s_32(TyS); 4905 if (0) test_ssra_2s_2s_1(TyS); 4906 if (0) test_ssra_2s_2s_16(TyS); 4907 if (0) test_ssra_2s_2s_32(TyS); 4908 if (0) test_ssra_8h_8h_1(TyH); 4909 if (0) test_ssra_8h_8h_8(TyH); 4910 if (0) test_ssra_8h_8h_16(TyH); 4911 if (0) test_ssra_4h_4h_1(TyH); 4912 if (0) test_ssra_4h_4h_8(TyH); 4913 if (0) test_ssra_4h_4h_16(TyH); 4914 if (0) test_ssra_16b_16b_1(TyB); 4915 if (0) test_ssra_16b_16b_3(TyB); 4916 if (0) test_ssra_16b_16b_8(TyB); 4917 if (0) test_ssra_8b_8b_1(TyB); 4918 if (0) test_ssra_8b_8b_3(TyB); 4919 if (0) test_ssra_8b_8b_8(TyB); 4920 if (0) test_usra_2d_2d_1(TyD); 4921 if (0) test_usra_2d_2d_32(TyD); 4922 if (0) test_usra_2d_2d_64(TyD); 4923 if (0) test_usra_4s_4s_1(TyS); 4924 if (0) test_usra_4s_4s_16(TyS); 4925 if (0) test_usra_4s_4s_32(TyS); 4926 if (0) test_usra_2s_2s_1(TyS); 4927 if (0) test_usra_2s_2s_16(TyS); 4928 if (0) test_usra_2s_2s_32(TyS); 4929 if (0) test_usra_8h_8h_1(TyH); 4930 if (0) test_usra_8h_8h_8(TyH); 4931 if (0) test_usra_8h_8h_16(TyH); 4932 if (0) test_usra_4h_4h_1(TyH); 4933 if (0) test_usra_4h_4h_8(TyH); 4934 if (0) test_usra_4h_4h_16(TyH); 4935 if (0) test_usra_16b_16b_1(TyB); 4936 if (0) test_usra_16b_16b_3(TyB); 4937 if (0) test_usra_16b_16b_8(TyB); 4938 if (0) test_usra_8b_8b_1(TyB); 4939 if (0) test_usra_8b_8b_3(TyB); 4940 if (0) test_usra_8b_8b_8(TyB); 4941 4942 // srshl (reg) d 4943 // urshl (reg) d 4944 if (0) test_srshl_d_d_d(TyD); 4945 if (0) test_urshl_d_d_d(TyD); 4946 4947 // srshl (reg) 2d,4s,2s,8h,4h,16b,8b 4948 // urshl (reg) 2d,4s,2s,8h,4h,16b,8b 4949 if (0) test_srshl_2d_2d_2d(TyD); 4950 if (0) test_srshl_4s_4s_4s(TyS); 4951 if (0) test_srshl_2s_2s_2s(TyS); 4952 if (0) test_srshl_8h_8h_8h(TyH); 4953 if (0) test_srshl_4h_4h_4h(TyH); 4954 if (0) test_srshl_16b_16b_16b(TyB); 4955 if (0) test_srshl_8b_8b_8b(TyB); 4956 if (0) test_urshl_2d_2d_2d(TyD); 4957 if (0) test_urshl_4s_4s_4s(TyS); 4958 if (0) test_urshl_2s_2s_2s(TyS); 4959 if (0) test_urshl_8h_8h_8h(TyH); 4960 if (0) test_urshl_4h_4h_4h(TyH); 4961 if (0) test_urshl_16b_16b_16b(TyB); 4962 if (0) test_urshl_8b_8b_8b(TyB); 4963 4964 // srshr (imm) d 4965 // urshr (imm) d 4966 if (0) test_srshr_d_d_1(TyD); 4967 if (0) test_srshr_d_d_32(TyD); 4968 if (0) test_srshr_d_d_64(TyD); 4969 if (0) test_urshr_d_d_1(TyD); 4970 if (0) test_urshr_d_d_32(TyD); 4971 if (0) test_urshr_d_d_64(TyD); 4972 4973 // srshr (imm) 2d,4s,2s,8h,4h,16b,8b 4974 // urshr (imm) 2d,4s,2s,8h,4h,16b,8b 4975 if (0) test_srshr_2d_2d_1(TyD); 4976 if (0) test_srshr_2d_2d_32(TyD); 4977 if (0) test_srshr_2d_2d_64(TyD); 4978 if (0) test_srshr_4s_4s_1(TyS); 4979 if (0) test_srshr_4s_4s_16(TyS); 4980 if (0) test_srshr_4s_4s_32(TyS); 4981 if (0) test_srshr_2s_2s_1(TyS); 4982 if (0) test_srshr_2s_2s_16(TyS); 4983 if (0) test_srshr_2s_2s_32(TyS); 4984 if (0) test_srshr_8h_8h_1(TyH); 4985 if (0) test_srshr_8h_8h_8(TyH); 4986 if (0) test_srshr_8h_8h_16(TyH); 4987 if (0) test_srshr_4h_4h_1(TyH); 4988 if (0) test_srshr_4h_4h_8(TyH); 4989 if (0) test_srshr_4h_4h_16(TyH); 4990 if (0) test_srshr_16b_16b_1(TyB); 4991 if (0) test_srshr_16b_16b_3(TyB); 4992 if (0) test_srshr_16b_16b_8(TyB); 4993 if (0) test_srshr_8b_8b_1(TyB); 4994 if (0) test_srshr_8b_8b_3(TyB); 4995 if (0) test_srshr_8b_8b_8(TyB); 4996 if (0) test_urshr_2d_2d_1(TyD); 4997 if (0) test_urshr_2d_2d_32(TyD); 4998 if (0) test_urshr_2d_2d_64(TyD); 4999 if (0) test_urshr_4s_4s_1(TyS); 5000 if (0) test_urshr_4s_4s_16(TyS); 5001 if (0) test_urshr_4s_4s_32(TyS); 5002 if (0) test_urshr_2s_2s_1(TyS); 5003 if (0) test_urshr_2s_2s_16(TyS); 5004 if (0) test_urshr_2s_2s_32(TyS); 5005 if (0) test_urshr_8h_8h_1(TyH); 5006 if (0) test_urshr_8h_8h_8(TyH); 5007 if (0) test_urshr_8h_8h_16(TyH); 5008 if (0) test_urshr_4h_4h_1(TyH); 5009 if (0) test_urshr_4h_4h_8(TyH); 5010 if (0) test_urshr_4h_4h_16(TyH); 5011 if (0) test_urshr_16b_16b_1(TyB); 5012 if (0) test_urshr_16b_16b_3(TyB); 5013 if (0) test_urshr_16b_16b_8(TyB); 5014 if (0) test_urshr_8b_8b_1(TyB); 5015 if (0) test_urshr_8b_8b_3(TyB); 5016 if (0) test_urshr_8b_8b_8(TyB); 5017 5018 // srsra (imm) d 5019 // ursra (imm) d 5020 if (0) test_srsra_d_d_1(TyD); 5021 if (0) test_srsra_d_d_32(TyD); 5022 if (0) test_srsra_d_d_64(TyD); 5023 if (0) test_ursra_d_d_1(TyD); 5024 if (0) test_ursra_d_d_32(TyD); 5025 if (0) test_ursra_d_d_64(TyD); 5026 5027 // srsra (imm) 2d,4s,2s,8h,4h,16b,8b 5028 // ursra (imm) 2d,4s,2s,8h,4h,16b,8b 5029 if (0) test_srsra_2d_2d_1(TyD); 5030 if (0) test_srsra_2d_2d_32(TyD); 5031 if (0) test_srsra_2d_2d_64(TyD); 5032 if (0) test_srsra_4s_4s_1(TyS); 5033 if (0) test_srsra_4s_4s_16(TyS); 5034 if (0) test_srsra_4s_4s_32(TyS); 5035 if (0) test_srsra_2s_2s_1(TyS); 5036 if (0) test_srsra_2s_2s_16(TyS); 5037 if (0) test_srsra_2s_2s_32(TyS); 5038 if (0) test_srsra_8h_8h_1(TyH); 5039 if (0) test_srsra_8h_8h_8(TyH); 5040 if (0) test_srsra_8h_8h_16(TyH); 5041 if (0) test_srsra_4h_4h_1(TyH); 5042 if (0) test_srsra_4h_4h_8(TyH); 5043 if (0) test_srsra_4h_4h_16(TyH); 5044 if (0) test_srsra_16b_16b_1(TyB); 5045 if (0) test_srsra_16b_16b_3(TyB); 5046 if (0) test_srsra_16b_16b_8(TyB); 5047 if (0) test_srsra_8b_8b_1(TyB); 5048 if (0) test_srsra_8b_8b_3(TyB); 5049 if (0) test_srsra_8b_8b_8(TyB); 5050 if (0) test_ursra_2d_2d_1(TyD); 5051 if (0) test_ursra_2d_2d_32(TyD); 5052 if (0) test_ursra_2d_2d_64(TyD); 5053 if (0) test_ursra_4s_4s_1(TyS); 5054 if (0) test_ursra_4s_4s_16(TyS); 5055 if (0) test_ursra_4s_4s_32(TyS); 5056 if (0) test_ursra_2s_2s_1(TyS); 5057 if (0) test_ursra_2s_2s_16(TyS); 5058 if (0) test_ursra_2s_2s_32(TyS); 5059 if (0) test_ursra_8h_8h_1(TyH); 5060 if (0) test_ursra_8h_8h_8(TyH); 5061 if (0) test_ursra_8h_8h_16(TyH); 5062 if (0) test_ursra_4h_4h_1(TyH); 5063 if (0) test_ursra_4h_4h_8(TyH); 5064 if (0) test_ursra_4h_4h_16(TyH); 5065 if (0) test_ursra_16b_16b_1(TyB); 5066 if (0) test_ursra_16b_16b_3(TyB); 5067 if (0) test_ursra_16b_16b_8(TyB); 5068 if (0) test_ursra_8b_8b_1(TyB); 5069 if (0) test_ursra_8b_8b_3(TyB); 5070 if (0) test_ursra_8b_8b_8(TyB); 5071 5072 // sshll{2} (imm) 2d_2s/4s, 4s_4h/8h, 8h_8b/16b 5073 // ushll{2} (imm) 2d_2s/4s, 4s_4h/8h, 8h_8b/16b 5074 if (1) test_sshll_2d_2s_0(TyS); 5075 if (1) test_sshll_2d_2s_15(TyS); 5076 if (1) test_sshll_2d_2s_31(TyS); 5077 if (1) test_sshll2_2d_4s_0(TyS); 5078 if (1) test_sshll2_2d_4s_15(TyS); 5079 if (1) test_sshll2_2d_4s_31(TyS); 5080 if (1) test_sshll_4s_4h_0(TyH); 5081 if (1) test_sshll_4s_4h_7(TyH); 5082 if (1) test_sshll_4s_4h_15(TyH); 5083 if (1) test_sshll2_4s_8h_0(TyH); 5084 if (1) test_sshll2_4s_8h_7(TyH); 5085 if (1) test_sshll2_4s_8h_15(TyH); 5086 if (1) test_sshll_8h_8b_0(TyB); 5087 if (1) test_sshll_8h_8b_3(TyB); 5088 if (1) test_sshll_8h_8b_7(TyB); 5089 if (1) test_sshll2_8h_16b_0(TyB); 5090 if (1) test_sshll2_8h_16b_3(TyB); 5091 if (1) test_sshll2_8h_16b_7(TyB); 5092 if (1) test_ushll_2d_2s_0(TyS); 5093 if (1) test_ushll_2d_2s_15(TyS); 5094 if (1) test_ushll_2d_2s_31(TyS); 5095 if (1) test_ushll2_2d_4s_0(TyS); 5096 if (1) test_ushll2_2d_4s_15(TyS); 5097 if (1) test_ushll2_2d_4s_31(TyS); 5098 if (1) test_ushll_4s_4h_0(TyH); 5099 if (1) test_ushll_4s_4h_7(TyH); 5100 if (1) test_ushll_4s_4h_15(TyH); 5101 if (1) test_ushll2_4s_8h_0(TyH); 5102 if (1) test_ushll2_4s_8h_7(TyH); 5103 if (1) test_ushll2_4s_8h_15(TyH); 5104 if (1) test_ushll_8h_8b_0(TyB); 5105 if (1) test_ushll_8h_8b_3(TyB); 5106 if (1) test_ushll_8h_8b_7(TyB); 5107 if (1) test_ushll2_8h_16b_0(TyB); 5108 if (1) test_ushll2_8h_16b_3(TyB); 5109 if (1) test_ushll2_8h_16b_7(TyB); 5110 5111 // suqadd d,s,h,b 5112 // usqadd d,s,h,b 5113 if (0) test_suqadd_d_d(TyD); 5114 if (0) test_suqadd_s_s(TyS); 5115 if (0) test_suqadd_h_h(TyH); 5116 if (0) test_suqadd_b_b(TyB); 5117 if (0) test_usqadd_d_d(TyD); 5118 if (0) test_usqadd_s_s(TyS); 5119 if (0) test_usqadd_h_h(TyH); 5120 if (0) test_usqadd_b_b(TyB); 5121 5122 // suqadd 2d,4s,2s,8h,4h,16b,8b 5123 // usqadd 2d,4s,2s,8h,4h,16b,8b 5124 if (0) test_suqadd_2d_2d(TyD); 5125 if (0) test_suqadd_4s_4s(TyS); 5126 if (0) test_suqadd_2s_2s(TyS); 5127 if (0) test_suqadd_8h_8h(TyH); 5128 if (0) test_suqadd_4h_4h(TyH); 5129 if (0) test_suqadd_16b_16b(TyB); 5130 if (0) test_suqadd_8b_8b(TyB); 5131 if (0) test_usqadd_2d_2d(TyD); 5132 if (0) test_usqadd_4s_4s(TyS); 5133 if (0) test_usqadd_2s_2s(TyS); 5134 if (0) test_usqadd_8h_8h(TyH); 5135 if (0) test_usqadd_4h_4h(TyH); 5136 if (0) test_usqadd_16b_16b(TyB); 5137 if (0) test_usqadd_8b_8b(TyB); 5138 5139 // tbl 8b_{16b}_8b, 16b_{16b}_16b 5140 // tbl 8b_{16b,16b}_8b, 16b_{16b,16b}_16b 5141 // tbl 8b_{16b,16b,16b}_8b, 16b_{16b,16b,16b}_16b 5142 // tbl 8b_{16b,16b,16b,16b}_8b, 16b_{16b,16b,16b,16b}_16b 5143 if (1) test_tbl_16b_1reg(TyB); 5144 if (1) test_tbl_16b_2reg(TyB); 5145 if (1) test_tbl_16b_3reg(TyB); 5146 if (1) test_tbl_16b_4reg(TyB); 5147 if (1) test_tbl_8b_1reg(TyB); 5148 if (1) test_tbl_8b_2reg(TyB); 5149 if (1) test_tbl_8b_3reg(TyB); 5150 if (1) test_tbl_8b_4reg(TyB); 5151 5152 // tbx 8b_{16b}_8b, 16b_{16b}_16b 5153 // tbx 8b_{16b,16b}_8b, 16b_{16b,16b}_16b 5154 // tbx 8b_{16b,16b,16b}_8b, 16b_{16b,16b,16b}_16b 5155 // tbx 8b_{16b,16b,16b,16b}_8b, 16b_{16b,16b,16b,16b}_16b 5156 if (1) test_tbx_16b_1reg(TyB); 5157 if (1) test_tbx_16b_2reg(TyB); 5158 if (1) test_tbx_16b_3reg(TyB); 5159 if (1) test_tbx_16b_4reg(TyB); 5160 if (1) test_tbx_8b_1reg(TyB); 5161 if (1) test_tbx_8b_2reg(TyB); 5162 if (1) test_tbx_8b_3reg(TyB); 5163 if (1) test_tbx_8b_4reg(TyB); 5164 5165 // trn1 2d,4s,2s,8h,4h,16b,8b 5166 // trn2 2d,4s,2s,8h,4h,16b,8b 5167 if (0) test_trn1_2d_2d_2d(TyD); 5168 if (0) test_trn1_4s_4s_4s(TyS); 5169 if (0) test_trn1_2s_2s_2s(TyS); 5170 if (0) test_trn1_8h_8h_8h(TyH); 5171 if (0) test_trn1_4h_4h_4h(TyH); 5172 if (0) test_trn1_16b_16b_16b(TyB); 5173 if (0) test_trn1_8b_8b_8b(TyB); 5174 if (0) test_trn2_2d_2d_2d(TyD); 5175 if (0) test_trn2_4s_4s_4s(TyS); 5176 if (0) test_trn2_2s_2s_2s(TyS); 5177 if (0) test_trn2_8h_8h_8h(TyH); 5178 if (0) test_trn2_4h_4h_4h(TyH); 5179 if (0) test_trn2_16b_16b_16b(TyB); 5180 if (0) test_trn2_8b_8b_8b(TyB); 5181 5182 // urecpe 4s,2s 5183 // ursqrte 4s,2s 5184 if (0) test_urecpe_4s_4s(TyS); 5185 if (0) test_urecpe_2s_2s(TyS); 5186 if (0) test_ursqrte_4s_4s(TyS); 5187 if (0) test_ursqrte_2s_2s(TyS); 5188 5189 // uzp1 2d,4s,2s,8h,4h,16b,8b 5190 // uzp2 2d,4s,2s,8h,4h,16b,8b 5191 // zip1 2d,4s,2s,8h,4h,16b,8b 5192 // zip2 2d,4s,2s,8h,4h,16b,8b 5193 if (0) test_uzp1_2d_2d_2d(TyD); 5194 if (0) test_uzp1_4s_4s_4s(TyS); 5195 if (0) test_uzp1_2s_2s_2s(TyS); 5196 if (0) test_uzp1_8h_8h_8h(TyH); 5197 if (0) test_uzp1_4h_4h_4h(TyH); 5198 if (0) test_uzp1_16b_16b_16b(TyB); 5199 if (0) test_uzp1_8b_8b_8b(TyB); 5200 if (0) test_uzp2_2d_2d_2d(TyD); 5201 if (0) test_uzp2_4s_4s_4s(TyS); 5202 if (0) test_uzp2_2s_2s_2s(TyS); 5203 if (0) test_uzp2_8h_8h_8h(TyH); 5204 if (0) test_uzp2_4h_4h_4h(TyH); 5205 if (0) test_uzp2_16b_16b_16b(TyB); 5206 if (0) test_uzp2_8b_8b_8b(TyB); 5207 if (0) test_zip1_2d_2d_2d(TyD); 5208 if (0) test_zip1_4s_4s_4s(TyS); 5209 if (0) test_zip1_2s_2s_2s(TyS); 5210 if (0) test_zip1_8h_8h_8h(TyH); 5211 if (0) test_zip1_4h_4h_4h(TyH); 5212 if (0) test_zip1_16b_16b_16b(TyB); 5213 if (0) test_zip1_8b_8b_8b(TyB); 5214 if (0) test_zip2_2d_2d_2d(TyD); 5215 if (0) test_zip2_4s_4s_4s(TyS); 5216 if (0) test_zip2_2s_2s_2s(TyS); 5217 if (0) test_zip2_8h_8h_8h(TyH); 5218 if (0) test_zip2_4h_4h_4h(TyH); 5219 if (0) test_zip2_16b_16b_16b(TyB); 5220 if (0) test_zip2_8b_8b_8b(TyB); 5221 5222 // xtn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h 5223 if (1) test_xtn_2s_2d(TyD); 5224 if (1) test_xtn2_4s_2d(TyD); 5225 if (1) test_xtn_4h_4s(TyS); 5226 if (1) test_xtn2_8h_4s(TyS); 5227 if (1) test_xtn_8b_8h(TyH); 5228 if (1) test_xtn2_16b_8h(TyH); 5229 5230 // ======================== MEM ======================== 5231 5232 // ld1 (multiple 1-element structures to 1/2/3/4 regs) 5233 // ld1 (single 1-element structure to one lane of 1 reg) 5234 // ld1r (single 1-element structure and rep to all lanes of 1 reg) 5235 5236 // ld2 (multiple 2-element structures to 2 regs) 5237 // ld2 (single 2-element structure to one lane of 2 regs) 5238 // ld2r (single 2-element structure and rep to all lanes of 2 regs) 5239 5240 // ld3 (multiple 3-element structures to 3 regs) 5241 // ld3 (single 3-element structure to one lane of 3 regs) 5242 // ld3r (single 3-element structure and rep to all lanes of 3 regs) 5243 5244 // ld4 (multiple 4-element structures to 4 regs) 5245 // ld4 (single 4-element structure to one lane of 4 regs) 5246 // ld4r (single 4-element structure and rep to all lanes of 4 regs) 5247 5248 // ldnp q_q_addr,d_d_addr,s_s_addr (load pair w/ non-temporal hint) 5249 // addr = reg + uimm7 * reg_size 5250 5251 // ldp q_q_addr,d_d_addr,s_s_addr (load pair) 5252 // addr = [Xn|SP],#imm or [Xn|SP,#imm]! or [Xn|SP,#imm] 5253 5254 // ldr q,d,s,h,b from addr 5255 // addr = [Xn|SP],#imm or [Xn|SP,#imm]! or [Xn|SP,#imm] 5256 5257 // ldr q,d,s from pc+#imm19 5258 5259 // ldr q,d,s,h,b from addr 5260 // addr = [Xn|SP, R <extend> <shift] 5261 5262 // ldur q,d,s,h,b from addr 5263 // addr = [Xn|SP,#imm] (unscaled offset) 5264 5265 // st1 (multiple 1-element structures from 1/2/3/4 regs) 5266 // st1 (single 1-element structure for 1 lane of 1 reg) 5267 5268 // st2 (multiple 2-element structures from 2 regs) 5269 // st2 (single 2-element structure from 1 lane of 2 regs) 5270 5271 // st3 (multiple 3-element structures from 3 regs) 5272 // st3 (single 3-element structure from 1 lane of 3 regs) 5273 5274 // st4 (multiple 4-element structures from 4 regs) 5275 // st4 (single 4-element structure from one lane of 4 regs) 5276 5277 // stnp q_q_addr, d_d_addr, s_s_addr 5278 // addr = [Xn|SP, #imm] 5279 5280 // stp q_q_addr, d_d_addr, s_s_addr 5281 // addr = [Xn|SP], #imm or [Xn|SP, #imm]! or [Xn|SP, #imm] 5282 5283 // str q,d,s,h,b_addr 5284 // addr = [Xn|SP], #simm or [Xn|SP, #simm]! or [Xn|SP, #pimm] 5285 5286 // str q,d,s,h,b_addr 5287 // addr = [Xn|SP, R <extend> <shift] 5288 5289 // stur q,d,s,h,b_addr 5290 // addr = [Xn|SP,#imm] (unscaled offset) 5291 5292 // ======================== CRYPTO ======================== 5293 5294 // aesd 16b (aes single round decryption) 5295 // aese 16b (aes single round encryption) 5296 // aesimc 16b (aes inverse mix columns) 5297 // aesmc 16b (aes mix columns) 5298 5299 // sha1c q_s_4s 5300 // sha1h s_s 5301 // sha1m q_s_4s 5302 // sha1p q_s_4s 5303 // sha1su0 4s_4s_4s 5304 // sha1su1 4s_4s 5305 5306 // sha256h2 q_q_4s 5307 // sha256h q_q_4s 5308 // sha256su0 4s_4s 5309 // sha256su1 4s_4s_4s 5310 5311 return 0; 5312 } 5313 5314 5315 /* ---------------------------------------------------------------- */ 5316 /* -- Alphabetical list of insns -- */ 5317 /* ---------------------------------------------------------------- */ 5318 /* 5319 abs d 5320 abs 2d,4s,2s,8h,4h,16b,8b 5321 add d 5322 add 2d,4s,2s,8h,4h,16b,8b 5323 addhn 2s.2d.2d, 4s.2d.2d, h_from_s and b_from_h (add and get high half) 5324 addp d (add pairs, across) 5325 addp 2d,4s,2s,8h,4h,16b,8b 5326 addv 4s,8h,4h,16b,18b (reduce across vector) 5327 aesd 16b (aes single round decryption) 5328 aese 16b (aes single round encryption) 5329 aesimc 16b (aes inverse mix columns) 5330 aesmc 16b (aes mix columns) 5331 and 16b,8b 5332 5333 bic 4s,2s,8h,4h (vector, imm) 5334 also movi, mvni, orr 5335 5336 bic 16b,8b (vector,reg) (bit clear) 5337 bif 16b,8b (vector) (bit insert if false) 5338 bit 16b,8b (vector) (bit insert if true) 5339 bsl 16b,8b (vector) (bit select) 5340 5341 cls 4s,2s,8h,4h,16b,8b (count leading sign bits) 5342 clz 4s,2s,8h,4h,16b,8b (count leading zero bits) 5343 5344 cmeq d 5345 cmeq 2d,4s,2s,8h,4h,16b,8b 5346 cmeq_z d 5347 cmeq_z 2d,4s,2s,8h,4h,16b,8b 5348 5349 cmge d 5350 cmge 2d,4s,2s,8h,4h,16b,8b 5351 cmge_z d 5352 cmge_z 2d,4s,2s,8h,4h,16b,8b 5353 5354 cmgt d 5355 cmgt 2d,4s,2s,8h,4h,16b,8b 5356 cmgt_z d 5357 cmgt_z 2d,4s,2s,8h,4h,16b,8b 5358 5359 cmhi d 5360 cmhi 2d,4s,2s,8h,4h,16b,8b 5361 5362 cmhs d 5363 cmhs 2d,4s,2s,8h,4h,16b,8b 5364 5365 cmle_z d 5366 cmle_z 2d,4s,2s,8h,4h,16b,8b 5367 5368 cmlt_z d 5369 cmlt_z 2d,4s,2s,8h,4h,16b,8b 5370 5371 cmtst d 5372 cmtst 2d,4s,2s,8h,4h,16b,8b 5373 5374 cnt 16b,8b (population count per byte) 5375 5376 dup d,s,h,b (vec elem to scalar) 5377 dup 2d,4s,2s,8h,4h,16b,8b (vec elem to vector) 5378 dup 2d,4s,2s,8h,4h,16b,8b (general reg to vector) 5379 5380 eor 16b,8b (vector) 5381 ext 16b,8b,#imm4 (concat 2 vectors, then slice) 5382 5383 fabd d,s 5384 fabd 2d,4s,2s 5385 5386 fabs d,s 5387 fabs 2d,4s,2s 5388 5389 facge s,d (floating abs compare GE) 5390 facge 2d,4s,2s 5391 5392 facgt s,d (floating abs compare GE) 5393 facgt 2d,4s,2s 5394 5395 fadd d,s 5396 fadd 2d,4s,2s 5397 5398 faddp d,s (floating add pair) 5399 faddp 2d,4s,2s 5400 5401 fccmp d,s (floating point conditional quiet compare) 5402 fccmpe d,s (floating point conditional signaling compare) 5403 5404 fcmeq d,s 5405 fcmeq 2d,4s,2s 5406 fcmeq_z d,s 5407 fcmeq_z 2d,4s,2s 5408 5409 fcmge d,s 5410 fcmge 2d,4s,2s 5411 fcmge_z d,s 5412 fcmge_z 2d,4s,2s 5413 5414 fcmgt d,s 5415 fcmgt 2d,4s,2s 5416 fcmgt_z d,s 5417 fcmgt_z 2d,4s,2s 5418 5419 fcmle_z d,s 5420 fcmle_z 2d,4s,2s 5421 5422 fcmlt_z d,s 5423 fcmlt_z 2d,4s,2s 5424 5425 fcmp d,s (floating point quiet, set flags) 5426 fcmp_z d,s 5427 fcmpe d,s (floating point signaling, set flags) 5428 fcmpe_z d,s 5429 5430 fcsel d,s (fp cond select) 5431 5432 fcvt s_h,d_h,h_s,d_s,h_d,s_d (fp convert, scalar) 5433 5434 fcvtas d,s (fcvt to signed int, nearest, ties away) 5435 fcvtas 2d,4s,2s 5436 fcvtas w_s,x_s,w_d,x_d 5437 5438 fcvtau d,s (fcvt to unsigned int, nearest, ties away) 5439 fcvtau 2d,4s,2s 5440 fcvtau w_s,x_s,w_d,x_d 5441 5442 fcvtl{2} 4s/4h, 4s/8h, 2d/2s, 2d/4s (float convert to longer form) 5443 5444 fcvtms d,s (fcvt to signed int, minus inf) 5445 fcvtms 2d,4s,2s 5446 fcvtms w_s,x_s,w_d,x_d 5447 5448 fcvtmu d,s (fcvt to unsigned int, minus inf) 5449 fcvtmu 2d,4s,2s 5450 fcvtmu w_s,x_s,w_d,x_d 5451 5452 fcvtn{2} 4h/4s, 8h/4s, 2s/2d, 4s/2d (float convert to narrower form) 5453 5454 fcvtns d,s (fcvt to signed int, nearest) 5455 fcvtns 2d,4s,2s 5456 fcvtns w_s,x_s,w_d,x_d 5457 5458 fcvtnu d,s (fcvt to unsigned int, nearest) 5459 fcvtnu 2d,4s,2s 5460 fcvtnu w_s,x_s,w_d,x_d 5461 5462 fcvtps d,s (fcvt to signed int, plus inf) 5463 fcvtps 2d,4s,2s 5464 fcvtps w_s,x_s,w_d,x_d 5465 5466 fcvtpu d,s (fcvt to unsigned int, plus inf) 5467 fcvtpu 2d,4s,2s 5468 fcvtpu w_s,x_s,w_d,x_d 5469 5470 fcvtxn s_d (fcvt to lower prec narrow, rounding to odd) 5471 fcvtxn 2s_2d,4s_2d 5472 5473 fcvtzs s,d (fcvt to signed fixedpt, to zero) (w/ #fbits) 5474 fcvtzs 2d,4s,2s 5475 5476 fcvtzs s,d (fcvt to signed integer, to zero) 5477 fcvtzs 2d,4s,2s 5478 5479 fcvtzs w_s,x_s,w_d,x_d (fcvt to signed fixedpt, to zero) (w/ #fbits) 5480 5481 fcvtzs w_s,x_s,w_d,x_d (fcvt to signed integer, to zero) 5482 5483 fcvtzu s,d (fcvt to unsigned fixedpt, to zero) (w/ #fbits) 5484 fcvtzu 2d,4s,2s 5485 5486 fcvtzu s,d (fcvt to unsigned integer, to zero) 5487 fcvtzu 2d,4s,2s 5488 5489 fcvtzu w_s,x_s,w_d,x_d (fcvt to unsigned fixedpt, to zero) (w/ #fbits) 5490 5491 fcvtzu w_s,x_s,w_d,x_d (fcvt to unsigned integer, to zero) 5492 5493 fdiv d,s 5494 fdiv 2d,4s,2s 5495 5496 fmadd d,s 5497 fnmadd d,s 5498 fnmsub d,s 5499 fnmul d,s 5500 5501 fmax d,s 5502 fmin d,s 5503 5504 fmax 2d,4s,2s 5505 fmin 2d,4s,2s 5506 5507 fmaxnm d,s ("max number") 5508 fminnm d,s 5509 5510 fmaxnm 2d,4s,2s 5511 fminnm 2d,4s,2s 5512 5513 fmaxnmp d_2d,s_2s ("max number pairwise") 5514 fminnmp d_2d,s_2s 5515 5516 fmaxnmp 2d,4s,2s 5517 fminnmp 2d,4s,2s 5518 5519 fmaxnmv s_4s (maxnum across vector) 5520 fminnmv s_4s 5521 5522 fmaxp d_2d,s_2s (max of a pair) 5523 fminp d_2d,s_2s (max of a pair) 5524 5525 fmaxp 2d,4s,2s (max pairwise) 5526 fminp 2d,4s,2s 5527 5528 fmaxv s_4s (max across vector) 5529 fminv s_4s 5530 5531 fmla d_d_d[],s_s_s[] (by element) 5532 fmla 2d_2d_d[],4s_4s_s[],2s_2s_s[] 5533 5534 fmla 2d,4s,2s 5535 5536 fmls d_d_d[],s_s_s[] (by element) 5537 fmls 2d_2d_d[],4s_4s_s[],2s_2s_s[] 5538 5539 fmls 2d,4s,2s 5540 5541 fmov 2d,4s,2s #imm (part of the MOVI/MVNI/ORR/BIC imm group) 5542 5543 fmov d_d,s_s 5544 5545 fmov s_w,w_s,d_x,d[1]_x,x_d,x_d[1] 5546 5547 fmov d,s #imm 5548 5549 fmsub d,s 5550 5551 fmul d_d_d[],s_s_s[] 5552 fmul 2d_2d_d[],4s_4s_s[],2s_2s_s[] 5553 5554 fmul 2d,4s,2s 5555 fmul d,s 5556 5557 fmulx d_d_d[],s_s_s[] 5558 fmulx 2d_2d_d[],4s_4s_s[],2s_2s_s[] 5559 5560 fmulx d,s 5561 fmulx 2d,4s,2s 5562 5563 fneg d,s 5564 fneg 2d,4s,2s 5565 5566 frecpe d,s (recip estimate) 5567 frecpe 2d,4s,2s 5568 5569 frecps d,s (recip step) 5570 frecps 2d,4s,2s 5571 5572 frecpx d,s (recip exponent) 5573 5574 frinta 2d,4s,2s (round to integral, nearest away) 5575 frinta d,s 5576 5577 frinti 2d,4s,2s (round to integral, per FPCR) 5578 frinti d,s 5579 5580 frintm 2d,4s,2s (round to integral, minus inf) 5581 frintm d,s 5582 5583 frintn 2d,4s,2s (round to integral, nearest, to even) 5584 frintn d,s 5585 5586 frintp 2d,4s,2s (round to integral, plus inf) 5587 frintp d,s 5588 5589 frintx 2d,4s,2s (round to integral exact, per FPCR) 5590 frintx d,s 5591 5592 frintz 2d,4s,2s (round to integral, zero) 5593 frintz d,s 5594 5595 frsqrte d,s (est) 5596 frsqrte 2d,4s,2s 5597 5598 frsqrts d,s (step) 5599 frsqrts 2d,4s,2s 5600 5601 fsqrt d,s 5602 fsqrt 2d,4s,2s 5603 5604 fsub d,s 5605 fsub 2d,4s,2s 5606 5607 ins d[]_d[],s[]_s[],h[]_h[],b[]_b[] 5608 5609 ins d[]_x, s[]_w, h[]_w, b[]_w 5610 5611 ld1 (multiple 1-element structures to 1/2/3/4 regs) 5612 ld1 (single 1-element structure to one lane of 1 reg) 5613 ld1r (single 1-element structure and rep to all lanes of 1 reg) 5614 5615 ld2 (multiple 2-element structures to 2 regs) 5616 ld2 (single 2-element structure to one lane of 2 regs) 5617 ld2r (single 2-element structure and rep to all lanes of 2 regs) 5618 5619 ld3 (multiple 3-element structures to 3 regs) 5620 ld3 (single 3-element structure to one lane of 3 regs) 5621 ld3r (single 3-element structure and rep to all lanes of 3 regs) 5622 5623 ld4 (multiple 4-element structures to 4 regs) 5624 ld4 (single 4-element structure to one lane of 4 regs) 5625 ld4r (single 4-element structure and rep to all lanes of 4 regs) 5626 5627 ldnp q_q_addr,d_d_addr,s_s_addr (load pair w/ non-temporal hint) 5628 addr = reg + uimm7 * reg_size 5629 5630 ldp q_q_addr,d_d_addr,s_s_addr (load pair) 5631 addr = [Xn|SP],#imm or [Xn|SP,#imm]! or [Xn|SP,#imm] 5632 5633 ldr q,d,s,h,b from addr 5634 addr = [Xn|SP],#imm or [Xn|SP,#imm]! or [Xn|SP,#imm] 5635 5636 ldr q,d,s from pc+#imm19 5637 5638 ldr q,d,s,h,b from addr 5639 addr = [Xn|SP, R <extend> <shift] 5640 5641 ldur q,d,s,h,b from addr 5642 addr = [Xn|SP,#imm] (unscaled offset) 5643 5644 mla 4s_4s_s[],2s_2s_s[],8h_8h_h[],4h_4h_h[] 5645 mla 4s,2s,8h,4h,16b,8b 5646 5647 mls 4s_4s_s[],2s_2s_s[],8h_8h_h[],4h_4h_h[] 5648 mls 4s,2s,8h,4h,16b,8b 5649 5650 movi 16b,8b #imm8, LSL #0 5651 movi 8h,4h #imm8, LSL #0 or 8 5652 movi 4s,2s #imm8, LSL #0, 8, 16, 24 5653 movi 4s,2s #imm8, MSL #8 or 16 5654 movi d, #imm64 5655 movi 2d, #imm64 5656 5657 mul 4s_4s_s[],2s_2s_s[],8h_8h_h[],4h_4h_h[] 5658 mul 4s,2s,8h,4h,16b,8b 5659 5660 mvni 8h,4h #imm8, LSL #0 or 8 5661 mvni 4s,2s #imm8, LSL #0, 8, 16, 24 5662 mvni 4s,2s #imm8, MSL #8 or 16 5663 5664 neg d 5665 neg 2d,4s,2s,8h,4h,16b,8b 5666 5667 not 16b,8b 5668 5669 orn 16b,8b 5670 5671 orr 8h,4h #imm8, LSL #0 or 8 5672 orr 4s,2s #imm8, LSL #0, 8, 16 or 24 5673 5674 orr 16b,8b 5675 5676 pmul 16b,8b 5677 5678 pmull{2} 8h_8b_8b,8h_16b_16b,1q_1d_1d,1d_2d_2d 5679 5680 raddhn{2} 2s/4s_2d_2d, 4h/8h_4s_4s, 8b/16b_8h_8h 5681 5682 rbit 16b,8b 5683 rev16 16b,8b 5684 rev32 16b,8b,8h,4h 5685 rev64 16b,8b,8h,4h,4s,2s 5686 5687 rshrn{2} 2s/4s_2d, 8h/4h_4s, 2s/4s_2d, #imm in 1 .. elem_bits 5688 5689 rsubhn{2} 2s/4s_2d_2d, 4h/8h_4s_4s, 8b/16b_8h_8h 5690 5691 saba 16b,8b,8h,4h,4s,2s 5692 sabal{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 5693 5694 sabd 16b,8b,8h,4h,4s,2s 5695 sabdl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 5696 5697 sadalp 4h_8b,8h_16b,2s_4h,4s_8h,1d_2s,2d_4s 5698 5699 saddl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 5700 5701 saddlp 4h_8b,8h_16b,2s_4h,4s_8h,1d_2s,2d_4s 5702 5703 saddlv h_16b/8b, s_8h/4h, d_4s 5704 5705 saddw{2} 8h_8h_16b/8b, 4s_4s_8h/4h, 2d_2d_2s/4s 5706 5707 scvtf d,s _#fbits 5708 scvtf 2d,4s,2s _#fbits 5709 5710 scvtf d,s 5711 scvtf 2d,4s,2s 5712 5713 scvtf s_w, d_w, s_x, d_x, _#fbits 5714 scvtf s_w, d_w, s_x, d_x 5715 5716 sha1c q_s_4s 5717 sha1h s_s 5718 sha1m q_s_4s 5719 sha1p q_s_4s 5720 sha1su0 4s_4s_4s 5721 sha1su1 4s_4s 5722 sha256h2 q_q_4s 5723 sha256h q_q_4s 5724 sha256su0 4s_4s 5725 sha256su1 4s_4s_4s 5726 5727 shadd 16b,8b,8h,4h,4s,2s 5728 5729 shl d_#imm 5730 shl 16b,8b,8h,4h,4s,2s,2d _#imm 5731 5732 shll{2} 8h_8b/16b_#8, 4s_4h/8h_#16, 2d_2s/4s_#32 5733 5734 shrn{2} 2s/4s_2d, 8h/4h_4s, 2s/4s_2d, #imm in 1 .. elem_bits 5735 5736 shsub 16b,8b,8h,4h,4s,2s 5737 5738 sli d_#imm 5739 sli 2d,4s,2s,8h,4h,16b,8b _#imm 5740 5741 smax 4s,2s,8h,4h,16b,8b 5742 5743 smaxp 4s,2s,8h,4h,16b,8b 5744 5745 smaxv s_4s,h_8h,h_4h,b_16b,b_8b 5746 5747 smin 4s,2s,8h,4h,16b,8b 5748 5749 sminp 4s,2s,8h,4h,16b,8b 5750 5751 sminv s_4s,h_8h,h_4h,b_16b,b_8b 5752 5753 smlal{2} 2d_2s/4s_s[], 4s_4h/8h_h[] 5754 smlal{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 5755 5756 smlsl{2} 2d_2s/4s_s[], 4s_4h/8h_h[] 5757 smlsl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 5758 5759 smov w_b[], w_h[], x_b[], x_h[], x_s[] 5760 5761 smull{2} 2d_2s/4s_s[]. 4s_4h/8h_h[] 5762 smull{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 5763 5764 sqabs d,s,h,b 5765 sqabs 2d,4s,2s,8h,4h,16b,8b 5766 5767 sqadd d,s,h,b 5768 sqadd 2d,4s,2s,8h,4h,16b,8b 5769 5770 sqdmlal d_s_s[], s_h_h[] 5771 sqdmlal{2} 2d_2s/4s_s[], 4s_4h/8h_h[] 5772 5773 sqdmlal d_s_s, s_h_h 5774 sqdmlal{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h) 5775 5776 sqdmlsl d_s_s[], s_h_h[] 5777 sqdmlsl{2} 2d_2s/4s_s[], 4s_4h/8h_h[] 5778 5779 sqdmlsl d_s_s, s_h_h 5780 sqdmlsl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h) 5781 5782 sqdmulh s_s_s[], h_h_h[] 5783 sqdmulh 4s_4s_s[], 2s_2s_s[], 8h_8h_h[], 4h_4h_h[] 5784 5785 sqdmulh h,s 5786 sqdmulh 4s,2s,8h,4h 5787 5788 sqdmull d_s_s[], s_h_h[] 5789 sqdmull{2} 2d_2s/4s_s[], 4s_4h/2h_h[] 5790 5791 sqdmull d_s_s,s_h_h 5792 sqdmull{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h) 5793 5794 sqneg d,s,h,b 5795 sqneg 2d,4s,2s,8h,4h,16b,8b 5796 5797 sqrdmulh s_s_s[], h_h_h[] 5798 sqrdmulh 4s_4s_s[], 2s_2s_s[], 8h_8h_h[], 4h_4h_h[] 5799 5800 sqrdmulh h,s 5801 sqrdmulh 4s,2s,8h,4h 5802 5803 sqrshl d,s,h,b 5804 sqrshl 2d,4s,2s,8h,4h,16b,8b 5805 5806 sqrshrn s_d, h_s, b_h #imm 5807 sqrshrn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h, #imm 5808 5809 sqrshrun s_d, h_s, b_h #imm 5810 sqrshrun{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h, #imm 5811 5812 sqshl d,s,h,b _#imm 5813 sqshl 2d,4s,2s,8h,4h,16b,8b _#imm 5814 5815 sqshl d,s,h,b 5816 sqshl 2d,4s,2s,8h,4h,16b,8b 5817 5818 sqshlu d,s,h,b _#imm 5819 sqshlu 2d,4s,2s,8h,4h,16b,8b _#imm 5820 5821 sqshrn s_d, h_s, b_h #imm 5822 sqshrn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h, #imm 5823 5824 sqshrun s_d, h_s, b_h #imm 5825 sqshrun{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h, #imm 5826 5827 sqsub d,s,h,b 5828 sqsub 2d,4s,2s,8h,4h,16b,8b 5829 5830 sqxtn s_d,h_s,b_h 5831 sqxtn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h 5832 5833 sqxtun s_d,h_s,b_h 5834 sqxtun{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h 5835 5836 srhadd 4s,2s,8h,4h,16b,8b 5837 5838 sri d_#imm 5839 sri 2d,4s,2s,8h,4h,16b,8b _#imm 5840 5841 srshl (reg) d 5842 srshl 2d,4s,2s,8h,4h,16b,8b 5843 5844 srshr (imm) d 5845 srshr 2d,4s,2s,8h,4h,16b,8b 5846 5847 srsra (imm) d 5848 srsra 2d,4s,2s,8h,4h,16b,8b 5849 5850 sshl (reg) d 5851 sshl 2d,4s,2s,8h,4h,16b,8b 5852 5853 sshll{2} (imm) 2d_2s/4s 4s_4h/8h, 8h_8b/16b 5854 5855 sshr (imm) d 5856 sshr 2d,4s,2s,8h,4h,16b,8b 5857 5858 ssra (imm) d 5859 ssra 2d,4s,2s,8h,4h,16b,8b 5860 5861 ssubl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 5862 5863 ssubw{2} 8h_8h_16b/8b, 4s_4s_8h/4h, 2d_2d_2s/4s 5864 5865 st1 (multiple 1-element structures from 1/2/3/4 regs) 5866 st1 (single 1-element structure for 1 lane of 1 reg) 5867 5868 st2 (multiple 2-element structures from 2 regs) 5869 st2 (single 2-element structure from 1 lane of 2 regs) 5870 5871 st3 (multiple 3-element structures from 3 regs) 5872 st3 (single 3-element structure from 1 lane of 3 regs) 5873 5874 st4 (multiple 4-element structures from 4 regs) 5875 st4 (single 4-element structure from one lane of 4 regs) 5876 5877 stnp q_q_addr, d_d_addr, s_s_addr 5878 addr = [Xn|SP, #imm] 5879 5880 stp q_q_addr, d_d_addr, s_s_addr 5881 addr = [Xn|SP], #imm or [Xn|SP, #imm]! or [Xn|SP, #imm] 5882 5883 str q,d,s,h,b_addr 5884 addr = [Xn|SP], #simm or [Xn|SP, #simm]! or [Xn|SP, #pimm] 5885 5886 str q,d,s,h,b_addr 5887 addr = [Xn|SP, R <extend> <shift] 5888 5889 stur q,d,s,h,b_addr 5890 addr = [Xn|SP,#imm] (unscaled offset) 5891 5892 sub d 5893 sub 2d,4s,2s,8h,4h,16b,8b 5894 5895 subhn{2} 2s/4s_2d_2d, 4h/8h_4s_4s, 8b/16b_8h_8h 5896 5897 suqadd d,s,h,b 5898 suqadd 2d,4s,2s,8h,4h,16b,8b 5899 5900 tbl 8b_{16b}_8b, 16b_{16b}_16b 5901 tbl 8b_{16b,16b}_8b, 16b_{16b,16b}_16b 5902 tbl 8b_{16b,16b,16b}_8b, 16b_{16b,16b,16b}_16b 5903 tbl 8b_{16b,16b,16b,16b}_8b, 16b_{16b,16b,16b,16b}_16b 5904 5905 tbx 8b_{16b}_8b, 16b_{16b}_16b 5906 tbx 8b_{16b,16b}_8b, 16b_{16b,16b}_16b 5907 tbx 8b_{16b,16b,16b}_8b, 16b_{16b,16b,16b}_16b 5908 tbx 8b_{16b,16b,16b,16b}_8b, 16b_{16b,16b,16b,16b}_16b 5909 5910 trn1 2d,4s,2s,8h,4h,16b,8b 5911 trn2 2d,4s,2s,8h,4h,16b,8b 5912 5913 uaba 16b,8b,8h,4h,4s,2s 5914 uabal{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 5915 5916 uabd 16b,8b,8h,4h,4s,2s 5917 uabdl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 5918 5919 uadalp 4h_8b,8h_16b,2s_4h,4s_8h,1d_2s,2d_4s 5920 5921 uaddl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 5922 5923 uaddlp 4h_8b,8h_16b,2s_4h,4s_8h,1d_2s,2d_4s 5924 5925 uaddlv h_16b/8b, s_8h/4h, d_4s 5926 5927 uaddw{2} 8h_8h_16b/8b, 4s_4s_8h/4h, 2d_2d_2s/4s 5928 5929 ucvtf d,s _#fbits 5930 ucvtf 2d,4s,2s _#fbits 5931 5932 ucvtf d,s 5933 ucvtf 2d,4s,2s 5934 5935 ucvtf s_w, d_w, s_x, d_x, _#fbits 5936 ucvtf s_w, d_w, s_x, d_x 5937 5938 uhadd 16b,8b,8h,4h,4s,2s 5939 5940 uhsub 16b,8b,8h,4h,4s,2s 5941 5942 umax 4s,2s,8h,4h,16b,8b 5943 5944 umaxp 4s,2s,8h,4h,16b,8b 5945 5946 umaxv s_4s,h_8h,h_4h,b_16b,b_8b 5947 5948 umin 4s,2s,8h,4h,16b,8b 5949 5950 uminp 4s,2s,8h,4h,16b,8b 5951 5952 uminv s_4s,h_8h,h_4h,b_16b,b_8b 5953 5954 umlal{2} 2d_2s/4s_s[], 4s_4h/8h_h[] 5955 umlal{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 5956 5957 umlsl{2} 2d_2s/4s_s[], 4s_4h/8h_h[] 5958 umlsl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 5959 5960 umov w_b[], w_h[], x_b[], x_h[], x_s[] 5961 5962 umull{2} 2d_2s/4s_s[]. 4s_4h/8h_h[] 5963 umull{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 5964 5965 uqadd d,s,h,b 5966 uqadd 2d,4s,2s,8h,4h,16b,8b 5967 5968 uqrshl d,s,h,b 5969 uqrshl 2d,4s,2s,8h,4h,16b,8b 5970 5971 uqrshrn s_d, h_s, b_h #imm 5972 uqrshrn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h, #imm 5973 5974 uqshl d,s,h,b _#imm 5975 uqshl 2d,4s,2s,8h,4h,16b,8b _#imm 5976 5977 uqshl d,s,h,b 5978 uqshl 2d,4s,2s,8h,4h,16b,8b 5979 5980 uqshrn s_d, h_s, b_h #imm 5981 uqshrn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h, #imm 5982 5983 uqsub d,s,h,b 5984 uqsub 2d,4s,2s,8h,4h,16b,8b 5985 5986 uqxtn s_d,h_s,b_h 5987 uqxtn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h 5988 5989 urecpe 4s,2s 5990 5991 urhadd 4s,2s,8h,4h,16b,8b 5992 5993 urshl (reg) d 5994 urshl 2d,4s,2s,8h,4h,16b,8b 5995 5996 urshr (imm) d 5997 urshr 2d,4s,2s,8h,4h,16b,8b 5998 5999 ursqrte 4s,2s 6000 6001 ursra (imm) d 6002 ursra 2d,4s,2s,8h,4h,16b,8b 6003 6004 ushl (reg) d 6005 ushl 2d,4s,2s,8h,4h,16b,8b 6006 6007 ushll{2} (imm) 2d_2s/4s 4s_4h/8h, 8h_8b/16b 6008 6009 ushr (imm) d 6010 ushr 2d,4s,2s,8h,4h,16b,8b 6011 6012 usqadd d,s,h,b 6013 usqadd 2d,4s,2s,8h,4h,16b,8b 6014 6015 usra (imm) d 6016 usra 2d,4s,2s,8h,4h,16b,8b 6017 6018 usubl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 6019 6020 usubw{2} 8h_8h_16b/8b, 4s_4s_8h/4h, 2d_2d_2s/4s 6021 6022 uzp1 2d,4s,2s,8h,4h,16b,8b 6023 uzp2 2d,4s,2s,8h,4h,16b,8b 6024 6025 xtn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h 6026 6027 zip1 2d,4s,2s,8h,4h,16b,8b 6028 zip2 2d,4s,2s,8h,4h,16b,8b 6029 */ 6030 6031 6032 /* ---------------------------------------------------------------- */ 6033 /* -- List of insns, grouped somewhat by laneage configuration -- */ 6034 /* ---------------------------------------------------------------- */ 6035 /* 6036 ======================== FP ======================== 6037 6038 fabs d,s 6039 fabs 2d,4s,2s 6040 6041 fneg d,s 6042 fneg 2d,4s,2s 6043 6044 fsqrt d,s 6045 fsqrt 2d,4s,2s 6046 6047 fadd d,s 6048 fsub d,s 6049 6050 fadd 2d,4s,2s 6051 fsub 2d,4s,2s 6052 6053 fabd d,s 6054 fabd 2d,4s,2s 6055 6056 faddp d,s (floating add pair) 6057 faddp 2d,4s,2s 6058 6059 fccmp d,s (floating point conditional quiet compare) 6060 fccmpe d,s (floating point conditional signaling compare) 6061 6062 fcmeq d,s 6063 fcmge d,s 6064 fcmgt d,s 6065 facgt d,s (floating abs compare GE) 6066 facge d,s (floating abs compare GE) 6067 6068 fcmeq 2d,4s,2s 6069 fcmge 2d,4s,2s 6070 fcmgt 2d,4s,2s 6071 facge 2d,4s,2s 6072 facgt 2d,4s,2s 6073 6074 fcmeq_z d,s 6075 fcmge_z d,s 6076 fcmgt_z d,s 6077 fcmle_z d,s 6078 fcmlt_z d,s 6079 6080 fcmeq_z 2d,4s,2s 6081 fcmge_z 2d,4s,2s 6082 fcmgt_z 2d,4s,2s 6083 fcmle_z 2d,4s,2s 6084 fcmlt_z 2d,4s,2s 6085 6086 fcmp_z d,s 6087 fcmpe_z d,s 6088 fcmp d,s (floating point quiet, set flags) 6089 fcmpe d,s (floating point signaling, set flags) 6090 6091 fcsel d,s (fp cond select) 6092 6093 fdiv d,s 6094 fdiv 2d,4s,2s 6095 6096 fmadd d,s 6097 fnmadd d,s 6098 fmsub d,s 6099 fnmsub d,s 6100 6101 fnmul d,s 6102 6103 fmax d,s 6104 fmin d,s 6105 fmaxnm d,s ("max number") 6106 fminnm d,s 6107 6108 fmax 2d,4s,2s 6109 fmin 2d,4s,2s 6110 fmaxnm 2d,4s,2s 6111 fminnm 2d,4s,2s 6112 6113 fmaxnmp d_2d,s_2s ("max number pairwise") 6114 fminnmp d_2d,s_2s 6115 6116 fmaxnmp 2d,4s,2s 6117 fminnmp 2d,4s,2s 6118 6119 fmaxnmv s_4s (maxnum across vector) 6120 fminnmv s_4s 6121 6122 fmaxp d_2d,s_2s (max of a pair) 6123 fminp d_2d,s_2s (max of a pair) 6124 6125 fmaxp 2d,4s,2s (max pairwise) 6126 fminp 2d,4s,2s 6127 6128 fmaxv s_4s (max across vector) 6129 fminv s_4s 6130 6131 fmla 2d,4s,2s 6132 fmls 2d,4s,2s 6133 6134 fmla d_d_d[],s_s_s[] (by element) 6135 fmls d_d_d[],s_s_s[] (by element) 6136 6137 fmla 2d_2d_d[],4s_4s_s[],2s_2s_s[] 6138 fmls 2d_2d_d[],4s_4s_s[],2s_2s_s[] 6139 6140 fmov 2d,4s,2s #imm (part of the MOVI/MVNI/ORR/BIC imm group) 6141 6142 fmov d_d,s_s 6143 6144 fmov s_w,w_s,d_x,d[1]_x,x_d,x_d[1] 6145 6146 fmov d,s #imm 6147 6148 fmul d_d_d[],s_s_s[] 6149 fmul 2d_2d_d[],4s_4s_s[],2s_2s_s[] 6150 6151 fmul 2d,4s,2s 6152 fmul d,s 6153 6154 fmulx d_d_d[],s_s_s[] 6155 fmulx 2d_2d_d[],4s_4s_s[],2s_2s_s[] 6156 6157 fmulx d,s 6158 fmulx 2d,4s,2s 6159 6160 frecpe d,s (recip estimate) 6161 frecpe 2d,4s,2s 6162 6163 frecps d,s (recip step) 6164 frecps 2d,4s,2s 6165 6166 frecpx d,s (recip exponent) 6167 6168 frinta d,s 6169 frinti d,s 6170 frintm d,s 6171 frintn d,s 6172 frintp d,s 6173 frintx d,s 6174 frintz d,s 6175 6176 frinta 2d,4s,2s (round to integral, nearest away) 6177 frinti 2d,4s,2s (round to integral, per FPCR) 6178 frintm 2d,4s,2s (round to integral, minus inf) 6179 frintn 2d,4s,2s (round to integral, nearest, to even) 6180 frintp 2d,4s,2s (round to integral, plus inf) 6181 frintx 2d,4s,2s (round to integral exact, per FPCR) 6182 frintz 2d,4s,2s (round to integral, zero) 6183 6184 frsqrte d,s (est) 6185 frsqrte 2d,4s,2s 6186 6187 frsqrts d,s (step) 6188 frsqrts 2d,4s,2s 6189 6190 ======================== CONV ======================== 6191 6192 fcvt s_h,d_h,h_s,d_s,h_d,s_d (fp convert, scalar) 6193 6194 fcvtl{2} 4s/4h, 4s/8h, 2d/2s, 2d/4s (float convert to longer form) 6195 6196 fcvtn{2} 4h/4s, 8h/4s, 2s/2d, 4s/2d (float convert to narrower form) 6197 6198 fcvtas d,s (fcvt to signed int, nearest, ties away) 6199 fcvtau d,s (fcvt to unsigned int, nearest, ties away) 6200 fcvtas 2d,4s,2s 6201 fcvtau 2d,4s,2s 6202 fcvtas w_s,x_s,w_d,x_d 6203 fcvtau w_s,x_s,w_d,x_d 6204 6205 fcvtms d,s (fcvt to signed int, minus inf) 6206 fcvtmu d,s (fcvt to unsigned int, minus inf) 6207 fcvtms 2d,4s,2s 6208 fcvtmu 2d,4s,2s 6209 fcvtms w_s,x_s,w_d,x_d 6210 fcvtmu w_s,x_s,w_d,x_d 6211 6212 fcvtns d,s (fcvt to signed int, nearest) 6213 fcvtnu d,s (fcvt to unsigned int, nearest) 6214 fcvtns 2d,4s,2s 6215 fcvtnu 2d,4s,2s 6216 fcvtns w_s,x_s,w_d,x_d 6217 fcvtnu w_s,x_s,w_d,x_d 6218 6219 fcvtps d,s (fcvt to signed int, plus inf) 6220 fcvtpu d,s (fcvt to unsigned int, plus inf) 6221 fcvtps 2d,4s,2s 6222 fcvtpu 2d,4s,2s 6223 fcvtps w_s,x_s,w_d,x_d 6224 fcvtpu w_s,x_s,w_d,x_d 6225 6226 fcvtzs d,s (fcvt to signed integer, to zero) 6227 fcvtzu d,s (fcvt to unsigned integer, to zero) 6228 fcvtzs 2d,4s,2s 6229 fcvtzu 2d,4s,2s 6230 fcvtzs w_s,x_s,w_d,x_d 6231 fcvtzu w_s,x_s,w_d,x_d 6232 6233 fcvtzs d,s (fcvt to signed fixedpt, to zero) (w/ #fbits) 6234 fcvtzu d,s (fcvt to unsigned fixedpt, to zero) (w/ #fbits) 6235 fcvtzs 2d,4s,2s 6236 fcvtzu 2d,4s,2s 6237 fcvtzs w_s,x_s,w_d,x_d (fcvt to signed fixedpt, to zero) (w/ #fbits) 6238 fcvtzu w_s,x_s,w_d,x_d (fcvt to unsigned fixedpt, to zero) (w/ #fbits) 6239 6240 fcvtxn s_d (fcvt to lower prec narrow, rounding to odd) 6241 fcvtxn 2s_2d,4s_2d 6242 6243 scvtf d,s _#fbits 6244 ucvtf d,s _#fbits 6245 6246 scvtf 2d,4s,2s _#fbits 6247 ucvtf 2d,4s,2s _#fbits 6248 6249 scvtf d,s 6250 ucvtf d,s 6251 6252 scvtf 2d,4s,2s 6253 ucvtf 2d,4s,2s 6254 6255 scvtf s_w, d_w, s_x, d_x, _#fbits 6256 ucvtf s_w, d_w, s_x, d_x, _#fbits 6257 6258 scvtf s_w, d_w, s_x, d_x 6259 ucvtf s_w, d_w, s_x, d_x 6260 6261 ======================== INT ======================== 6262 6263 abs d 6264 neg d 6265 6266 abs 2d,4s,2s,8h,4h,16b,8b 6267 neg 2d,4s,2s,8h,4h,16b,8b 6268 6269 add d 6270 sub d 6271 6272 add 2d,4s,2s,8h,4h,16b,8b 6273 sub 2d,4s,2s,8h,4h,16b,8b 6274 6275 addhn{2} 2s/4s_2d_2d, 4h/8h_4s_4s, 8b/16b_8h_8h 6276 subhn{2} 2s/4s_2d_2d, 4h/8h_4s_4s, 8b/16b_8h_8h 6277 raddhn{2} 2s/4s_2d_2d, 4h/8h_4s_4s, 8b/16b_8h_8h 6278 rsubhn{2} 2s/4s_2d_2d, 4h/8h_4s_4s, 8b/16b_8h_8h 6279 6280 addp d (add pairs, across) 6281 addp 2d,4s,2s,8h,4h,16b,8b 6282 addv 4s,8h,4h,16b,18b (reduce across vector) 6283 6284 and 16b,8b 6285 6286 orr 8h,4h #imm8, LSL #0 or 8 6287 orr 4s,2s #imm8, LSL #0, 8, 16 or 24 6288 bic 8h,4h #imm8, LSL #0 or 8 6289 bic 4s,2s #imm8, LSL #0, 8, 16 or 24 6290 also movi, mvni 6291 6292 bic 16b,8b (vector,reg) (bit clear) 6293 bif 16b,8b (vector) (bit insert if false) 6294 bit 16b,8b (vector) (bit insert if true) 6295 bsl 16b,8b (vector) (bit select) 6296 6297 cls 4s,2s,8h,4h,16b,8b (count leading sign bits) 6298 clz 4s,2s,8h,4h,16b,8b (count leading zero bits) 6299 6300 cmeq d 6301 cmge d 6302 cmgt d 6303 cmhi d 6304 cmhs d 6305 cmtst d 6306 6307 cmeq 2d,4s,2s,8h,4h,16b,8b 6308 cmge 2d,4s,2s,8h,4h,16b,8b 6309 cmgt 2d,4s,2s,8h,4h,16b,8b 6310 cmhi 2d,4s,2s,8h,4h,16b,8b 6311 cmhs 2d,4s,2s,8h,4h,16b,8b 6312 cmtst 2d,4s,2s,8h,4h,16b,8b 6313 6314 cmeq_z d 6315 cmge_z d 6316 cmgt_z d 6317 cmle_z d 6318 cmlt_z d 6319 6320 cmeq_z 2d,4s,2s,8h,4h,16b,8b 6321 cmge_z 2d,4s,2s,8h,4h,16b,8b 6322 cmgt_z 2d,4s,2s,8h,4h,16b,8b 6323 cmle_z 2d,4s,2s,8h,4h,16b,8b 6324 cmlt_z 2d,4s,2s,8h,4h,16b,8b 6325 6326 cnt 16b,8b (population count per byte) 6327 6328 dup d,s,h,b (vec elem to scalar) 6329 dup 2d,4s,2s,8h,4h,16b,8b (vec elem to vector) 6330 dup 2d,4s,2s,8h,4h,16b,8b (general reg to vector) 6331 6332 eor 16b,8b (vector) 6333 ext 16b,8b,#imm4 (concat 2 vectors, then slice) 6334 6335 ins d[]_d[],s[]_s[],h[]_h[],b[]_b[] 6336 6337 ins d[]_x, s[]_w, h[]_w, b[]_w 6338 6339 mla 4s_4s_s[],2s_2s_s[],8h_8h_h[],4h_4h_h[] 6340 mla 4s,2s,8h,4h,16b,8b 6341 6342 mls 4s_4s_s[],2s_2s_s[],8h_8h_h[],4h_4h_h[] 6343 mls 4s,2s,8h,4h,16b,8b 6344 6345 movi 16b,8b #imm8, LSL #0 6346 movi 8h,4h #imm8, LSL #0 or 8 6347 movi 4s,2s #imm8, LSL #0, 8, 16, 24 6348 movi 4s,2s #imm8, MSL #8 or 16 6349 movi d, #imm64 6350 movi 2d, #imm64 6351 6352 mul 4s_4s_s[],2s_2s_s[],8h_8h_h[],4h_4h_h[] 6353 mul 4s,2s,8h,4h,16b,8b 6354 6355 mvni 8h,4h #imm8, LSL #0 or 8 6356 mvni 4s,2s #imm8, LSL #0, 8, 16, 24 6357 mvni 4s,2s #imm8, MSL #8 or 16 6358 6359 not 16b,8b 6360 6361 orn 16b,8b 6362 orr 16b,8b 6363 6364 pmul 16b,8b 6365 6366 pmull{2} 8h_8b_8b,8h_16b_16b,1q_1d_1d,1d_2d_2d 6367 6368 rbit 16b,8b 6369 rev16 16b,8b 6370 rev32 16b,8b,8h,4h 6371 rev64 16b,8b,8h,4h,4s,2s 6372 6373 saba 16b,8b,8h,4h,4s,2s 6374 uaba 16b,8b,8h,4h,4s,2s 6375 6376 sabal{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 6377 uabal{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 6378 6379 sabd 16b,8b,8h,4h,4s,2s 6380 uabd 16b,8b,8h,4h,4s,2s 6381 6382 sabdl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 6383 uabdl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 6384 6385 sadalp 4h_8b,8h_16b,2s_4h,4s_8h,1d_2s,2d_4s 6386 uadalp 4h_8b,8h_16b,2s_4h,4s_8h,1d_2s,2d_4s 6387 6388 saddl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 6389 uaddl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 6390 ssubl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 6391 usubl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 6392 6393 saddlp 4h_8b,8h_16b,2s_4h,4s_8h,1d_2s,2d_4s 6394 uaddlp 4h_8b,8h_16b,2s_4h,4s_8h,1d_2s,2d_4s 6395 6396 saddlv h_16b/8b, s_8h/4h, d_4s 6397 uaddlv h_16b/8b, s_8h/4h, d_4s 6398 6399 saddw{2} 8h_8h_16b/8b, 4s_4s_8h/4h, 2d_2d_2s/4s 6400 uaddw{2} 8h_8h_16b/8b, 4s_4s_8h/4h, 2d_2d_2s/4s 6401 ssubw{2} 8h_8h_16b/8b, 4s_4s_8h/4h, 2d_2d_2s/4s 6402 usubw{2} 8h_8h_16b/8b, 4s_4s_8h/4h, 2d_2d_2s/4s 6403 6404 shadd 16b,8b,8h,4h,4s,2s 6405 uhadd 16b,8b,8h,4h,4s,2s 6406 shsub 16b,8b,8h,4h,4s,2s 6407 uhsub 16b,8b,8h,4h,4s,2s 6408 6409 shl d_#imm 6410 shl 16b,8b,8h,4h,4s,2s,2d _#imm 6411 6412 shll{2} 8h_8b/16b_#8, 4s_4h/8h_#16, 2d_2s/4s_#32 6413 6414 shrn{2} 2s/4s_2d, 8h/4h_4s, 2s/4s_2d, #imm in 1 .. elem_bits 6415 rshrn{2} 2s/4s_2d, 8h/4h_4s, 2s/4s_2d, #imm in 1 .. elem_bits 6416 6417 sli d_#imm 6418 sri d_#imm 6419 6420 sli 2d,4s,2s,8h,4h,16b,8b _#imm 6421 sri 2d,4s,2s,8h,4h,16b,8b _#imm 6422 6423 smax 4s,2s,8h,4h,16b,8b 6424 umax 4s,2s,8h,4h,16b,8b 6425 smin 4s,2s,8h,4h,16b,8b 6426 umin 4s,2s,8h,4h,16b,8b 6427 6428 smaxp 4s,2s,8h,4h,16b,8b 6429 umaxp 4s,2s,8h,4h,16b,8b 6430 sminp 4s,2s,8h,4h,16b,8b 6431 uminp 4s,2s,8h,4h,16b,8b 6432 6433 smaxv s_4s,h_8h,h_4h,b_16b,b_8b 6434 umaxv s_4s,h_8h,h_4h,b_16b,b_8b 6435 sminv s_4s,h_8h,h_4h,b_16b,b_8b 6436 uminv s_4s,h_8h,h_4h,b_16b,b_8b 6437 6438 smlal{2} 2d_2s/4s_s[], 4s_4h/8h_h[] 6439 umlal{2} 2d_2s/4s_s[], 4s_4h/8h_h[] 6440 smlsl{2} 2d_2s/4s_s[], 4s_4h/8h_h[] 6441 umlsl{2} 2d_2s/4s_s[], 4s_4h/8h_h[] 6442 smull{2} 2d_2s/4s_s[]. 4s_4h/8h_h[] 6443 umull{2} 2d_2s/4s_s[]. 4s_4h/8h_h[] 6444 6445 smlal{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 6446 umlal{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 6447 smlsl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 6448 umlsl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 6449 smull{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 6450 umull{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b) 6451 6452 smov w_b[], w_h[], x_b[], x_h[], x_s[] 6453 umov w_b[], w_h[], x_b[], x_h[], x_s[] 6454 6455 sqabs d,s,h,b 6456 sqneg d,s,h,b 6457 6458 sqabs 2d,4s,2s,8h,4h,16b,8b 6459 sqneg 2d,4s,2s,8h,4h,16b,8b 6460 6461 sqadd d,s,h,b 6462 uqadd d,s,h,b 6463 sqsub d,s,h,b 6464 uqsub d,s,h,b 6465 6466 sqadd 2d,4s,2s,8h,4h,16b,8b 6467 uqadd 2d,4s,2s,8h,4h,16b,8b 6468 sqsub 2d,4s,2s,8h,4h,16b,8b 6469 uqsub 2d,4s,2s,8h,4h,16b,8b 6470 6471 sqdmlal d_s_s[], s_h_h[] 6472 sqdmlsl d_s_s[], s_h_h[] 6473 sqdmull d_s_s[], s_h_h[] 6474 6475 sqdmlal{2} 2d_2s/4s_s[], 4s_4h/8h_h[] 6476 sqdmlsl{2} 2d_2s/4s_s[], 4s_4h/8h_h[] 6477 sqdmull{2} 2d_2s/4s_s[], 4s_4h/2h_h[] 6478 6479 sqdmlal d_s_s, s_h_h 6480 sqdmlsl d_s_s, s_h_h 6481 sqdmull d_s_s, s_h_h 6482 6483 sqdmlal{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h) 6484 sqdmlsl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h) 6485 sqdmull{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h) 6486 6487 sqdmulh s_s_s[], h_h_h[] 6488 sqrdmulh s_s_s[], h_h_h[] 6489 6490 sqdmulh 4s_4s_s[], 2s_2s_s[], 8h_8h_h[], 4h_4h_h[] 6491 sqrdmulh 4s_4s_s[], 2s_2s_s[], 8h_8h_h[], 4h_4h_h[] 6492 6493 sqdmulh h,s 6494 sqrdmulh h,s 6495 6496 sqdmulh 4s,2s,8h,4h 6497 sqrdmulh 4s,2s,8h,4h 6498 6499 sqshl d,s,h,b 6500 uqshl d,s,h,b 6501 sqrshl d,s,h,b 6502 uqrshl d,s,h,b 6503 6504 sqshl 2d,4s,2s,8h,4h,16b,8b 6505 uqshl 2d,4s,2s,8h,4h,16b,8b 6506 sqrshl 2d,4s,2s,8h,4h,16b,8b 6507 uqrshl 2d,4s,2s,8h,4h,16b,8b 6508 6509 sqrshrn s_d, h_s, b_h #imm 6510 uqrshrn s_d, h_s, b_h #imm 6511 sqshrn s_d, h_s, b_h #imm 6512 uqshrn s_d, h_s, b_h #imm 6513 6514 sqrshrun s_d, h_s, b_h #imm 6515 sqshrun s_d, h_s, b_h #imm 6516 6517 sqrshrn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h, #imm 6518 uqrshrn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h, #imm 6519 sqshrn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h, #imm 6520 uqshrn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h, #imm 6521 6522 sqrshrun{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h, #imm 6523 sqshrun{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h, #imm 6524 6525 sqshl d,s,h,b _#imm 6526 uqshl d,s,h,b _#imm 6527 sqshlu d,s,h,b _#imm 6528 6529 sqshl 2d,4s,2s,8h,4h,16b,8b _#imm 6530 uqshl 2d,4s,2s,8h,4h,16b,8b _#imm 6531 sqshlu 2d,4s,2s,8h,4h,16b,8b _#imm 6532 6533 sqxtn s_d,h_s,b_h 6534 uqxtn s_d,h_s,b_h 6535 sqxtun s_d,h_s,b_h 6536 6537 sqxtn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h 6538 uqxtn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h 6539 sqxtun{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h 6540 6541 srhadd 4s,2s,8h,4h,16b,8b 6542 urhadd 4s,2s,8h,4h,16b,8b 6543 6544 sshl (reg) d 6545 ushl (reg) d 6546 sshr (imm) d 6547 ushr (imm) d 6548 ssra (imm) d 6549 usra (imm) d 6550 6551 srshl (reg) d 6552 urshl (reg) d 6553 srshr (imm) d 6554 urshr (imm) d 6555 srsra (imm) d 6556 ursra (imm) d 6557 6558 sshl 2d,4s,2s,8h,4h,16b,8b 6559 ushl 2d,4s,2s,8h,4h,16b,8b 6560 sshr 2d,4s,2s,8h,4h,16b,8b 6561 ushr 2d,4s,2s,8h,4h,16b,8b 6562 ssra 2d,4s,2s,8h,4h,16b,8b 6563 usra 2d,4s,2s,8h,4h,16b,8b 6564 6565 srshl 2d,4s,2s,8h,4h,16b,8b 6566 urshl 2d,4s,2s,8h,4h,16b,8b 6567 srshr 2d,4s,2s,8h,4h,16b,8b 6568 urshr 2d,4s,2s,8h,4h,16b,8b 6569 srsra 2d,4s,2s,8h,4h,16b,8b 6570 ursra 2d,4s,2s,8h,4h,16b,8b 6571 6572 sshll{2} (imm) 2d_2s/4s 4s_4h/8h, 8h_8b/16b 6573 ushll{2} (imm) 2d_2s/4s 4s_4h/8h, 8h_8b/16b 6574 6575 suqadd d,s,h,b 6576 suqadd 2d,4s,2s,8h,4h,16b,8b 6577 6578 tbl 8b_{16b}_8b, 16b_{16b}_16b 6579 tbl 8b_{16b,16b}_8b, 16b_{16b,16b}_16b 6580 tbl 8b_{16b,16b,16b}_8b, 16b_{16b,16b,16b}_16b 6581 tbl 8b_{16b,16b,16b,16b}_8b, 16b_{16b,16b,16b,16b}_16b 6582 6583 tbx 8b_{16b}_8b, 16b_{16b}_16b 6584 tbx 8b_{16b,16b}_8b, 16b_{16b,16b}_16b 6585 tbx 8b_{16b,16b,16b}_8b, 16b_{16b,16b,16b}_16b 6586 tbx 8b_{16b,16b,16b,16b}_8b, 16b_{16b,16b,16b,16b}_16b 6587 6588 trn1 2d,4s,2s,8h,4h,16b,8b 6589 trn2 2d,4s,2s,8h,4h,16b,8b 6590 6591 urecpe 4s,2s 6592 6593 ursqrte 4s,2s 6594 6595 usqadd d,s,h,b 6596 usqadd 2d,4s,2s,8h,4h,16b,8b 6597 6598 uzp1 2d,4s,2s,8h,4h,16b,8b 6599 uzp2 2d,4s,2s,8h,4h,16b,8b 6600 6601 xtn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h 6602 6603 zip1 2d,4s,2s,8h,4h,16b,8b 6604 zip2 2d,4s,2s,8h,4h,16b,8b 6605 6606 ======================== MEM ======================== 6607 6608 ld1 (multiple 1-element structures to 1/2/3/4 regs) 6609 ld1 (single 1-element structure to one lane of 1 reg) 6610 ld1r (single 1-element structure and rep to all lanes of 1 reg) 6611 6612 ld2 (multiple 2-element structures to 2 regs) 6613 ld2 (single 2-element structure to one lane of 2 regs) 6614 ld2r (single 2-element structure and rep to all lanes of 2 regs) 6615 6616 ld3 (multiple 3-element structures to 3 regs) 6617 ld3 (single 3-element structure to one lane of 3 regs) 6618 ld3r (single 3-element structure and rep to all lanes of 3 regs) 6619 6620 ld4 (multiple 4-element structures to 4 regs) 6621 ld4 (single 4-element structure to one lane of 4 regs) 6622 ld4r (single 4-element structure and rep to all lanes of 4 regs) 6623 6624 ldnp q_q_addr,d_d_addr,s_s_addr (load pair w/ non-temporal hint) 6625 addr = reg + uimm7 * reg_size 6626 6627 ldp q_q_addr,d_d_addr,s_s_addr (load pair) 6628 addr = [Xn|SP],#imm or [Xn|SP,#imm]! or [Xn|SP,#imm] 6629 6630 ldr q,d,s,h,b from addr 6631 addr = [Xn|SP],#imm or [Xn|SP,#imm]! or [Xn|SP,#imm] 6632 6633 ldr q,d,s from pc+#imm19 6634 6635 ldr q,d,s,h,b from addr 6636 addr = [Xn|SP, R <extend> <shift] 6637 6638 ldur q,d,s,h,b from addr 6639 addr = [Xn|SP,#imm] (unscaled offset) 6640 6641 st1 (multiple 1-element structures from 1/2/3/4 regs) 6642 st1 (single 1-element structure for 1 lane of 1 reg) 6643 6644 st2 (multiple 2-element structures from 2 regs) 6645 st2 (single 2-element structure from 1 lane of 2 regs) 6646 6647 st3 (multiple 3-element structures from 3 regs) 6648 st3 (single 3-element structure from 1 lane of 3 regs) 6649 6650 st4 (multiple 4-element structures from 4 regs) 6651 st4 (single 4-element structure from one lane of 4 regs) 6652 6653 stnp q_q_addr, d_d_addr, s_s_addr 6654 addr = [Xn|SP, #imm] 6655 6656 stp q_q_addr, d_d_addr, s_s_addr 6657 addr = [Xn|SP], #imm or [Xn|SP, #imm]! or [Xn|SP, #imm] 6658 6659 str q,d,s,h,b_addr 6660 addr = [Xn|SP], #simm or [Xn|SP, #simm]! or [Xn|SP, #pimm] 6661 6662 str q,d,s,h,b_addr 6663 addr = [Xn|SP, R <extend> <shift] 6664 6665 stur q,d,s,h,b_addr 6666 addr = [Xn|SP,#imm] (unscaled offset) 6667 6668 ======================== CRYPTO ======================== 6669 6670 aesd 16b (aes single round decryption) 6671 aese 16b (aes single round encryption) 6672 aesimc 16b (aes inverse mix columns) 6673 aesmc 16b (aes mix columns) 6674 6675 sha1c q_s_4s 6676 sha1h s_s 6677 sha1m q_s_4s 6678 sha1p q_s_4s 6679 sha1su0 4s_4s_4s 6680 sha1su1 4s_4s 6681 6682 sha256h2 q_q_4s 6683 sha256h q_q_4s 6684 sha256su0 4s_4s 6685 sha256su1 4s_4s_4s 6686 */ 6687
