1 /* 2 * Copyright (C) 2008 The Android Open Source Project 3 * Copyright (c) 2010-2013, The Linux Foundation. All rights reserved. 4 * 5 * Not a Contribution, Apache license notifications and license are retained 6 * for attribution purposes only. 7 * 8 * Licensed under the Apache License, Version 2.0 (the "License"); 9 * you may not use this file except in compliance with the License. 10 * You may obtain a copy of the License at 11 * 12 * http://www.apache.org/licenses/LICENSE-2.0 13 * 14 * Unless required by applicable law or agreed to in writing, software 15 * distributed under the License is distributed on an "AS IS" BASIS, 16 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 17 * See the License for the specific language governing permissions and 18 * limitations under the License. 19 */ 20 #include <cutils/log.h> 21 #include <sys/resource.h> 22 #include <sys/prctl.h> 23 24 #include <stdint.h> 25 #include <string.h> 26 #include <unistd.h> 27 #include <errno.h> 28 #include <fcntl.h> 29 30 #include <sys/ioctl.h> 31 #include <sys/types.h> 32 #include <sys/mman.h> 33 34 #include <linux/msm_kgsl.h> 35 36 #include <EGL/eglplatform.h> 37 #include <cutils/native_handle.h> 38 #include <cutils/ashmem.h> 39 #include <linux/ashmem.h> 40 #include <gralloc_priv.h> 41 42 #include <copybit.h> 43 #include <alloc_controller.h> 44 #include <memalloc.h> 45 46 #include "c2d2.h" 47 #include "software_converter.h" 48 49 #include <dlfcn.h> 50 51 using gralloc::IMemAlloc; 52 using gralloc::IonController; 53 using gralloc::alloc_data; 54 55 C2D_STATUS (*LINK_c2dCreateSurface)( uint32 *surface_id, 56 uint32 surface_bits, 57 C2D_SURFACE_TYPE surface_type, 58 void *surface_definition ); 59 60 C2D_STATUS (*LINK_c2dUpdateSurface)( uint32 surface_id, 61 uint32 surface_bits, 62 C2D_SURFACE_TYPE surface_type, 63 void *surface_definition ); 64 65 C2D_STATUS (*LINK_c2dReadSurface)( uint32 surface_id, 66 C2D_SURFACE_TYPE surface_type, 67 void *surface_definition, 68 int32 x, int32 y ); 69 70 C2D_STATUS (*LINK_c2dDraw)( uint32 target_id, 71 uint32 target_config, C2D_RECT *target_scissor, 72 uint32 target_mask_id, uint32 target_color_key, 73 C2D_OBJECT *objects_list, uint32 num_objects ); 74 75 C2D_STATUS (*LINK_c2dFinish)( uint32 target_id); 76 77 C2D_STATUS (*LINK_c2dFlush)( uint32 target_id, c2d_ts_handle *timestamp); 78 79 C2D_STATUS (*LINK_c2dWaitTimestamp)( c2d_ts_handle timestamp ); 80 81 C2D_STATUS (*LINK_c2dDestroySurface)( uint32 surface_id ); 82 83 C2D_STATUS (*LINK_c2dMapAddr) ( int mem_fd, void * hostptr, uint32 len, 84 uint32 offset, uint32 flags, void ** gpuaddr); 85 86 C2D_STATUS (*LINK_c2dUnMapAddr) ( void * gpuaddr); 87 88 C2D_STATUS (*LINK_c2dGetDriverCapabilities) ( C2D_DRIVER_INFO * driver_info); 89 90 /* create a fence fd for the timestamp */ 91 C2D_STATUS (*LINK_c2dCreateFenceFD) ( uint32 target_id, c2d_ts_handle timestamp, 92 int32 *fd); 93 94 C2D_STATUS (*LINK_c2dFillSurface) ( uint32 surface_id, uint32 fill_color, 95 C2D_RECT * fill_rect); 96 97 /******************************************************************************/ 98 99 #if defined(COPYBIT_Z180) 100 #define MAX_SCALE_FACTOR (4096) 101 #define MAX_DIMENSION (4096) 102 #else 103 #error "Unsupported HW version" 104 #endif 105 106 // The following defines can be changed as required i.e. as we encounter 107 // complex use cases. 108 #define MAX_RGB_SURFACES 32 // Max. RGB layers currently supported per draw 109 #define MAX_YUV_2_PLANE_SURFACES 4// Max. 2-plane YUV layers currently supported per draw 110 #define MAX_YUV_3_PLANE_SURFACES 1// Max. 3-plane YUV layers currently supported per draw 111 // +1 for the destination surface. We cannot have multiple destination surfaces. 112 #define MAX_SURFACES (MAX_RGB_SURFACES + MAX_YUV_2_PLANE_SURFACES + MAX_YUV_3_PLANE_SURFACES + 1) 113 #define NUM_SURFACE_TYPES 3 // RGB_SURFACE + YUV_SURFACE_2_PLANES + YUV_SURFACE_3_PLANES 114 #define MAX_BLIT_OBJECT_COUNT 50 // Max. blit objects that can be passed per draw 115 116 enum { 117 RGB_SURFACE, 118 YUV_SURFACE_2_PLANES, 119 YUV_SURFACE_3_PLANES 120 }; 121 122 enum eConversionType { 123 CONVERT_TO_ANDROID_FORMAT, 124 CONVERT_TO_C2D_FORMAT 125 }; 126 127 enum eC2DFlags { 128 FLAGS_PREMULTIPLIED_ALPHA = 1<<0, 129 FLAGS_YUV_DESTINATION = 1<<1, 130 FLAGS_TEMP_SRC_DST = 1<<2 131 }; 132 133 static gralloc::IAllocController* sAlloc = 0; 134 /******************************************************************************/ 135 136 /** State information for each device instance */ 137 struct copybit_context_t { 138 struct copybit_device_t device; 139 // Templates for the various source surfaces. These templates are created 140 // to avoid the expensive create/destroy C2D Surfaces 141 C2D_OBJECT_STR blit_rgb_object[MAX_RGB_SURFACES]; 142 C2D_OBJECT_STR blit_yuv_2_plane_object[MAX_YUV_2_PLANE_SURFACES]; 143 C2D_OBJECT_STR blit_yuv_3_plane_object[MAX_YUV_3_PLANE_SURFACES]; 144 C2D_OBJECT_STR blit_list[MAX_BLIT_OBJECT_COUNT]; // Z-ordered list of blit objects 145 C2D_DRIVER_INFO c2d_driver_info; 146 void *libc2d2; 147 alloc_data temp_src_buffer; 148 alloc_data temp_dst_buffer; 149 unsigned int dst[NUM_SURFACE_TYPES]; // dst surfaces 150 unsigned int mapped_gpu_addr[MAX_SURFACES]; // GPU addresses mapped inside copybit 151 int blit_rgb_count; // Total RGB surfaces being blit 152 int blit_yuv_2_plane_count; // Total 2 plane YUV surfaces being 153 int blit_yuv_3_plane_count; // Total 3 plane YUV surfaces being blit 154 int blit_count; // Total blit objects. 155 unsigned int trg_transform; /* target transform */ 156 int fb_width; 157 int fb_height; 158 int src_global_alpha; 159 int config_mask; 160 int dst_surface_type; 161 bool is_premultiplied_alpha; 162 void* time_stamp; 163 bool dst_surface_mapped; // Set when dst surface is mapped to GPU addr 164 void* dst_surface_base; // Stores the dst surface addr 165 166 // used for signaling the wait thread 167 bool wait_timestamp; 168 pthread_t wait_thread_id; 169 bool stop_thread; 170 pthread_mutex_t wait_cleanup_lock; 171 pthread_cond_t wait_cleanup_cond; 172 173 }; 174 175 struct bufferInfo { 176 int width; 177 int height; 178 int format; 179 }; 180 181 struct yuvPlaneInfo { 182 int yStride; //luma stride 183 int plane1_stride; 184 int plane2_stride; 185 int plane1_offset; 186 int plane2_offset; 187 }; 188 189 /** 190 * Common hardware methods 191 */ 192 193 static int open_copybit(const struct hw_module_t* module, const char* name, 194 struct hw_device_t** device); 195 196 static struct hw_module_methods_t copybit_module_methods = { 197 open: open_copybit 198 }; 199 200 /* 201 * The COPYBIT Module 202 */ 203 struct copybit_module_t HAL_MODULE_INFO_SYM = { 204 common: { 205 tag: HARDWARE_MODULE_TAG, 206 version_major: 1, 207 version_minor: 0, 208 id: COPYBIT_HARDWARE_MODULE_ID, 209 name: "QCT COPYBIT C2D 2.0 Module", 210 author: "Qualcomm", 211 methods: ©bit_module_methods 212 } 213 }; 214 215 216 /* thread function which waits on the timeStamp and cleans up the surfaces */ 217 static void* c2d_wait_loop(void* ptr) { 218 copybit_context_t* ctx = (copybit_context_t*)(ptr); 219 char thread_name[64] = "copybitWaitThr"; 220 prctl(PR_SET_NAME, (unsigned long) &thread_name, 0, 0, 0); 221 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY); 222 223 while(ctx->stop_thread == false) { 224 pthread_mutex_lock(&ctx->wait_cleanup_lock); 225 while(ctx->wait_timestamp == false && !ctx->stop_thread) { 226 pthread_cond_wait(&(ctx->wait_cleanup_cond), 227 &(ctx->wait_cleanup_lock)); 228 } 229 if(ctx->wait_timestamp) { 230 if(LINK_c2dWaitTimestamp(ctx->time_stamp)) { 231 ALOGE("%s: LINK_c2dWaitTimeStamp ERROR!!", __FUNCTION__); 232 } 233 ctx->wait_timestamp = false; 234 // Unmap any mapped addresses. 235 for (int i = 0; i < MAX_SURFACES; i++) { 236 if (ctx->mapped_gpu_addr[i]) { 237 LINK_c2dUnMapAddr( (void*)ctx->mapped_gpu_addr[i]); 238 ctx->mapped_gpu_addr[i] = 0; 239 } 240 } 241 // Reset the counts after the draw. 242 ctx->blit_rgb_count = 0; 243 ctx->blit_yuv_2_plane_count = 0; 244 ctx->blit_yuv_3_plane_count = 0; 245 ctx->blit_count = 0; 246 ctx->dst_surface_mapped = false; 247 ctx->dst_surface_base = 0; 248 } 249 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 250 if(ctx->stop_thread) 251 break; 252 } 253 pthread_exit(NULL); 254 return NULL; 255 } 256 257 258 /* convert COPYBIT_FORMAT to C2D format */ 259 static int get_format(int format) { 260 switch (format) { 261 case HAL_PIXEL_FORMAT_RGB_565: return C2D_COLOR_FORMAT_565_RGB; 262 case HAL_PIXEL_FORMAT_RGBX_8888: return C2D_COLOR_FORMAT_8888_ARGB | 263 C2D_FORMAT_SWAP_RB | 264 C2D_FORMAT_DISABLE_ALPHA; 265 case HAL_PIXEL_FORMAT_RGBA_8888: return C2D_COLOR_FORMAT_8888_ARGB | 266 C2D_FORMAT_SWAP_RB; 267 case HAL_PIXEL_FORMAT_BGRA_8888: return C2D_COLOR_FORMAT_8888_ARGB; 268 case HAL_PIXEL_FORMAT_YCbCr_420_SP: return C2D_COLOR_FORMAT_420_NV12; 269 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:return C2D_COLOR_FORMAT_420_NV12; 270 case HAL_PIXEL_FORMAT_YCrCb_420_SP: return C2D_COLOR_FORMAT_420_NV21; 271 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: return C2D_COLOR_FORMAT_420_NV12 | 272 C2D_FORMAT_MACROTILED; 273 default: ALOGE("%s: invalid format (0x%x", 274 __FUNCTION__, format); 275 return -EINVAL; 276 } 277 return -EINVAL; 278 } 279 280 /* Get the C2D formats needed for conversion to YUV */ 281 static int get_c2d_format_for_yuv_destination(int halFormat) { 282 switch (halFormat) { 283 // We do not swap the RB when the target is YUV 284 case HAL_PIXEL_FORMAT_RGBX_8888: return C2D_COLOR_FORMAT_8888_ARGB | 285 C2D_FORMAT_DISABLE_ALPHA; 286 case HAL_PIXEL_FORMAT_RGBA_8888: return C2D_COLOR_FORMAT_8888_ARGB; 287 // The U and V need to be interchanged when the target is YUV 288 case HAL_PIXEL_FORMAT_YCbCr_420_SP: return C2D_COLOR_FORMAT_420_NV21; 289 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:return C2D_COLOR_FORMAT_420_NV21; 290 case HAL_PIXEL_FORMAT_YCrCb_420_SP: return C2D_COLOR_FORMAT_420_NV12; 291 default: return get_format(halFormat); 292 } 293 return -EINVAL; 294 } 295 296 /* ------------------------------------------------------------------- *//*! 297 * \internal 298 * \brief Get the bpp for a particular color format 299 * \param color format 300 * \return bits per pixel 301 *//* ------------------------------------------------------------------- */ 302 int c2diGetBpp(int32 colorformat) 303 { 304 305 int c2dBpp = 0; 306 307 switch(colorformat&0xFF) 308 { 309 case C2D_COLOR_FORMAT_4444_RGBA: 310 case C2D_COLOR_FORMAT_4444_ARGB: 311 case C2D_COLOR_FORMAT_1555_ARGB: 312 case C2D_COLOR_FORMAT_565_RGB: 313 case C2D_COLOR_FORMAT_5551_RGBA: 314 c2dBpp = 16; 315 break; 316 case C2D_COLOR_FORMAT_8888_RGBA: 317 case C2D_COLOR_FORMAT_8888_ARGB: 318 c2dBpp = 32; 319 break; 320 case C2D_COLOR_FORMAT_8_L: 321 case C2D_COLOR_FORMAT_8_A: 322 c2dBpp = 8; 323 break; 324 case C2D_COLOR_FORMAT_4_A: 325 c2dBpp = 4; 326 break; 327 case C2D_COLOR_FORMAT_1: 328 c2dBpp = 1; 329 break; 330 default: 331 ALOGE("%s ERROR", __func__); 332 break; 333 } 334 return c2dBpp; 335 } 336 337 static uint32 c2d_get_gpuaddr(copybit_context_t* ctx, 338 struct private_handle_t *handle, int &mapped_idx) 339 { 340 uint32 memtype, *gpuaddr = 0; 341 C2D_STATUS rc; 342 int freeindex = 0; 343 bool mapaddr = false; 344 345 if(!handle) 346 return 0; 347 348 if (handle->flags & (private_handle_t::PRIV_FLAGS_USES_PMEM | 349 private_handle_t::PRIV_FLAGS_USES_PMEM_ADSP)) 350 memtype = KGSL_USER_MEM_TYPE_PMEM; 351 else if (handle->flags & private_handle_t::PRIV_FLAGS_USES_ASHMEM) 352 memtype = KGSL_USER_MEM_TYPE_ASHMEM; 353 else if (handle->flags & private_handle_t::PRIV_FLAGS_USES_ION) 354 memtype = KGSL_USER_MEM_TYPE_ION; 355 else { 356 ALOGE("Invalid handle flags: 0x%x", handle->flags); 357 return 0; 358 } 359 360 // Check for a freeindex in the mapped_gpu_addr list 361 for (freeindex = 0; freeindex < MAX_SURFACES; freeindex++) { 362 if (ctx->mapped_gpu_addr[freeindex] == 0) { 363 // free index is available 364 // map GPU addr and use this as mapped_idx 365 mapaddr = true; 366 break; 367 } 368 } 369 370 if(mapaddr) { 371 rc = LINK_c2dMapAddr(handle->fd, (void*)handle->base, handle->size, 372 handle->offset, memtype, (void**)&gpuaddr); 373 374 if (rc == C2D_STATUS_OK) { 375 // We have mapped the GPU address inside copybit. We need to unmap 376 // this address after the blit. Store this address 377 ctx->mapped_gpu_addr[freeindex] = (uint32) gpuaddr; 378 mapped_idx = freeindex; 379 } 380 } 381 return (uint32) gpuaddr; 382 } 383 384 static void unmap_gpuaddr(copybit_context_t* ctx, int mapped_idx) 385 { 386 if (!ctx || (mapped_idx == -1)) 387 return; 388 389 if (ctx->mapped_gpu_addr[mapped_idx]) { 390 LINK_c2dUnMapAddr( (void*)ctx->mapped_gpu_addr[mapped_idx]); 391 ctx->mapped_gpu_addr[mapped_idx] = 0; 392 } 393 } 394 395 static int is_supported_rgb_format(int format) 396 { 397 switch(format) { 398 case HAL_PIXEL_FORMAT_RGBA_8888: 399 case HAL_PIXEL_FORMAT_RGBX_8888: 400 case HAL_PIXEL_FORMAT_RGB_565: 401 case HAL_PIXEL_FORMAT_BGRA_8888: { 402 return COPYBIT_SUCCESS; 403 } 404 default: 405 return COPYBIT_FAILURE; 406 } 407 } 408 409 static int get_num_planes(int format) 410 { 411 switch(format) { 412 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 413 case HAL_PIXEL_FORMAT_YCrCb_420_SP: 414 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 415 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: { 416 return 2; 417 } 418 case HAL_PIXEL_FORMAT_YV12: { 419 return 3; 420 } 421 default: 422 return COPYBIT_FAILURE; 423 } 424 } 425 426 static int is_supported_yuv_format(int format) 427 { 428 switch(format) { 429 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 430 case HAL_PIXEL_FORMAT_YCrCb_420_SP: 431 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 432 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: { 433 return COPYBIT_SUCCESS; 434 } 435 default: 436 return COPYBIT_FAILURE; 437 } 438 } 439 440 static int is_valid_destination_format(int format) 441 { 442 if (format == HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED) { 443 // C2D does not support NV12Tile as a destination format. 444 return COPYBIT_FAILURE; 445 } 446 return COPYBIT_SUCCESS; 447 } 448 449 static int calculate_yuv_offset_and_stride(const bufferInfo& info, 450 yuvPlaneInfo& yuvInfo) 451 { 452 int width = info.width; 453 int height = info.height; 454 int format = info.format; 455 456 int aligned_height = 0; 457 int aligned_width = 0, size = 0; 458 459 switch (format) { 460 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: { 461 /* NV12 Tile buffers have their luma height aligned to 32bytes and width 462 * aligned to 128 bytes. The chroma offset starts at an 8K boundary 463 */ 464 aligned_height = ALIGN(height, 32); 465 aligned_width = ALIGN(width, 128); 466 size = aligned_width * aligned_height; 467 yuvInfo.plane1_offset = ALIGN(size,8192); 468 yuvInfo.yStride = aligned_width; 469 yuvInfo.plane1_stride = aligned_width; 470 break; 471 } 472 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 473 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 474 case HAL_PIXEL_FORMAT_YCrCb_420_SP: { 475 aligned_width = ALIGN(width, 32); 476 yuvInfo.yStride = aligned_width; 477 yuvInfo.plane1_stride = aligned_width; 478 if (HAL_PIXEL_FORMAT_NV12_ENCODEABLE == format) { 479 // The encoder requires a 2K aligned chroma offset 480 yuvInfo.plane1_offset = ALIGN(aligned_width * height, 2048); 481 } else 482 yuvInfo.plane1_offset = aligned_width * height; 483 484 break; 485 } 486 default: { 487 return COPYBIT_FAILURE; 488 } 489 } 490 return COPYBIT_SUCCESS; 491 } 492 493 /** create C2D surface from copybit image */ 494 static int set_image(copybit_context_t* ctx, uint32 surfaceId, 495 const struct copybit_image_t *rhs, 496 const eC2DFlags flags, int &mapped_idx) 497 { 498 struct private_handle_t* handle = (struct private_handle_t*)rhs->handle; 499 C2D_SURFACE_TYPE surfaceType; 500 int status = COPYBIT_SUCCESS; 501 uint32 gpuaddr = 0; 502 int c2d_format; 503 mapped_idx = -1; 504 505 if (flags & FLAGS_YUV_DESTINATION) { 506 c2d_format = get_c2d_format_for_yuv_destination(rhs->format); 507 } else { 508 c2d_format = get_format(rhs->format); 509 } 510 511 if(c2d_format == -EINVAL) { 512 ALOGE("%s: invalid format", __FUNCTION__); 513 return -EINVAL; 514 } 515 516 if(handle == NULL) { 517 ALOGE("%s: invalid handle", __func__); 518 return -EINVAL; 519 } 520 521 if (handle->gpuaddr == 0) { 522 gpuaddr = c2d_get_gpuaddr(ctx, handle, mapped_idx); 523 if(!gpuaddr) { 524 ALOGE("%s: c2d_get_gpuaddr failed", __FUNCTION__); 525 return COPYBIT_FAILURE; 526 } 527 } else { 528 gpuaddr = handle->gpuaddr; 529 } 530 531 /* create C2D surface */ 532 if(is_supported_rgb_format(rhs->format) == COPYBIT_SUCCESS) { 533 /* RGB */ 534 C2D_RGB_SURFACE_DEF surfaceDef; 535 536 surfaceType = (C2D_SURFACE_TYPE) (C2D_SURFACE_RGB_HOST | C2D_SURFACE_WITH_PHYS); 537 538 surfaceDef.phys = (void*) gpuaddr; 539 surfaceDef.buffer = (void*) (handle->base); 540 541 surfaceDef.format = c2d_format | 542 ((flags & FLAGS_PREMULTIPLIED_ALPHA) ? C2D_FORMAT_PREMULTIPLIED : 0); 543 surfaceDef.width = rhs->w; 544 surfaceDef.height = rhs->h; 545 int aligned_width = ALIGN(surfaceDef.width,32); 546 surfaceDef.stride = (aligned_width * c2diGetBpp(surfaceDef.format))>>3; 547 548 if(LINK_c2dUpdateSurface( surfaceId,C2D_TARGET | C2D_SOURCE, surfaceType, 549 &surfaceDef)) { 550 ALOGE("%s: RGB Surface c2dUpdateSurface ERROR", __FUNCTION__); 551 unmap_gpuaddr(ctx, mapped_idx); 552 status = COPYBIT_FAILURE; 553 } 554 } else if (is_supported_yuv_format(rhs->format) == COPYBIT_SUCCESS) { 555 C2D_YUV_SURFACE_DEF surfaceDef; 556 memset(&surfaceDef, 0, sizeof(surfaceDef)); 557 surfaceType = (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | C2D_SURFACE_WITH_PHYS); 558 surfaceDef.format = c2d_format; 559 560 bufferInfo info; 561 info.width = rhs->w; 562 info.height = rhs->h; 563 info.format = rhs->format; 564 565 yuvPlaneInfo yuvInfo = {0}; 566 status = calculate_yuv_offset_and_stride(info, yuvInfo); 567 if(status != COPYBIT_SUCCESS) { 568 ALOGE("%s: calculate_yuv_offset_and_stride error", __FUNCTION__); 569 unmap_gpuaddr(ctx, mapped_idx); 570 } 571 572 surfaceDef.width = rhs->w; 573 surfaceDef.height = rhs->h; 574 surfaceDef.plane0 = (void*) (handle->base); 575 surfaceDef.phys0 = (void*) (gpuaddr); 576 surfaceDef.stride0 = yuvInfo.yStride; 577 578 surfaceDef.plane1 = (void*) (handle->base + yuvInfo.plane1_offset); 579 surfaceDef.phys1 = (void*) (gpuaddr + yuvInfo.plane1_offset); 580 surfaceDef.stride1 = yuvInfo.plane1_stride; 581 if (3 == get_num_planes(rhs->format)) { 582 surfaceDef.plane2 = (void*) (handle->base + yuvInfo.plane2_offset); 583 surfaceDef.phys2 = (void*) (gpuaddr + yuvInfo.plane2_offset); 584 surfaceDef.stride2 = yuvInfo.plane2_stride; 585 } 586 587 if(LINK_c2dUpdateSurface( surfaceId,C2D_TARGET | C2D_SOURCE, surfaceType, 588 &surfaceDef)) { 589 ALOGE("%s: YUV Surface c2dUpdateSurface ERROR", __FUNCTION__); 590 unmap_gpuaddr(ctx, mapped_idx); 591 status = COPYBIT_FAILURE; 592 } 593 } else { 594 ALOGE("%s: invalid format 0x%x", __FUNCTION__, rhs->format); 595 unmap_gpuaddr(ctx, mapped_idx); 596 status = COPYBIT_FAILURE; 597 } 598 599 return status; 600 } 601 602 /** copy the bits */ 603 static int msm_copybit(struct copybit_context_t *ctx, unsigned int target) 604 { 605 if (ctx->blit_count == 0) { 606 return COPYBIT_SUCCESS; 607 } 608 609 for (int i = 0; i < ctx->blit_count; i++) 610 { 611 ctx->blit_list[i].next = &(ctx->blit_list[i+1]); 612 } 613 ctx->blit_list[ctx->blit_count-1].next = NULL; 614 uint32_t target_transform = ctx->trg_transform; 615 if (ctx->c2d_driver_info.capabilities_mask & 616 C2D_DRIVER_SUPPORTS_OVERRIDE_TARGET_ROTATE_OP) { 617 // For A3xx - set 0x0 as the transform is set in the config_mask 618 target_transform = 0x0; 619 } 620 if(LINK_c2dDraw(target, target_transform, 0x0, 0, 0, ctx->blit_list, 621 ctx->blit_count)) { 622 ALOGE("%s: LINK_c2dDraw ERROR", __FUNCTION__); 623 return COPYBIT_FAILURE; 624 } 625 return COPYBIT_SUCCESS; 626 } 627 628 629 630 static int flush_get_fence_copybit (struct copybit_device_t *dev, int* fd) 631 { 632 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 633 int status = COPYBIT_FAILURE; 634 if (!ctx) 635 return COPYBIT_FAILURE; 636 pthread_mutex_lock(&ctx->wait_cleanup_lock); 637 status = msm_copybit(ctx, ctx->dst[ctx->dst_surface_type]); 638 639 if(LINK_c2dFlush(ctx->dst[ctx->dst_surface_type], &ctx->time_stamp)) { 640 ALOGE("%s: LINK_c2dFlush ERROR", __FUNCTION__); 641 // unlock the mutex and return failure 642 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 643 return COPYBIT_FAILURE; 644 } 645 if(LINK_c2dCreateFenceFD(ctx->dst[ctx->dst_surface_type], ctx->time_stamp, 646 fd)) { 647 ALOGE("%s: LINK_c2dCreateFenceFD ERROR", __FUNCTION__); 648 status = COPYBIT_FAILURE; 649 } 650 if(status == COPYBIT_SUCCESS) { 651 //signal the wait_thread 652 ctx->wait_timestamp = true; 653 pthread_cond_signal(&ctx->wait_cleanup_cond); 654 } 655 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 656 return status; 657 } 658 659 static int finish_copybit(struct copybit_device_t *dev) 660 { 661 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 662 if (!ctx) 663 return COPYBIT_FAILURE; 664 665 int status = msm_copybit(ctx, ctx->dst[ctx->dst_surface_type]); 666 667 if(LINK_c2dFinish(ctx->dst[ctx->dst_surface_type])) { 668 ALOGE("%s: LINK_c2dFinish ERROR", __FUNCTION__); 669 return COPYBIT_FAILURE; 670 } 671 672 // Unmap any mapped addresses. 673 for (int i = 0; i < MAX_SURFACES; i++) { 674 if (ctx->mapped_gpu_addr[i]) { 675 LINK_c2dUnMapAddr( (void*)ctx->mapped_gpu_addr[i]); 676 ctx->mapped_gpu_addr[i] = 0; 677 } 678 } 679 680 // Reset the counts after the draw. 681 ctx->blit_rgb_count = 0; 682 ctx->blit_yuv_2_plane_count = 0; 683 ctx->blit_yuv_3_plane_count = 0; 684 ctx->blit_count = 0; 685 ctx->dst_surface_mapped = false; 686 ctx->dst_surface_base = 0; 687 688 return status; 689 } 690 691 static int clear_copybit(struct copybit_device_t *dev, 692 struct copybit_image_t const *buf, 693 struct copybit_rect_t *rect) 694 { 695 int ret = COPYBIT_SUCCESS; 696 int flags = FLAGS_PREMULTIPLIED_ALPHA; 697 int mapped_dst_idx = -1; 698 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 699 C2D_RECT c2drect = {rect->l, rect->t, rect->r - rect->l, rect->b - rect->t}; 700 pthread_mutex_lock(&ctx->wait_cleanup_lock); 701 if(!ctx->dst_surface_mapped) { 702 ret = set_image(ctx, ctx->dst[RGB_SURFACE], buf, 703 (eC2DFlags)flags, mapped_dst_idx); 704 if(ret) { 705 ALOGE("%s: set_image error", __FUNCTION__); 706 unmap_gpuaddr(ctx, mapped_dst_idx); 707 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 708 return COPYBIT_FAILURE; 709 } 710 //clear_copybit is the first call made by HWC for each composition 711 //with the dest surface, hence set dst_surface_mapped. 712 ctx->dst_surface_mapped = true; 713 ctx->dst_surface_base = buf->base; 714 ret = LINK_c2dFillSurface(ctx->dst[RGB_SURFACE], 0x0, &c2drect); 715 } 716 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 717 return ret; 718 } 719 720 721 /** setup rectangles */ 722 static void set_rects(struct copybit_context_t *ctx, 723 C2D_OBJECT *c2dObject, 724 const struct copybit_rect_t *dst, 725 const struct copybit_rect_t *src, 726 const struct copybit_rect_t *scissor) 727 { 728 // Set the target rect. 729 if((ctx->trg_transform & C2D_TARGET_ROTATE_90) && 730 (ctx->trg_transform & C2D_TARGET_ROTATE_180)) { 731 /* target rotation is 270 */ 732 c2dObject->target_rect.x = (dst->t)<<16; 733 c2dObject->target_rect.y = ctx->fb_width?(ALIGN(ctx->fb_width,32)- dst->r):dst->r; 734 c2dObject->target_rect.y = c2dObject->target_rect.y<<16; 735 c2dObject->target_rect.height = ((dst->r) - (dst->l))<<16; 736 c2dObject->target_rect.width = ((dst->b) - (dst->t))<<16; 737 } else if(ctx->trg_transform & C2D_TARGET_ROTATE_90) { 738 c2dObject->target_rect.x = ctx->fb_height?(ctx->fb_height - dst->b):dst->b; 739 c2dObject->target_rect.x = c2dObject->target_rect.x<<16; 740 c2dObject->target_rect.y = (dst->l)<<16; 741 c2dObject->target_rect.height = ((dst->r) - (dst->l))<<16; 742 c2dObject->target_rect.width = ((dst->b) - (dst->t))<<16; 743 } else if(ctx->trg_transform & C2D_TARGET_ROTATE_180) { 744 c2dObject->target_rect.y = ctx->fb_height?(ctx->fb_height - dst->b):dst->b; 745 c2dObject->target_rect.y = c2dObject->target_rect.y<<16; 746 c2dObject->target_rect.x = ctx->fb_width?(ALIGN(ctx->fb_width,32) - dst->r):dst->r; 747 c2dObject->target_rect.x = c2dObject->target_rect.x<<16; 748 c2dObject->target_rect.height = ((dst->b) - (dst->t))<<16; 749 c2dObject->target_rect.width = ((dst->r) - (dst->l))<<16; 750 } else { 751 c2dObject->target_rect.x = (dst->l)<<16; 752 c2dObject->target_rect.y = (dst->t)<<16; 753 c2dObject->target_rect.height = ((dst->b) - (dst->t))<<16; 754 c2dObject->target_rect.width = ((dst->r) - (dst->l))<<16; 755 } 756 c2dObject->config_mask |= C2D_TARGET_RECT_BIT; 757 758 // Set the source rect 759 c2dObject->source_rect.x = (src->l)<<16; 760 c2dObject->source_rect.y = (src->t)<<16; 761 c2dObject->source_rect.height = ((src->b) - (src->t))<<16; 762 c2dObject->source_rect.width = ((src->r) - (src->l))<<16; 763 c2dObject->config_mask |= C2D_SOURCE_RECT_BIT; 764 765 // Set the scissor rect 766 c2dObject->scissor_rect.x = scissor->l; 767 c2dObject->scissor_rect.y = scissor->t; 768 c2dObject->scissor_rect.height = (scissor->b) - (scissor->t); 769 c2dObject->scissor_rect.width = (scissor->r) - (scissor->l); 770 c2dObject->config_mask |= C2D_SCISSOR_RECT_BIT; 771 } 772 773 /*****************************************************************************/ 774 775 /** Set a parameter to value */ 776 static int set_parameter_copybit( 777 struct copybit_device_t *dev, 778 int name, 779 int value) 780 { 781 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 782 int status = COPYBIT_SUCCESS; 783 if (!ctx) { 784 ALOGE("%s: null context", __FUNCTION__); 785 return -EINVAL; 786 } 787 788 pthread_mutex_lock(&ctx->wait_cleanup_lock); 789 switch(name) { 790 case COPYBIT_PLANE_ALPHA: 791 { 792 if (value < 0) value = 0; 793 if (value >= 256) value = 255; 794 795 ctx->src_global_alpha = value; 796 if (value < 255) 797 ctx->config_mask |= C2D_GLOBAL_ALPHA_BIT; 798 else 799 ctx->config_mask &= ~C2D_GLOBAL_ALPHA_BIT; 800 } 801 break; 802 case COPYBIT_BLEND_MODE: 803 { 804 if (value == COPYBIT_BLENDING_NONE) { 805 ctx->config_mask |= C2D_ALPHA_BLEND_NONE; 806 ctx->is_premultiplied_alpha = true; 807 } else if (value == COPYBIT_BLENDING_PREMULT) { 808 ctx->is_premultiplied_alpha = true; 809 } else { 810 ctx->config_mask &= ~C2D_ALPHA_BLEND_NONE; 811 } 812 } 813 break; 814 case COPYBIT_TRANSFORM: 815 { 816 unsigned int transform = 0; 817 uint32 config_mask = 0; 818 config_mask |= C2D_OVERRIDE_GLOBAL_TARGET_ROTATE_CONFIG; 819 if((value & 0x7) == COPYBIT_TRANSFORM_ROT_180) { 820 transform = C2D_TARGET_ROTATE_180; 821 config_mask |= C2D_OVERRIDE_TARGET_ROTATE_180; 822 } else if((value & 0x7) == COPYBIT_TRANSFORM_ROT_270) { 823 transform = C2D_TARGET_ROTATE_90; 824 config_mask |= C2D_OVERRIDE_TARGET_ROTATE_90; 825 } else if(value == COPYBIT_TRANSFORM_ROT_90) { 826 transform = C2D_TARGET_ROTATE_270; 827 config_mask |= C2D_OVERRIDE_TARGET_ROTATE_270; 828 } else { 829 config_mask |= C2D_OVERRIDE_TARGET_ROTATE_0; 830 if(value & COPYBIT_TRANSFORM_FLIP_H) { 831 config_mask |= C2D_MIRROR_H_BIT; 832 } else if(value & COPYBIT_TRANSFORM_FLIP_V) { 833 config_mask |= C2D_MIRROR_V_BIT; 834 } 835 } 836 837 if (ctx->c2d_driver_info.capabilities_mask & 838 C2D_DRIVER_SUPPORTS_OVERRIDE_TARGET_ROTATE_OP) { 839 ctx->config_mask |= config_mask; 840 } else { 841 // The transform for this surface does not match the current 842 // target transform. Draw all previous surfaces. This will be 843 // changed once we have a new mechanism to send different 844 // target rotations to c2d. 845 finish_copybit(dev); 846 } 847 ctx->trg_transform = transform; 848 } 849 break; 850 case COPYBIT_FRAMEBUFFER_WIDTH: 851 ctx->fb_width = value; 852 break; 853 case COPYBIT_FRAMEBUFFER_HEIGHT: 854 ctx->fb_height = value; 855 break; 856 case COPYBIT_ROTATION_DEG: 857 case COPYBIT_DITHER: 858 case COPYBIT_BLUR: 859 case COPYBIT_BLIT_TO_FRAMEBUFFER: 860 // Do nothing 861 break; 862 default: 863 ALOGE("%s: default case param=0x%x", __FUNCTION__, name); 864 status = -EINVAL; 865 break; 866 } 867 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 868 return status; 869 } 870 871 /** Get a static info value */ 872 static int get(struct copybit_device_t *dev, int name) 873 { 874 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 875 int value; 876 877 if (!ctx) { 878 ALOGE("%s: null context error", __FUNCTION__); 879 return -EINVAL; 880 } 881 882 switch(name) { 883 case COPYBIT_MINIFICATION_LIMIT: 884 value = MAX_SCALE_FACTOR; 885 break; 886 case COPYBIT_MAGNIFICATION_LIMIT: 887 value = MAX_SCALE_FACTOR; 888 break; 889 case COPYBIT_SCALING_FRAC_BITS: 890 value = 32; 891 break; 892 case COPYBIT_ROTATION_STEP_DEG: 893 value = 1; 894 break; 895 default: 896 ALOGE("%s: default case param=0x%x", __FUNCTION__, name); 897 value = -EINVAL; 898 } 899 return value; 900 } 901 902 static int is_alpha(int cformat) 903 { 904 int alpha = 0; 905 switch (cformat & 0xFF) { 906 case C2D_COLOR_FORMAT_8888_ARGB: 907 case C2D_COLOR_FORMAT_8888_RGBA: 908 case C2D_COLOR_FORMAT_5551_RGBA: 909 case C2D_COLOR_FORMAT_4444_ARGB: 910 alpha = 1; 911 break; 912 default: 913 alpha = 0; 914 break; 915 } 916 917 if(alpha && (cformat&C2D_FORMAT_DISABLE_ALPHA)) 918 alpha = 0; 919 920 return alpha; 921 } 922 923 /* Function to check if we need a temporary buffer for the blit. 924 * This would happen if the requested destination stride and the 925 * C2D stride do not match. We ignore RGB buffers, since their 926 * stride is always aligned to 32. 927 */ 928 static bool need_temp_buffer(struct copybit_image_t const *img) 929 { 930 if (COPYBIT_SUCCESS == is_supported_rgb_format(img->format)) 931 return false; 932 933 struct private_handle_t* handle = (struct private_handle_t*)img->handle; 934 935 // The width parameter in the handle contains the aligned_w. We check if we 936 // need to convert based on this param. YUV formats have bpp=1, so checking 937 // if the requested stride is aligned should suffice. 938 if (0 == (handle->width)%32) { 939 return false; 940 } 941 942 return true; 943 } 944 945 /* Function to extract the information from the copybit image and set the corresponding 946 * values in the bufferInfo struct. 947 */ 948 static void populate_buffer_info(struct copybit_image_t const *img, bufferInfo& info) 949 { 950 info.width = img->w; 951 info.height = img->h; 952 info.format = img->format; 953 } 954 955 /* Function to get the required size for a particular format, inorder for C2D to perform 956 * the blit operation. 957 */ 958 static size_t get_size(const bufferInfo& info) 959 { 960 size_t size = 0; 961 int w = info.width; 962 int h = info.height; 963 int aligned_w = ALIGN(w, 32); 964 switch(info.format) { 965 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 966 { 967 // Chroma for this format is aligned to 2K. 968 size = ALIGN((aligned_w*h), 2048) + 969 ALIGN(aligned_w/2, 32) * (h/2) *2; 970 size = ALIGN(size, 4096); 971 } break; 972 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 973 case HAL_PIXEL_FORMAT_YCrCb_420_SP: 974 { 975 size = aligned_w * h + 976 ALIGN(aligned_w/2, 32) * (h/2) * 2; 977 size = ALIGN(size, 4096); 978 } break; 979 default: break; 980 } 981 return size; 982 } 983 984 /* Function to allocate memory for the temporary buffer. This memory is 985 * allocated from Ashmem. It is the caller's responsibility to free this 986 * memory. 987 */ 988 static int get_temp_buffer(const bufferInfo& info, alloc_data& data) 989 { 990 ALOGD("%s E", __FUNCTION__); 991 // Alloc memory from system heap 992 data.base = 0; 993 data.fd = -1; 994 data.offset = 0; 995 data.size = get_size(info); 996 data.align = getpagesize(); 997 data.uncached = true; 998 int allocFlags = GRALLOC_USAGE_PRIVATE_SYSTEM_HEAP; 999 1000 if (sAlloc == 0) { 1001 sAlloc = gralloc::IAllocController::getInstance(); 1002 } 1003 1004 if (sAlloc == 0) { 1005 ALOGE("%s: sAlloc is still NULL", __FUNCTION__); 1006 return COPYBIT_FAILURE; 1007 } 1008 1009 int err = sAlloc->allocate(data, allocFlags); 1010 if (0 != err) { 1011 ALOGE("%s: allocate failed", __FUNCTION__); 1012 return COPYBIT_FAILURE; 1013 } 1014 1015 ALOGD("%s X", __FUNCTION__); 1016 return err; 1017 } 1018 1019 /* Function to free the temporary allocated memory.*/ 1020 static void free_temp_buffer(alloc_data &data) 1021 { 1022 if (-1 != data.fd) { 1023 IMemAlloc* memalloc = sAlloc->getAllocator(data.allocType); 1024 memalloc->free_buffer(data.base, data.size, 0, data.fd); 1025 } 1026 } 1027 1028 /* Function to perform the software color conversion. Convert the 1029 * C2D compatible format to the Android compatible format 1030 */ 1031 static int copy_image(private_handle_t *src_handle, 1032 struct copybit_image_t const *rhs, 1033 eConversionType conversionType) 1034 { 1035 if (src_handle->fd == -1) { 1036 ALOGE("%s: src_handle fd is invalid", __FUNCTION__); 1037 return COPYBIT_FAILURE; 1038 } 1039 1040 // Copy the info. 1041 int ret = COPYBIT_SUCCESS; 1042 switch(rhs->format) { 1043 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 1044 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 1045 case HAL_PIXEL_FORMAT_YCrCb_420_SP: 1046 { 1047 if (CONVERT_TO_ANDROID_FORMAT == conversionType) { 1048 return convert_yuv_c2d_to_yuv_android(src_handle, rhs); 1049 } else { 1050 return convert_yuv_android_to_yuv_c2d(src_handle, rhs); 1051 } 1052 1053 } break; 1054 default: { 1055 ALOGE("%s: invalid format 0x%x", __FUNCTION__, rhs->format); 1056 ret = COPYBIT_FAILURE; 1057 } break; 1058 } 1059 return ret; 1060 } 1061 1062 static void delete_handle(private_handle_t *handle) 1063 { 1064 if (handle) { 1065 delete handle; 1066 handle = 0; 1067 } 1068 } 1069 1070 static bool need_to_execute_draw(struct copybit_context_t* ctx, 1071 eC2DFlags flags) 1072 { 1073 if (flags & FLAGS_TEMP_SRC_DST) { 1074 return true; 1075 } 1076 if (flags & FLAGS_YUV_DESTINATION) { 1077 return true; 1078 } 1079 return false; 1080 } 1081 1082 /** do a stretch blit type operation */ 1083 static int stretch_copybit_internal( 1084 struct copybit_device_t *dev, 1085 struct copybit_image_t const *dst, 1086 struct copybit_image_t const *src, 1087 struct copybit_rect_t const *dst_rect, 1088 struct copybit_rect_t const *src_rect, 1089 struct copybit_region_t const *region, 1090 bool enableBlend) 1091 { 1092 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 1093 int status = COPYBIT_SUCCESS; 1094 int flags = 0; 1095 int src_surface_type; 1096 int mapped_src_idx = -1, mapped_dst_idx = -1; 1097 C2D_OBJECT_STR src_surface; 1098 1099 if (!ctx) { 1100 ALOGE("%s: null context error", __FUNCTION__); 1101 return -EINVAL; 1102 } 1103 1104 if (src->w > MAX_DIMENSION || src->h > MAX_DIMENSION) { 1105 ALOGE("%s: src dimension error", __FUNCTION__); 1106 return -EINVAL; 1107 } 1108 1109 if (dst->w > MAX_DIMENSION || dst->h > MAX_DIMENSION) { 1110 ALOGE("%s : dst dimension error dst w %d h %d", __FUNCTION__, dst->w, 1111 dst->h); 1112 return -EINVAL; 1113 } 1114 1115 if (is_valid_destination_format(dst->format) == COPYBIT_FAILURE) { 1116 ALOGE("%s: Invalid destination format format = 0x%x", __FUNCTION__, 1117 dst->format); 1118 return COPYBIT_FAILURE; 1119 } 1120 1121 int dst_surface_type; 1122 if (is_supported_rgb_format(dst->format) == COPYBIT_SUCCESS) { 1123 dst_surface_type = RGB_SURFACE; 1124 flags |= FLAGS_PREMULTIPLIED_ALPHA; 1125 } else if (is_supported_yuv_format(dst->format) == COPYBIT_SUCCESS) { 1126 int num_planes = get_num_planes(dst->format); 1127 flags |= FLAGS_YUV_DESTINATION; 1128 if (num_planes == 2) { 1129 dst_surface_type = YUV_SURFACE_2_PLANES; 1130 } else if (num_planes == 3) { 1131 dst_surface_type = YUV_SURFACE_3_PLANES; 1132 } else { 1133 ALOGE("%s: dst number of YUV planes is invalid dst format = 0x%x", 1134 __FUNCTION__, dst->format); 1135 return COPYBIT_FAILURE; 1136 } 1137 } else { 1138 ALOGE("%s: Invalid dst surface format 0x%x", __FUNCTION__, 1139 dst->format); 1140 return COPYBIT_FAILURE; 1141 } 1142 1143 if (ctx->blit_rgb_count == MAX_RGB_SURFACES || 1144 ctx->blit_yuv_2_plane_count == MAX_YUV_2_PLANE_SURFACES || 1145 ctx->blit_yuv_3_plane_count == MAX_YUV_2_PLANE_SURFACES || 1146 ctx->blit_count == MAX_BLIT_OBJECT_COUNT || 1147 ctx->dst_surface_type != dst_surface_type) { 1148 // we have reached the max. limits of our internal structures or 1149 // changed the target. 1150 // Draw the remaining surfaces. We need to do the finish here since 1151 // we need to free up the surface templates. 1152 finish_copybit(dev); 1153 } 1154 1155 ctx->dst_surface_type = dst_surface_type; 1156 1157 // Update the destination 1158 copybit_image_t dst_image; 1159 dst_image.w = dst->w; 1160 dst_image.h = dst->h; 1161 dst_image.format = dst->format; 1162 dst_image.handle = dst->handle; 1163 // Check if we need a temp. copy for the destination. We'd need this the destination 1164 // width is not aligned to 32. This case occurs for YUV formats. RGB formats are 1165 // aligned to 32. 1166 bool need_temp_dst = need_temp_buffer(dst); 1167 bufferInfo dst_info; 1168 populate_buffer_info(dst, dst_info); 1169 private_handle_t* dst_hnd = new private_handle_t(-1, 0, 0, 0, dst_info.format, 1170 dst_info.width, dst_info.height); 1171 if (dst_hnd == NULL) { 1172 ALOGE("%s: dst_hnd is null", __FUNCTION__); 1173 return COPYBIT_FAILURE; 1174 } 1175 if (need_temp_dst) { 1176 if (get_size(dst_info) != ctx->temp_dst_buffer.size) { 1177 free_temp_buffer(ctx->temp_dst_buffer); 1178 // Create a temp buffer and set that as the destination. 1179 if (COPYBIT_FAILURE == get_temp_buffer(dst_info, ctx->temp_dst_buffer)) { 1180 ALOGE("%s: get_temp_buffer(dst) failed", __FUNCTION__); 1181 delete_handle(dst_hnd); 1182 return COPYBIT_FAILURE; 1183 } 1184 } 1185 dst_hnd->fd = ctx->temp_dst_buffer.fd; 1186 dst_hnd->size = ctx->temp_dst_buffer.size; 1187 dst_hnd->flags = ctx->temp_dst_buffer.allocType; 1188 dst_hnd->base = (int)(ctx->temp_dst_buffer.base); 1189 dst_hnd->offset = ctx->temp_dst_buffer.offset; 1190 dst_hnd->gpuaddr = 0; 1191 dst_image.handle = dst_hnd; 1192 } 1193 if(!ctx->dst_surface_mapped) { 1194 //map the destination surface to GPU address 1195 status = set_image(ctx, ctx->dst[ctx->dst_surface_type], &dst_image, 1196 (eC2DFlags)flags, mapped_dst_idx); 1197 if(status) { 1198 ALOGE("%s: dst: set_image error", __FUNCTION__); 1199 delete_handle(dst_hnd); 1200 unmap_gpuaddr(ctx, mapped_dst_idx); 1201 return COPYBIT_FAILURE; 1202 } 1203 ctx->dst_surface_mapped = true; 1204 ctx->dst_surface_base = dst->base; 1205 } else if(ctx->dst_surface_mapped && ctx->dst_surface_base != dst->base) { 1206 // Destination surface for the operation should be same for multiple 1207 // requests, this check is catch if there is any case when the 1208 // destination changes 1209 ALOGE("%s: a different destination surface!!", __FUNCTION__); 1210 } 1211 1212 // Update the source 1213 flags = 0; 1214 if(is_supported_rgb_format(src->format) == COPYBIT_SUCCESS) { 1215 src_surface_type = RGB_SURFACE; 1216 src_surface = ctx->blit_rgb_object[ctx->blit_rgb_count]; 1217 } else if (is_supported_yuv_format(src->format) == COPYBIT_SUCCESS) { 1218 int num_planes = get_num_planes(src->format); 1219 if (num_planes == 2) { 1220 src_surface_type = YUV_SURFACE_2_PLANES; 1221 src_surface = ctx->blit_yuv_2_plane_object[ctx->blit_yuv_2_plane_count]; 1222 } else if (num_planes == 3) { 1223 src_surface_type = YUV_SURFACE_3_PLANES; 1224 src_surface = ctx->blit_yuv_3_plane_object[ctx->blit_yuv_2_plane_count]; 1225 } else { 1226 ALOGE("%s: src number of YUV planes is invalid src format = 0x%x", 1227 __FUNCTION__, src->format); 1228 delete_handle(dst_hnd); 1229 unmap_gpuaddr(ctx, mapped_dst_idx); 1230 return -EINVAL; 1231 } 1232 } else { 1233 ALOGE("%s: Invalid source surface format 0x%x", __FUNCTION__, 1234 src->format); 1235 delete_handle(dst_hnd); 1236 unmap_gpuaddr(ctx, mapped_dst_idx); 1237 return -EINVAL; 1238 } 1239 1240 copybit_image_t src_image; 1241 src_image.w = src->w; 1242 src_image.h = src->h; 1243 src_image.format = src->format; 1244 src_image.handle = src->handle; 1245 1246 bool need_temp_src = need_temp_buffer(src); 1247 bufferInfo src_info; 1248 populate_buffer_info(src, src_info); 1249 private_handle_t* src_hnd = new private_handle_t(-1, 0, 0, 0, src_info.format, 1250 src_info.width, src_info.height); 1251 if (NULL == src_hnd) { 1252 ALOGE("%s: src_hnd is null", __FUNCTION__); 1253 delete_handle(dst_hnd); 1254 unmap_gpuaddr(ctx, mapped_dst_idx); 1255 return COPYBIT_FAILURE; 1256 } 1257 if (need_temp_src) { 1258 if (get_size(src_info) != ctx->temp_src_buffer.size) { 1259 free_temp_buffer(ctx->temp_src_buffer); 1260 // Create a temp buffer and set that as the destination. 1261 if (COPYBIT_SUCCESS != get_temp_buffer(src_info, 1262 ctx->temp_src_buffer)) { 1263 ALOGE("%s: get_temp_buffer(src) failed", __FUNCTION__); 1264 delete_handle(dst_hnd); 1265 delete_handle(src_hnd); 1266 unmap_gpuaddr(ctx, mapped_dst_idx); 1267 return COPYBIT_FAILURE; 1268 } 1269 } 1270 src_hnd->fd = ctx->temp_src_buffer.fd; 1271 src_hnd->size = ctx->temp_src_buffer.size; 1272 src_hnd->flags = ctx->temp_src_buffer.allocType; 1273 src_hnd->base = (int)(ctx->temp_src_buffer.base); 1274 src_hnd->offset = ctx->temp_src_buffer.offset; 1275 src_hnd->gpuaddr = 0; 1276 src_image.handle = src_hnd; 1277 1278 // Copy the source. 1279 status = copy_image((private_handle_t *)src->handle, &src_image, 1280 CONVERT_TO_C2D_FORMAT); 1281 if (status == COPYBIT_FAILURE) { 1282 ALOGE("%s:copy_image failed in temp source",__FUNCTION__); 1283 delete_handle(dst_hnd); 1284 delete_handle(src_hnd); 1285 unmap_gpuaddr(ctx, mapped_dst_idx); 1286 return status; 1287 } 1288 1289 // Clean the cache 1290 IMemAlloc* memalloc = sAlloc->getAllocator(src_hnd->flags); 1291 if (memalloc->clean_buffer((void *)(src_hnd->base), src_hnd->size, 1292 src_hnd->offset, src_hnd->fd, 1293 gralloc::CACHE_CLEAN)) { 1294 ALOGE("%s: clean_buffer failed", __FUNCTION__); 1295 delete_handle(dst_hnd); 1296 delete_handle(src_hnd); 1297 unmap_gpuaddr(ctx, mapped_dst_idx); 1298 return COPYBIT_FAILURE; 1299 } 1300 } 1301 1302 flags |= (ctx->is_premultiplied_alpha) ? FLAGS_PREMULTIPLIED_ALPHA : 0; 1303 flags |= (ctx->dst_surface_type != RGB_SURFACE) ? FLAGS_YUV_DESTINATION : 0; 1304 status = set_image(ctx, src_surface.surface_id, &src_image, 1305 (eC2DFlags)flags, mapped_src_idx); 1306 if(status) { 1307 ALOGE("%s: set_image (src) error", __FUNCTION__); 1308 delete_handle(dst_hnd); 1309 delete_handle(src_hnd); 1310 unmap_gpuaddr(ctx, mapped_dst_idx); 1311 unmap_gpuaddr(ctx, mapped_src_idx); 1312 return COPYBIT_FAILURE; 1313 } 1314 1315 src_surface.config_mask = C2D_NO_ANTIALIASING_BIT | ctx->config_mask; 1316 src_surface.global_alpha = ctx->src_global_alpha; 1317 if (enableBlend) { 1318 if(src_surface.config_mask & C2D_GLOBAL_ALPHA_BIT) { 1319 src_surface.config_mask &= ~C2D_ALPHA_BLEND_NONE; 1320 if(!(src_surface.global_alpha)) { 1321 // src alpha is zero 1322 delete_handle(dst_hnd); 1323 delete_handle(src_hnd); 1324 unmap_gpuaddr(ctx, mapped_dst_idx); 1325 unmap_gpuaddr(ctx, mapped_src_idx); 1326 return COPYBIT_FAILURE; 1327 } 1328 } 1329 } else { 1330 src_surface.config_mask |= C2D_ALPHA_BLEND_NONE; 1331 } 1332 1333 if (src_surface_type == RGB_SURFACE) { 1334 ctx->blit_rgb_object[ctx->blit_rgb_count] = src_surface; 1335 ctx->blit_rgb_count++; 1336 } else if (src_surface_type == YUV_SURFACE_2_PLANES) { 1337 ctx->blit_yuv_2_plane_object[ctx->blit_yuv_2_plane_count] = src_surface; 1338 ctx->blit_yuv_2_plane_count++; 1339 } else { 1340 ctx->blit_yuv_3_plane_object[ctx->blit_yuv_3_plane_count] = src_surface; 1341 ctx->blit_yuv_3_plane_count++; 1342 } 1343 1344 struct copybit_rect_t clip; 1345 while ((status == 0) && region->next(region, &clip)) { 1346 set_rects(ctx, &(src_surface), dst_rect, src_rect, &clip); 1347 if (ctx->blit_count == MAX_BLIT_OBJECT_COUNT) { 1348 ALOGW("Reached end of blit count"); 1349 finish_copybit(dev); 1350 } 1351 ctx->blit_list[ctx->blit_count] = src_surface; 1352 ctx->blit_count++; 1353 } 1354 1355 // Check if we need to perform an early draw-finish. 1356 flags |= (need_temp_dst || need_temp_src) ? FLAGS_TEMP_SRC_DST : 0; 1357 if (need_to_execute_draw(ctx, (eC2DFlags)flags)) 1358 { 1359 finish_copybit(dev); 1360 } 1361 1362 if (need_temp_dst) { 1363 // copy the temp. destination without the alignment to the actual 1364 // destination. 1365 status = copy_image(dst_hnd, dst, CONVERT_TO_ANDROID_FORMAT); 1366 if (status == COPYBIT_FAILURE) { 1367 ALOGE("%s:copy_image failed in temp Dest",__FUNCTION__); 1368 delete_handle(dst_hnd); 1369 delete_handle(src_hnd); 1370 unmap_gpuaddr(ctx, mapped_dst_idx); 1371 unmap_gpuaddr(ctx, mapped_src_idx); 1372 return status; 1373 } 1374 // Clean the cache. 1375 IMemAlloc* memalloc = sAlloc->getAllocator(dst_hnd->flags); 1376 memalloc->clean_buffer((void *)(dst_hnd->base), dst_hnd->size, 1377 dst_hnd->offset, dst_hnd->fd, 1378 gralloc::CACHE_CLEAN); 1379 } 1380 delete_handle(dst_hnd); 1381 delete_handle(src_hnd); 1382 1383 ctx->is_premultiplied_alpha = false; 1384 ctx->fb_width = 0; 1385 ctx->fb_height = 0; 1386 ctx->config_mask = 0; 1387 return status; 1388 } 1389 1390 static int set_sync_copybit(struct copybit_device_t *dev, 1391 int acquireFenceFd) 1392 { 1393 return 0; 1394 } 1395 1396 static int stretch_copybit( 1397 struct copybit_device_t *dev, 1398 struct copybit_image_t const *dst, 1399 struct copybit_image_t const *src, 1400 struct copybit_rect_t const *dst_rect, 1401 struct copybit_rect_t const *src_rect, 1402 struct copybit_region_t const *region) 1403 { 1404 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 1405 int status = COPYBIT_SUCCESS; 1406 bool needsBlending = (ctx->src_global_alpha != 0); 1407 pthread_mutex_lock(&ctx->wait_cleanup_lock); 1408 status = stretch_copybit_internal(dev, dst, src, dst_rect, src_rect, 1409 region, needsBlending); 1410 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 1411 return status; 1412 } 1413 1414 /** Perform a blit type operation */ 1415 static int blit_copybit( 1416 struct copybit_device_t *dev, 1417 struct copybit_image_t const *dst, 1418 struct copybit_image_t const *src, 1419 struct copybit_region_t const *region) 1420 { 1421 int status = COPYBIT_SUCCESS; 1422 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 1423 struct copybit_rect_t dr = { 0, 0, (int)dst->w, (int)dst->h }; 1424 struct copybit_rect_t sr = { 0, 0, (int)src->w, (int)src->h }; 1425 pthread_mutex_lock(&ctx->wait_cleanup_lock); 1426 status = stretch_copybit_internal(dev, dst, src, &dr, &sr, region, false); 1427 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 1428 return status; 1429 } 1430 1431 /*****************************************************************************/ 1432 1433 static void clean_up(copybit_context_t* ctx) 1434 { 1435 void* ret; 1436 if (!ctx) 1437 return; 1438 1439 // stop the wait_cleanup_thread 1440 pthread_mutex_lock(&ctx->wait_cleanup_lock); 1441 ctx->stop_thread = true; 1442 // Signal waiting thread 1443 pthread_cond_signal(&ctx->wait_cleanup_cond); 1444 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 1445 // waits for the cleanup thread to exit 1446 pthread_join(ctx->wait_thread_id, &ret); 1447 pthread_mutex_destroy(&ctx->wait_cleanup_lock); 1448 pthread_cond_destroy (&ctx->wait_cleanup_cond); 1449 1450 for (int i = 0; i < NUM_SURFACE_TYPES; i++) { 1451 if (ctx->dst[i]) 1452 LINK_c2dDestroySurface(ctx->dst[i]); 1453 } 1454 1455 for (int i = 0; i < MAX_RGB_SURFACES; i++) { 1456 if (ctx->blit_rgb_object[i].surface_id) 1457 LINK_c2dDestroySurface(ctx->blit_rgb_object[i].surface_id); 1458 } 1459 1460 for (int i = 0; i < MAX_YUV_2_PLANE_SURFACES; i++) { 1461 if (ctx->blit_yuv_2_plane_object[i].surface_id) 1462 LINK_c2dDestroySurface(ctx->blit_yuv_2_plane_object[i].surface_id); 1463 } 1464 1465 for (int i = 0; i < MAX_YUV_3_PLANE_SURFACES; i++) { 1466 if (ctx->blit_yuv_3_plane_object[i].surface_id) 1467 LINK_c2dDestroySurface(ctx->blit_yuv_3_plane_object[i].surface_id); 1468 } 1469 1470 if (ctx->libc2d2) { 1471 ::dlclose(ctx->libc2d2); 1472 ALOGV("dlclose(libc2d2)"); 1473 } 1474 1475 free(ctx); 1476 } 1477 1478 /** Close the copybit device */ 1479 static int close_copybit(struct hw_device_t *dev) 1480 { 1481 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 1482 if (ctx) { 1483 free_temp_buffer(ctx->temp_src_buffer); 1484 free_temp_buffer(ctx->temp_dst_buffer); 1485 } 1486 clean_up(ctx); 1487 return 0; 1488 } 1489 1490 /** Open a new instance of a copybit device using name */ 1491 static int open_copybit(const struct hw_module_t* module, const char* name, 1492 struct hw_device_t** device) 1493 { 1494 int status = COPYBIT_SUCCESS; 1495 C2D_RGB_SURFACE_DEF surfDefinition = {0}; 1496 C2D_YUV_SURFACE_DEF yuvSurfaceDef = {0} ; 1497 struct copybit_context_t *ctx; 1498 char fbName[64]; 1499 1500 ctx = (struct copybit_context_t *)malloc(sizeof(struct copybit_context_t)); 1501 if(!ctx) { 1502 ALOGE("%s: malloc failed", __FUNCTION__); 1503 return COPYBIT_FAILURE; 1504 } 1505 1506 /* initialize drawstate */ 1507 memset(ctx, 0, sizeof(*ctx)); 1508 ctx->libc2d2 = ::dlopen("libC2D2.so", RTLD_NOW); 1509 if (!ctx->libc2d2) { 1510 ALOGE("FATAL ERROR: could not dlopen libc2d2.so: %s", dlerror()); 1511 clean_up(ctx); 1512 status = COPYBIT_FAILURE; 1513 *device = NULL; 1514 return status; 1515 } 1516 *(void **)&LINK_c2dCreateSurface = ::dlsym(ctx->libc2d2, 1517 "c2dCreateSurface"); 1518 *(void **)&LINK_c2dUpdateSurface = ::dlsym(ctx->libc2d2, 1519 "c2dUpdateSurface"); 1520 *(void **)&LINK_c2dReadSurface = ::dlsym(ctx->libc2d2, 1521 "c2dReadSurface"); 1522 *(void **)&LINK_c2dDraw = ::dlsym(ctx->libc2d2, "c2dDraw"); 1523 *(void **)&LINK_c2dFlush = ::dlsym(ctx->libc2d2, "c2dFlush"); 1524 *(void **)&LINK_c2dFinish = ::dlsym(ctx->libc2d2, "c2dFinish"); 1525 *(void **)&LINK_c2dWaitTimestamp = ::dlsym(ctx->libc2d2, 1526 "c2dWaitTimestamp"); 1527 *(void **)&LINK_c2dDestroySurface = ::dlsym(ctx->libc2d2, 1528 "c2dDestroySurface"); 1529 *(void **)&LINK_c2dMapAddr = ::dlsym(ctx->libc2d2, 1530 "c2dMapAddr"); 1531 *(void **)&LINK_c2dUnMapAddr = ::dlsym(ctx->libc2d2, 1532 "c2dUnMapAddr"); 1533 *(void **)&LINK_c2dGetDriverCapabilities = ::dlsym(ctx->libc2d2, 1534 "c2dGetDriverCapabilities"); 1535 *(void **)&LINK_c2dCreateFenceFD = ::dlsym(ctx->libc2d2, 1536 "c2dCreateFenceFD"); 1537 *(void **)&LINK_c2dFillSurface = ::dlsym(ctx->libc2d2, 1538 "c2dFillSurface"); 1539 1540 if (!LINK_c2dCreateSurface || !LINK_c2dUpdateSurface || !LINK_c2dReadSurface 1541 || !LINK_c2dDraw || !LINK_c2dFlush || !LINK_c2dWaitTimestamp || 1542 !LINK_c2dFinish || !LINK_c2dDestroySurface || 1543 !LINK_c2dGetDriverCapabilities || !LINK_c2dCreateFenceFD || 1544 !LINK_c2dFillSurface) { 1545 ALOGE("%s: dlsym ERROR", __FUNCTION__); 1546 clean_up(ctx); 1547 status = COPYBIT_FAILURE; 1548 *device = NULL; 1549 return status; 1550 } 1551 1552 ctx->device.common.tag = HARDWARE_DEVICE_TAG; 1553 ctx->device.common.version = 1; 1554 ctx->device.common.module = (hw_module_t*)(module); 1555 ctx->device.common.close = close_copybit; 1556 ctx->device.set_parameter = set_parameter_copybit; 1557 ctx->device.get = get; 1558 ctx->device.blit = blit_copybit; 1559 ctx->device.set_sync = set_sync_copybit; 1560 ctx->device.stretch = stretch_copybit; 1561 ctx->device.finish = finish_copybit; 1562 ctx->device.flush_get_fence = flush_get_fence_copybit; 1563 ctx->device.clear = clear_copybit; 1564 1565 /* Create RGB Surface */ 1566 surfDefinition.buffer = (void*)0xdddddddd; 1567 surfDefinition.phys = (void*)0xdddddddd; 1568 surfDefinition.stride = 1 * 4; 1569 surfDefinition.width = 1; 1570 surfDefinition.height = 1; 1571 surfDefinition.format = C2D_COLOR_FORMAT_8888_ARGB; 1572 if (LINK_c2dCreateSurface(&(ctx->dst[RGB_SURFACE]), C2D_TARGET | C2D_SOURCE, 1573 (C2D_SURFACE_TYPE)(C2D_SURFACE_RGB_HOST | 1574 C2D_SURFACE_WITH_PHYS | 1575 C2D_SURFACE_WITH_PHYS_DUMMY ), 1576 &surfDefinition)) { 1577 ALOGE("%s: create ctx->dst_surface[RGB_SURFACE] failed", __FUNCTION__); 1578 ctx->dst[RGB_SURFACE] = 0; 1579 clean_up(ctx); 1580 status = COPYBIT_FAILURE; 1581 *device = NULL; 1582 return status; 1583 } 1584 1585 unsigned int surface_id = 0; 1586 for (int i = 0; i < MAX_RGB_SURFACES; i++) 1587 { 1588 if (LINK_c2dCreateSurface(&surface_id, C2D_TARGET | C2D_SOURCE, 1589 (C2D_SURFACE_TYPE)(C2D_SURFACE_RGB_HOST | 1590 C2D_SURFACE_WITH_PHYS | 1591 C2D_SURFACE_WITH_PHYS_DUMMY ), 1592 &surfDefinition)) { 1593 ALOGE("%s: create RGB source surface %d failed", __FUNCTION__, i); 1594 ctx->blit_rgb_object[i].surface_id = 0; 1595 status = COPYBIT_FAILURE; 1596 break; 1597 } else { 1598 ctx->blit_rgb_object[i].surface_id = surface_id; 1599 ALOGW("%s i = %d surface_id=%d", __FUNCTION__, i, 1600 ctx->blit_rgb_object[i].surface_id); 1601 } 1602 } 1603 1604 if (status == COPYBIT_FAILURE) { 1605 clean_up(ctx); 1606 status = COPYBIT_FAILURE; 1607 *device = NULL; 1608 return status; 1609 } 1610 1611 // Create 2 plane YUV surfaces 1612 yuvSurfaceDef.format = C2D_COLOR_FORMAT_420_NV12; 1613 yuvSurfaceDef.width = 4; 1614 yuvSurfaceDef.height = 4; 1615 yuvSurfaceDef.plane0 = (void*)0xaaaaaaaa; 1616 yuvSurfaceDef.phys0 = (void*) 0xaaaaaaaa; 1617 yuvSurfaceDef.stride0 = 4; 1618 1619 yuvSurfaceDef.plane1 = (void*)0xaaaaaaaa; 1620 yuvSurfaceDef.phys1 = (void*) 0xaaaaaaaa; 1621 yuvSurfaceDef.stride1 = 4; 1622 if (LINK_c2dCreateSurface(&(ctx->dst[YUV_SURFACE_2_PLANES]), 1623 C2D_TARGET | C2D_SOURCE, 1624 (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | 1625 C2D_SURFACE_WITH_PHYS | 1626 C2D_SURFACE_WITH_PHYS_DUMMY), 1627 &yuvSurfaceDef)) { 1628 ALOGE("%s: create ctx->dst[YUV_SURFACE_2_PLANES] failed", __FUNCTION__); 1629 ctx->dst[YUV_SURFACE_2_PLANES] = 0; 1630 clean_up(ctx); 1631 status = COPYBIT_FAILURE; 1632 *device = NULL; 1633 return status; 1634 } 1635 1636 for (int i=0; i < MAX_YUV_2_PLANE_SURFACES; i++) 1637 { 1638 if (LINK_c2dCreateSurface(&surface_id, C2D_TARGET | C2D_SOURCE, 1639 (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | 1640 C2D_SURFACE_WITH_PHYS | 1641 C2D_SURFACE_WITH_PHYS_DUMMY ), 1642 &yuvSurfaceDef)) { 1643 ALOGE("%s: create YUV source %d failed", __FUNCTION__, i); 1644 ctx->blit_yuv_2_plane_object[i].surface_id = 0; 1645 status = COPYBIT_FAILURE; 1646 break; 1647 } else { 1648 ctx->blit_yuv_2_plane_object[i].surface_id = surface_id; 1649 ALOGW("%s: 2 Plane YUV i=%d surface_id=%d", __FUNCTION__, i, 1650 ctx->blit_yuv_2_plane_object[i].surface_id); 1651 } 1652 } 1653 1654 if (status == COPYBIT_FAILURE) { 1655 clean_up(ctx); 1656 status = COPYBIT_FAILURE; 1657 *device = NULL; 1658 return status; 1659 } 1660 1661 // Create YUV 3 plane surfaces 1662 yuvSurfaceDef.format = C2D_COLOR_FORMAT_420_YV12; 1663 yuvSurfaceDef.plane2 = (void*)0xaaaaaaaa; 1664 yuvSurfaceDef.phys2 = (void*) 0xaaaaaaaa; 1665 yuvSurfaceDef.stride2 = 4; 1666 1667 if (LINK_c2dCreateSurface(&(ctx->dst[YUV_SURFACE_3_PLANES]), 1668 C2D_TARGET | C2D_SOURCE, 1669 (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | 1670 C2D_SURFACE_WITH_PHYS | 1671 C2D_SURFACE_WITH_PHYS_DUMMY), 1672 &yuvSurfaceDef)) { 1673 ALOGE("%s: create ctx->dst[YUV_SURFACE_3_PLANES] failed", __FUNCTION__); 1674 ctx->dst[YUV_SURFACE_3_PLANES] = 0; 1675 clean_up(ctx); 1676 status = COPYBIT_FAILURE; 1677 *device = NULL; 1678 return status; 1679 } 1680 1681 for (int i=0; i < MAX_YUV_3_PLANE_SURFACES; i++) 1682 { 1683 if (LINK_c2dCreateSurface(&(surface_id), 1684 C2D_TARGET | C2D_SOURCE, 1685 (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | 1686 C2D_SURFACE_WITH_PHYS | 1687 C2D_SURFACE_WITH_PHYS_DUMMY), 1688 &yuvSurfaceDef)) { 1689 ALOGE("%s: create 3 plane YUV surface %d failed", __FUNCTION__, i); 1690 ctx->blit_yuv_3_plane_object[i].surface_id = 0; 1691 status = COPYBIT_FAILURE; 1692 break; 1693 } else { 1694 ctx->blit_yuv_3_plane_object[i].surface_id = surface_id; 1695 ALOGW("%s: 3 Plane YUV i=%d surface_id=%d", __FUNCTION__, i, 1696 ctx->blit_yuv_3_plane_object[i].surface_id); 1697 } 1698 } 1699 1700 if (status == COPYBIT_FAILURE) { 1701 clean_up(ctx); 1702 status = COPYBIT_FAILURE; 1703 *device = NULL; 1704 return status; 1705 } 1706 1707 if (LINK_c2dGetDriverCapabilities(&(ctx->c2d_driver_info))) { 1708 ALOGE("%s: LINK_c2dGetDriverCapabilities failed", __FUNCTION__); 1709 clean_up(ctx); 1710 status = COPYBIT_FAILURE; 1711 *device = NULL; 1712 return status; 1713 } 1714 // Initialize context variables. 1715 ctx->trg_transform = C2D_TARGET_ROTATE_0; 1716 1717 ctx->temp_src_buffer.fd = -1; 1718 ctx->temp_src_buffer.base = 0; 1719 ctx->temp_src_buffer.size = 0; 1720 1721 ctx->temp_dst_buffer.fd = -1; 1722 ctx->temp_dst_buffer.base = 0; 1723 ctx->temp_dst_buffer.size = 0; 1724 1725 ctx->fb_width = 0; 1726 ctx->fb_height = 0; 1727 1728 ctx->blit_rgb_count = 0; 1729 ctx->blit_yuv_2_plane_count = 0; 1730 ctx->blit_yuv_3_plane_count = 0; 1731 ctx->blit_count = 0; 1732 1733 ctx->wait_timestamp = false; 1734 ctx->stop_thread = false; 1735 pthread_mutex_init(&(ctx->wait_cleanup_lock), NULL); 1736 pthread_cond_init(&(ctx->wait_cleanup_cond), NULL); 1737 /* Start the wait thread */ 1738 pthread_attr_t attr; 1739 pthread_attr_init(&attr); 1740 pthread_attr_setdetachstate(&attr, PTHREAD_CREATE_JOINABLE); 1741 1742 pthread_create(&ctx->wait_thread_id, &attr, &c2d_wait_loop, 1743 (void *)ctx); 1744 pthread_attr_destroy(&attr); 1745 1746 *device = &ctx->device.common; 1747 return status; 1748 } 1749
