1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef __MSMB_ISP__ 20 #define __MSMB_ISP__ 21 #include <linux/videodev2.h> 22 #define MAX_PLANES_PER_STREAM 3 23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24 #define MAX_NUM_STREAM 7 25 #define ISP_VERSION_46 46 26 #define ISP_VERSION_44 44 27 #define ISP_VERSION_40 40 28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29 #define ISP_VERSION_32 32 30 #define ISP_NATIVE_BUF_BIT (0x10000 << 0) 31 #define ISP0_BIT (0x10000 << 1) 32 #define ISP1_BIT (0x10000 << 2) 33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34 #define ISP_META_CHANNEL_BIT (0x10000 << 3) 35 #define ISP_SCRATCH_BUF_BIT (0x10000 << 4) 36 #define ISP_STATS_STREAM_BIT 0x80000000 37 struct msm_vfe_cfg_cmd_list; 38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39 enum ISP_START_PIXEL_PATTERN { 40 ISP_BAYER_RGRGRG, 41 ISP_BAYER_GRGRGR, 42 ISP_BAYER_BGBGBG, 43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44 ISP_BAYER_GBGBGB, 45 ISP_YUV_YCbYCr, 46 ISP_YUV_YCrYCb, 47 ISP_YUV_CbYCrY, 48 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49 ISP_YUV_CrYCbY, 50 ISP_PIX_PATTERN_MAX 51 }; 52 enum msm_vfe_plane_fmt { 53 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54 Y_PLANE, 55 CB_PLANE, 56 CR_PLANE, 57 CRCB_PLANE, 58 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59 CBCR_PLANE, 60 VFE_PLANE_FMT_MAX 61 }; 62 enum msm_vfe_input_src { 63 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64 VFE_PIX_0, 65 VFE_RAW_0, 66 VFE_RAW_1, 67 VFE_RAW_2, 68 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69 VFE_SRC_MAX, 70 }; 71 enum msm_vfe_axi_stream_src { 72 PIX_ENCODER, 73 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74 PIX_VIEWFINDER, 75 PIX_VIDEO, 76 CAMIF_RAW, 77 IDEAL_RAW, 78 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79 RDI_INTF_0, 80 RDI_INTF_1, 81 RDI_INTF_2, 82 VFE_AXI_SRC_MAX 83 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84 }; 85 enum msm_vfe_frame_skip_pattern { 86 NO_SKIP, 87 EVERY_2FRAME, 88 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89 EVERY_3FRAME, 90 EVERY_4FRAME, 91 EVERY_5FRAME, 92 EVERY_6FRAME, 93 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94 EVERY_7FRAME, 95 EVERY_8FRAME, 96 EVERY_16FRAME, 97 EVERY_32FRAME, 98 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99 SKIP_ALL, 100 MAX_SKIP, 101 }; 102 enum msm_vfe_camif_input { 103 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104 CAMIF_DISABLED, 105 CAMIF_PAD_REG_INPUT, 106 CAMIF_MIDDI_INPUT, 107 CAMIF_MIPI_INPUT, 108 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109 }; 110 struct msm_vfe_camif_cfg { 111 uint32_t lines_per_frame; 112 uint32_t pixels_per_line; 113 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114 uint32_t first_pixel; 115 uint32_t last_pixel; 116 uint32_t first_line; 117 uint32_t last_line; 118 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119 uint32_t epoch_line0; 120 uint32_t epoch_line1; 121 enum msm_vfe_camif_input camif_input; 122 }; 123 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124 enum msm_vfe_inputmux { 125 CAMIF, 126 TESTGEN, 127 EXTERNAL_READ, 128 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129 }; 130 enum msm_vfe_stats_composite_group { 131 STATS_COMPOSITE_GRP_NONE, 132 STATS_COMPOSITE_GRP_1, 133 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134 STATS_COMPOSITE_GRP_2, 135 STATS_COMPOSITE_GRP_MAX, 136 }; 137 struct msm_vfe_pix_cfg { 138 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139 struct msm_vfe_camif_cfg camif_cfg; 140 enum msm_vfe_inputmux input_mux; 141 enum ISP_START_PIXEL_PATTERN pixel_pattern; 142 uint32_t input_format; 143 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144 }; 145 struct msm_vfe_rdi_cfg { 146 uint8_t cid; 147 uint8_t frame_based; 148 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149 }; 150 struct msm_vfe_input_cfg { 151 union { 152 struct msm_vfe_pix_cfg pix_cfg; 153 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154 struct msm_vfe_rdi_cfg rdi_cfg; 155 } d; 156 enum msm_vfe_input_src input_src; 157 uint32_t input_pix_clk; 158 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159 }; 160 struct msm_vfe_axi_plane_cfg { 161 uint32_t output_width; 162 uint32_t output_height; 163 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164 uint32_t output_stride; 165 uint32_t output_scan_lines; 166 uint32_t output_plane_format; 167 uint32_t plane_addr_offset; 168 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169 uint8_t csid_src; 170 uint8_t rdi_cid; 171 }; 172 struct msm_vfe_axi_stream_request_cmd { 173 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174 uint32_t session_id; 175 uint32_t stream_id; 176 uint32_t vt_enable; 177 uint32_t output_format; 178 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179 enum msm_vfe_axi_stream_src stream_src; 180 struct msm_vfe_axi_plane_cfg plane_cfg[MAX_PLANES_PER_STREAM]; 181 uint32_t burst_count; 182 uint32_t hfr_mode; 183 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184 uint8_t frame_base; 185 uint32_t init_frame_drop; 186 enum msm_vfe_frame_skip_pattern frame_skip_pattern; 187 uint8_t buf_divert; 188 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189 uint32_t axi_stream_handle; 190 uint32_t controllable_output; 191 }; 192 struct msm_vfe_axi_stream_release_cmd { 193 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194 uint32_t stream_handle; 195 }; 196 enum msm_vfe_axi_stream_cmd { 197 STOP_STREAM, 198 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 199 START_STREAM, 200 STOP_IMMEDIATELY, 201 }; 202 struct msm_vfe_axi_stream_cfg_cmd { 203 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 204 uint8_t num_streams; 205 uint32_t stream_handle[MAX_NUM_STREAM]; 206 enum msm_vfe_axi_stream_cmd cmd; 207 }; 208 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 209 enum msm_vfe_axi_stream_update_type { 210 ENABLE_STREAM_BUF_DIVERT, 211 DISABLE_STREAM_BUF_DIVERT, 212 UPDATE_STREAM_FRAMEDROP_PATTERN, 213 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 214 UPDATE_STREAM_STATS_FRAMEDROP_PATTERN, 215 UPDATE_STREAM_AXI_CONFIG, 216 UPDATE_STREAM_REQUEST_FRAMES, 217 UPDATE_STREAM_ADD_BUFQ, 218 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 219 UPDATE_STREAM_REMOVE_BUFQ, 220 }; 221 enum msm_vfe_iommu_type { 222 IOMMU_ATTACH, 223 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 224 IOMMU_DETACH, 225 }; 226 struct msm_vfe_axi_stream_cfg_update_info { 227 uint32_t stream_handle; 228 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 229 uint32_t output_format; 230 uint32_t user_stream_id; 231 uint8_t need_divert; 232 enum msm_vfe_frame_skip_pattern skip_pattern; 233 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 234 struct msm_vfe_axi_plane_cfg plane_cfg[MAX_PLANES_PER_STREAM]; 235 }; 236 struct msm_vfe_axi_stream_update_cmd { 237 uint32_t num_streams; 238 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 239 enum msm_vfe_axi_stream_update_type update_type; 240 struct msm_vfe_axi_stream_cfg_update_info update_info[MAX_NUM_STREAM]; 241 uint32_t cur_frame_id; 242 }; 243 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 244 struct msm_vfe_smmu_attach_cmd { 245 uint32_t security_mode; 246 uint32_t iommu_attach_mode; 247 }; 248 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 249 enum msm_isp_stats_type { 250 MSM_ISP_STATS_AEC, 251 MSM_ISP_STATS_AF, 252 MSM_ISP_STATS_AWB, 253 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 254 MSM_ISP_STATS_RS, 255 MSM_ISP_STATS_CS, 256 MSM_ISP_STATS_IHIST, 257 MSM_ISP_STATS_SKIN, 258 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 259 MSM_ISP_STATS_BG, 260 MSM_ISP_STATS_BF, 261 MSM_ISP_STATS_BE, 262 MSM_ISP_STATS_BHIST, 263 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 264 MSM_ISP_STATS_BF_SCALE, 265 MSM_ISP_STATS_HDR_BE, 266 MSM_ISP_STATS_HDR_BHIST, 267 MSM_ISP_STATS_MAX 268 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 269 }; 270 struct msm_vfe_stats_stream_request_cmd { 271 uint32_t session_id; 272 uint32_t stream_id; 273 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 274 enum msm_isp_stats_type stats_type; 275 uint32_t composite_flag; 276 uint32_t framedrop_pattern; 277 uint32_t init_frame_drop; 278 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 279 uint32_t irq_subsample_pattern; 280 uint32_t buffer_offset; 281 uint32_t stream_handle; 282 }; 283 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 284 struct msm_vfe_stats_stream_release_cmd { 285 uint32_t stream_handle; 286 }; 287 struct msm_vfe_stats_stream_cfg_cmd { 288 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 289 uint8_t num_streams; 290 uint32_t stream_handle[MSM_ISP_STATS_MAX]; 291 uint8_t enable; 292 }; 293 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 294 enum msm_vfe_reg_cfg_type { 295 VFE_WRITE, 296 VFE_WRITE_MB, 297 VFE_READ, 298 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 299 VFE_CFG_MASK, 300 VFE_WRITE_DMI_16BIT, 301 VFE_WRITE_DMI_32BIT, 302 VFE_WRITE_DMI_64BIT, 303 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 304 VFE_READ_DMI_16BIT, 305 VFE_READ_DMI_32BIT, 306 VFE_READ_DMI_64BIT, 307 GET_MAX_CLK_RATE, 308 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 309 GET_ISP_ID, 310 }; 311 struct msm_vfe_cfg_cmd2 { 312 uint16_t num_cfg; 313 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 314 uint16_t cmd_len; 315 void __user *cfg_data; 316 void __user *cfg_cmd; 317 }; 318 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 319 struct msm_vfe_cfg_cmd_list { 320 struct msm_vfe_cfg_cmd2 cfg_cmd; 321 struct msm_vfe_cfg_cmd_list *next; 322 uint32_t next_size; 323 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 324 }; 325 struct msm_vfe_reg_rw_info { 326 uint32_t reg_offset; 327 uint32_t cmd_data_offset; 328 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 329 uint32_t len; 330 }; 331 struct msm_vfe_reg_mask_info { 332 uint32_t reg_offset; 333 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 334 uint32_t mask; 335 uint32_t val; 336 }; 337 struct msm_vfe_reg_dmi_info { 338 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 339 uint32_t hi_tbl_offset; 340 uint32_t lo_tbl_offset; 341 uint32_t len; 342 }; 343 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 344 struct msm_vfe_reg_cfg_cmd { 345 union { 346 struct msm_vfe_reg_rw_info rw_info; 347 struct msm_vfe_reg_mask_info mask_info; 348 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 349 struct msm_vfe_reg_dmi_info dmi_info; 350 } u; 351 enum msm_vfe_reg_cfg_type cmd_type; 352 }; 353 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 354 enum msm_isp_buf_type { 355 ISP_PRIVATE_BUF, 356 ISP_SHARE_BUF, 357 MAX_ISP_BUF_TYPE, 358 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 359 }; 360 struct msm_isp_buf_request { 361 uint32_t session_id; 362 uint32_t stream_id; 363 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 364 uint8_t num_buf; 365 uint32_t handle; 366 enum msm_isp_buf_type buf_type; 367 }; 368 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 369 struct msm_isp_qbuf_plane { 370 uint32_t addr; 371 uint32_t offset; 372 }; 373 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 374 struct msm_isp_qbuf_buffer { 375 struct msm_isp_qbuf_plane planes[MAX_PLANES_PER_STREAM]; 376 uint32_t num_planes; 377 }; 378 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 379 struct msm_isp_qbuf_info { 380 uint32_t handle; 381 int32_t buf_idx; 382 struct msm_isp_qbuf_buffer buffer; 383 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 384 uint32_t dirty_buf; 385 }; 386 struct msm_vfe_axi_src_state { 387 enum msm_vfe_input_src input_src; 388 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 389 uint32_t src_active; 390 }; 391 enum msm_isp_event_idx { 392 ISP_REG_UPDATE = 0, 393 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 394 ISP_START_ACK = 1, 395 ISP_STOP_ACK = 2, 396 ISP_IRQ_VIOLATION = 3, 397 ISP_WM_BUS_OVERFLOW = 4, 398 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 399 ISP_STATS_OVERFLOW = 5, 400 ISP_CAMIF_ERROR = 6, 401 ISP_EPOCH0_IRQ = 7, 402 ISP_BUF_DONE = 9, 403 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 404 ISP_UPDATE_AXI_DONE = 10, 405 ISP_EVENT_MAX = 11 406 }; 407 enum msm_isp_epoch_idx { 408 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 409 ISP_EPOCH_0 = 0, 410 ISP_EPOCH_1 = 1, 411 ISP_EPOCH_MAX = 2 412 }; 413 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 414 #define ISP_EVENT_OFFSET 8 415 #define ISP_EVENT_BASE (V4L2_EVENT_PRIVATE_START) 416 #define ISP_BUF_EVENT_BASE (ISP_EVENT_BASE + (1 << ISP_EVENT_OFFSET)) 417 #define ISP_STATS_EVENT_BASE (ISP_EVENT_BASE + (2 << ISP_EVENT_OFFSET)) 418 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 419 #define ISP_SOF_EVENT_BASE (ISP_EVENT_BASE + (3 << ISP_EVENT_OFFSET)) 420 #define ISP_EOF_EVENT_BASE (ISP_EVENT_BASE + (4 << ISP_EVENT_OFFSET)) 421 #define ISP_EVENT_REG_UPDATE (ISP_EVENT_BASE + ISP_REG_UPDATE) 422 #define ISP_EVENT_START_ACK (ISP_EVENT_BASE + ISP_START_ACK) 423 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 424 #define ISP_EVENT_STOP_ACK (ISP_EVENT_BASE + ISP_STOP_ACK) 425 #define ISP_EVENT_IRQ_VIOLATION (ISP_EVENT_BASE + ISP_IRQ_VIOLATION) 426 #define ISP_EVENT_WM_BUS_OVERFLOW (ISP_EVENT_BASE + ISP_WM_BUS_OVERFLOW) 427 #define ISP_EVENT_STATS_OVERFLOW (ISP_EVENT_BASE + ISP_STATS_OVERFLOW) 428 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 429 #define ISP_EVENT_CAMIF_ERROR (ISP_EVENT_BASE + ISP_CAMIF_ERROR) 430 #define ISP_EVENT_EPOCH0_IRQ (ISP_EVENT_BASE + ISP_EPOCH0_IRQ) 431 #define ISP_EVENT_UPDATE_AXI_DONE (ISP_EVENT_BASE + ISP_UPDATE_AXI_DONE) 432 #define ISP_EVENT_SOF (ISP_SOF_EVENT_BASE) 433 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 434 #define ISP_EVENT_EOF (ISP_EOF_EVENT_BASE) 435 #define ISP_EVENT_BUF_DONE (ISP_EVENT_BASE + ISP_BUF_DONE) 436 #define ISP_EVENT_BUF_DIVERT (ISP_BUF_EVENT_BASE) 437 #define ISP_EVENT_STATS_NOTIFY (ISP_STATS_EVENT_BASE) 438 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 439 #define ISP_EVENT_COMP_STATS_NOTIFY (ISP_EVENT_STATS_NOTIFY + MSM_ISP_STATS_MAX) 440 struct msm_isp_buf_event { 441 uint32_t session_id; 442 uint32_t stream_id; 443 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 444 uint32_t handle; 445 uint32_t output_format; 446 int8_t buf_idx; 447 }; 448 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 449 struct msm_isp_stats_event { 450 uint32_t stats_mask; 451 uint8_t stats_buf_idxs[MSM_ISP_STATS_MAX]; 452 }; 453 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 454 struct msm_isp_stream_ack { 455 uint32_t session_id; 456 uint32_t stream_id; 457 uint32_t handle; 458 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 459 }; 460 struct msm_isp_epoch_event { 461 enum msm_isp_epoch_idx epoch_idx; 462 }; 463 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 464 struct msm_isp_event_data { 465 struct timeval timestamp; 466 struct timeval mono_timestamp; 467 enum msm_vfe_input_src input_intf; 468 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 469 uint32_t frame_id; 470 union { 471 struct msm_isp_stats_event stats; 472 struct msm_isp_buf_event buf_done; 473 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 474 struct msm_isp_epoch_event epoch; 475 } u; 476 }; 477 #define V4L2_PIX_FMT_QBGGR8 v4l2_fourcc('Q', 'B', 'G', '8') 478 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 479 #define V4L2_PIX_FMT_QGBRG8 v4l2_fourcc('Q', 'G', 'B', '8') 480 #define V4L2_PIX_FMT_QGRBG8 v4l2_fourcc('Q', 'G', 'R', '8') 481 #define V4L2_PIX_FMT_QRGGB8 v4l2_fourcc('Q', 'R', 'G', '8') 482 #define V4L2_PIX_FMT_QBGGR10 v4l2_fourcc('Q', 'B', 'G', '0') 483 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 484 #define V4L2_PIX_FMT_QGBRG10 v4l2_fourcc('Q', 'G', 'B', '0') 485 #define V4L2_PIX_FMT_QGRBG10 v4l2_fourcc('Q', 'G', 'R', '0') 486 #define V4L2_PIX_FMT_QRGGB10 v4l2_fourcc('Q', 'R', 'G', '0') 487 #define V4L2_PIX_FMT_QBGGR12 v4l2_fourcc('Q', 'B', 'G', '2') 488 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 489 #define V4L2_PIX_FMT_QGBRG12 v4l2_fourcc('Q', 'G', 'B', '2') 490 #define V4L2_PIX_FMT_QGRBG12 v4l2_fourcc('Q', 'G', 'R', '2') 491 #define V4L2_PIX_FMT_QRGGB12 v4l2_fourcc('Q', 'R', 'G', '2') 492 #define V4L2_PIX_FMT_NV14 v4l2_fourcc('N', 'V', '1', '4') 493 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 494 #define V4L2_PIX_FMT_NV41 v4l2_fourcc('N', 'V', '4', '1') 495 #define V4L2_PIX_FMT_META v4l2_fourcc('Q', 'M', 'E', 'T') 496 #define VIDIOC_MSM_VFE_REG_CFG _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_vfe_cfg_cmd2) 497 #define VIDIOC_MSM_ISP_REQUEST_BUF _IOWR('V', BASE_VIDIOC_PRIVATE+1, struct msm_isp_buf_request) 498 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 499 #define VIDIOC_MSM_ISP_ENQUEUE_BUF _IOWR('V', BASE_VIDIOC_PRIVATE+2, struct msm_isp_qbuf_info) 500 #define VIDIOC_MSM_ISP_RELEASE_BUF _IOWR('V', BASE_VIDIOC_PRIVATE+3, struct msm_isp_buf_request) 501 #define VIDIOC_MSM_ISP_REQUEST_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE+4, struct msm_vfe_axi_stream_request_cmd) 502 #define VIDIOC_MSM_ISP_CFG_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE+5, struct msm_vfe_axi_stream_cfg_cmd) 503 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 504 #define VIDIOC_MSM_ISP_RELEASE_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE+6, struct msm_vfe_axi_stream_release_cmd) 505 #define VIDIOC_MSM_ISP_INPUT_CFG _IOWR('V', BASE_VIDIOC_PRIVATE+7, struct msm_vfe_input_cfg) 506 #define VIDIOC_MSM_ISP_SET_SRC_STATE _IOWR('V', BASE_VIDIOC_PRIVATE+8, struct msm_vfe_axi_src_state) 507 #define VIDIOC_MSM_ISP_REQUEST_STATS_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE+9, struct msm_vfe_stats_stream_request_cmd) 508 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 509 #define VIDIOC_MSM_ISP_CFG_STATS_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE+10, struct msm_vfe_stats_stream_cfg_cmd) 510 #define VIDIOC_MSM_ISP_RELEASE_STATS_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE+11, struct msm_vfe_stats_stream_release_cmd) 511 #define VIDIOC_MSM_ISP_UPDATE_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE+13, struct msm_vfe_axi_stream_update_cmd) 512 #define VIDIOC_MSM_VFE_REG_LIST_CFG _IOWR('V', BASE_VIDIOC_PRIVATE+14, struct msm_vfe_cfg_cmd_list) 513 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 514 #define VIDIOC_MSM_ISP_SMMU_ATTACH _IOWR('V', BASE_VIDIOC_PRIVATE+15, struct msm_vfe_smmu_attach_cmd) 515 #define VIDIOC_MSM_ISP_UPDATE_STATS_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE+16, struct msm_vfe_axi_stream_update_cmd) 516 #endif 517
