Home | History | Annotate | Download | only in linux
      1 /****************************************************************************
      2  ****************************************************************************
      3  ***
      4  ***   This header was automatically generated from a Linux kernel header
      5  ***   of the same name, to make information necessary for userspace to
      6  ***   call into the kernel available to libc.  It contains only constants,
      7  ***   structures, and macros generated from the original header, and thus,
      8  ***   contains no copyrightable information.
      9  ***
     10  ***   To edit the content of this header, modify the corresponding
     11  ***   source file (e.g. under external/kernel-headers/original/) then
     12  ***   run bionic/libc/kernel/tools/update_all.py
     13  ***
     14  ***   Any manual change here will be lost the next time this script will
     15  ***   be run. You've been warned!
     16  ***
     17  ****************************************************************************
     18  ****************************************************************************/
     19 #ifndef _UAPI_LINUX_PERF_EVENT_H
     20 #define _UAPI_LINUX_PERF_EVENT_H
     21 #include <linux/types.h>
     22 #include <linux/ioctl.h>
     23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     24 #include <asm/byteorder.h>
     25 enum perf_type_id {
     26  PERF_TYPE_HARDWARE = 0,
     27  PERF_TYPE_SOFTWARE = 1,
     28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     29  PERF_TYPE_TRACEPOINT = 2,
     30  PERF_TYPE_HW_CACHE = 3,
     31  PERF_TYPE_RAW = 4,
     32  PERF_TYPE_BREAKPOINT = 5,
     33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     34  PERF_TYPE_MAX,
     35 };
     36 enum perf_hw_id {
     37  PERF_COUNT_HW_CPU_CYCLES = 0,
     38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     39  PERF_COUNT_HW_INSTRUCTIONS = 1,
     40  PERF_COUNT_HW_CACHE_REFERENCES = 2,
     41  PERF_COUNT_HW_CACHE_MISSES = 3,
     42  PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4,
     43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     44  PERF_COUNT_HW_BRANCH_MISSES = 5,
     45  PERF_COUNT_HW_BUS_CYCLES = 6,
     46  PERF_COUNT_HW_STALLED_CYCLES_FRONTEND = 7,
     47  PERF_COUNT_HW_STALLED_CYCLES_BACKEND = 8,
     48 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     49  PERF_COUNT_HW_REF_CPU_CYCLES = 9,
     50  PERF_COUNT_HW_MAX,
     51 };
     52 enum perf_hw_cache_id {
     53 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     54  PERF_COUNT_HW_CACHE_L1D = 0,
     55  PERF_COUNT_HW_CACHE_L1I = 1,
     56  PERF_COUNT_HW_CACHE_LL = 2,
     57  PERF_COUNT_HW_CACHE_DTLB = 3,
     58 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     59  PERF_COUNT_HW_CACHE_ITLB = 4,
     60  PERF_COUNT_HW_CACHE_BPU = 5,
     61  PERF_COUNT_HW_CACHE_NODE = 6,
     62  PERF_COUNT_HW_CACHE_MAX,
     63 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     64 };
     65 enum perf_hw_cache_op_id {
     66  PERF_COUNT_HW_CACHE_OP_READ = 0,
     67  PERF_COUNT_HW_CACHE_OP_WRITE = 1,
     68 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     69  PERF_COUNT_HW_CACHE_OP_PREFETCH = 2,
     70  PERF_COUNT_HW_CACHE_OP_MAX,
     71 };
     72 enum perf_hw_cache_op_result_id {
     73 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     74  PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0,
     75  PERF_COUNT_HW_CACHE_RESULT_MISS = 1,
     76  PERF_COUNT_HW_CACHE_RESULT_MAX,
     77 };
     78 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     79 enum perf_sw_ids {
     80  PERF_COUNT_SW_CPU_CLOCK = 0,
     81  PERF_COUNT_SW_TASK_CLOCK = 1,
     82  PERF_COUNT_SW_PAGE_FAULTS = 2,
     83 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     84  PERF_COUNT_SW_CONTEXT_SWITCHES = 3,
     85  PERF_COUNT_SW_CPU_MIGRATIONS = 4,
     86  PERF_COUNT_SW_PAGE_FAULTS_MIN = 5,
     87  PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6,
     88 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     89  PERF_COUNT_SW_ALIGNMENT_FAULTS = 7,
     90  PERF_COUNT_SW_EMULATION_FAULTS = 8,
     91  PERF_COUNT_SW_DUMMY = 9,
     92  PERF_COUNT_SW_MAX,
     93 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     94 };
     95 enum perf_event_sample_format {
     96  PERF_SAMPLE_IP = 1U << 0,
     97  PERF_SAMPLE_TID = 1U << 1,
     98 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     99  PERF_SAMPLE_TIME = 1U << 2,
    100  PERF_SAMPLE_ADDR = 1U << 3,
    101  PERF_SAMPLE_READ = 1U << 4,
    102  PERF_SAMPLE_CALLCHAIN = 1U << 5,
    103 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    104  PERF_SAMPLE_ID = 1U << 6,
    105  PERF_SAMPLE_CPU = 1U << 7,
    106  PERF_SAMPLE_PERIOD = 1U << 8,
    107  PERF_SAMPLE_STREAM_ID = 1U << 9,
    108 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    109  PERF_SAMPLE_RAW = 1U << 10,
    110  PERF_SAMPLE_BRANCH_STACK = 1U << 11,
    111  PERF_SAMPLE_REGS_USER = 1U << 12,
    112  PERF_SAMPLE_STACK_USER = 1U << 13,
    113 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    114  PERF_SAMPLE_WEIGHT = 1U << 14,
    115  PERF_SAMPLE_DATA_SRC = 1U << 15,
    116  PERF_SAMPLE_IDENTIFIER = 1U << 16,
    117  PERF_SAMPLE_TRANSACTION = 1U << 17,
    118 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    119  PERF_SAMPLE_MAX = 1U << 18,
    120 };
    121 enum perf_branch_sample_type {
    122  PERF_SAMPLE_BRANCH_USER = 1U << 0,
    123 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    124  PERF_SAMPLE_BRANCH_KERNEL = 1U << 1,
    125  PERF_SAMPLE_BRANCH_HV = 1U << 2,
    126  PERF_SAMPLE_BRANCH_ANY = 1U << 3,
    127  PERF_SAMPLE_BRANCH_ANY_CALL = 1U << 4,
    128 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    129  PERF_SAMPLE_BRANCH_ANY_RETURN = 1U << 5,
    130  PERF_SAMPLE_BRANCH_IND_CALL = 1U << 6,
    131  PERF_SAMPLE_BRANCH_ABORT_TX = 1U << 7,
    132  PERF_SAMPLE_BRANCH_IN_TX = 1U << 8,
    133 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    134  PERF_SAMPLE_BRANCH_NO_TX = 1U << 9,
    135  PERF_SAMPLE_BRANCH_MAX = 1U << 10,
    136 };
    137 #define PERF_SAMPLE_BRANCH_PLM_ALL   (PERF_SAMPLE_BRANCH_USER|  PERF_SAMPLE_BRANCH_KERNEL|  PERF_SAMPLE_BRANCH_HV)
    138 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    139 enum perf_sample_regs_abi {
    140  PERF_SAMPLE_REGS_ABI_NONE = 0,
    141  PERF_SAMPLE_REGS_ABI_32 = 1,
    142  PERF_SAMPLE_REGS_ABI_64 = 2,
    143 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    144 };
    145 enum {
    146  PERF_TXN_ELISION = (1 << 0),
    147  PERF_TXN_TRANSACTION = (1 << 1),
    148 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    149  PERF_TXN_SYNC = (1 << 2),
    150  PERF_TXN_ASYNC = (1 << 3),
    151  PERF_TXN_RETRY = (1 << 4),
    152  PERF_TXN_CONFLICT = (1 << 5),
    153 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    154  PERF_TXN_CAPACITY_WRITE = (1 << 6),
    155  PERF_TXN_CAPACITY_READ = (1 << 7),
    156  PERF_TXN_MAX = (1 << 8),
    157  PERF_TXN_ABORT_MASK = (0xffffffffULL << 32),
    158 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    159  PERF_TXN_ABORT_SHIFT = 32,
    160 };
    161 enum perf_event_read_format {
    162  PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0,
    163 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    164  PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1,
    165  PERF_FORMAT_ID = 1U << 2,
    166  PERF_FORMAT_GROUP = 1U << 3,
    167  PERF_FORMAT_MAX = 1U << 4,
    168 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    169 };
    170 #define PERF_ATTR_SIZE_VER0 64
    171 #define PERF_ATTR_SIZE_VER1 72
    172 #define PERF_ATTR_SIZE_VER2 80
    173 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    174 #define PERF_ATTR_SIZE_VER3 96
    175 struct perf_event_attr {
    176  __u32 type;
    177  __u32 size;
    178 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    179  __u64 config;
    180  union {
    181  __u64 sample_period;
    182  __u64 sample_freq;
    183 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    184  };
    185  __u64 sample_type;
    186  __u64 read_format;
    187  __u64 disabled : 1,
    188 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    189  inherit : 1,
    190  pinned : 1,
    191  exclusive : 1,
    192  exclude_user : 1,
    193 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    194  exclude_kernel : 1,
    195  exclude_hv : 1,
    196  exclude_idle : 1,
    197  mmap : 1,
    198 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    199  comm : 1,
    200  freq : 1,
    201  inherit_stat : 1,
    202  enable_on_exec : 1,
    203 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    204  task : 1,
    205  watermark : 1,
    206  precise_ip : 2,
    207  mmap_data : 1,
    208 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    209  sample_id_all : 1,
    210  exclude_host : 1,
    211  exclude_guest : 1,
    212  exclude_callchain_kernel : 1,
    213 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    214  exclude_callchain_user : 1,
    215  mmap2 : 1,
    216  __reserved_1 : 40;
    217  union {
    218 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    219  __u32 wakeup_events;
    220  __u32 wakeup_watermark;
    221  };
    222  __u32 bp_type;
    223 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    224  union {
    225  __u64 bp_addr;
    226  __u64 config1;
    227  };
    228 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    229  union {
    230  __u64 bp_len;
    231  __u64 config2;
    232  };
    233 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    234  __u64 branch_sample_type;
    235  __u64 sample_regs_user;
    236  __u32 sample_stack_user;
    237  __u32 __reserved_2;
    238 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    239 };
    240 #define perf_flags(attr) (*(&(attr)->read_format + 1))
    241 #define PERF_EVENT_IOC_ENABLE _IO ('$', 0)
    242 #define PERF_EVENT_IOC_DISABLE _IO ('$', 1)
    243 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    244 #define PERF_EVENT_IOC_REFRESH _IO ('$', 2)
    245 #define PERF_EVENT_IOC_RESET _IO ('$', 3)
    246 #define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64)
    247 #define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5)
    248 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    249 #define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *)
    250 #define PERF_EVENT_IOC_ID _IOR('$', 7, __u64 *)
    251 enum perf_event_ioc_flags {
    252  PERF_IOC_FLAG_GROUP = 1U << 0,
    253 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    254 };
    255 struct perf_event_mmap_page {
    256  __u32 version;
    257  __u32 compat_version;
    258 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    259  __u32 lock;
    260  __u32 index;
    261  __s64 offset;
    262  __u64 time_enabled;
    263 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    264  __u64 time_running;
    265  union {
    266  __u64 capabilities;
    267  struct {
    268 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    269  __u64 cap_bit0 : 1,
    270  cap_bit0_is_deprecated : 1,
    271  cap_user_rdpmc : 1,
    272  cap_user_time : 1,
    273 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    274  cap_user_time_zero : 1,
    275  cap_____res : 59;
    276  };
    277  };
    278 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    279  __u16 pmc_width;
    280  __u16 time_shift;
    281  __u32 time_mult;
    282  __u64 time_offset;
    283 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    284  __u64 time_zero;
    285  __u32 size;
    286  __u8 __reserved[118*8+4];
    287  __u64 data_head;
    288 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    289  __u64 data_tail;
    290 };
    291 #define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0)
    292 #define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0)
    293 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    294 #define PERF_RECORD_MISC_KERNEL (1 << 0)
    295 #define PERF_RECORD_MISC_USER (2 << 0)
    296 #define PERF_RECORD_MISC_HYPERVISOR (3 << 0)
    297 #define PERF_RECORD_MISC_GUEST_KERNEL (4 << 0)
    298 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    299 #define PERF_RECORD_MISC_GUEST_USER (5 << 0)
    300 #define PERF_RECORD_MISC_MMAP_DATA (1 << 13)
    301 #define PERF_RECORD_MISC_EXACT_IP (1 << 14)
    302 #define PERF_RECORD_MISC_EXT_RESERVED (1 << 15)
    303 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    304 struct perf_event_header {
    305  __u32 type;
    306  __u16 misc;
    307  __u16 size;
    308 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    309 };
    310 enum perf_event_type {
    311  PERF_RECORD_MMAP = 1,
    312  PERF_RECORD_LOST = 2,
    313 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    314  PERF_RECORD_COMM = 3,
    315  PERF_RECORD_EXIT = 4,
    316  PERF_RECORD_THROTTLE = 5,
    317  PERF_RECORD_UNTHROTTLE = 6,
    318 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    319  PERF_RECORD_FORK = 7,
    320  PERF_RECORD_READ = 8,
    321  PERF_RECORD_SAMPLE = 9,
    322  PERF_RECORD_MMAP2 = 10,
    323 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    324  PERF_RECORD_MAX,
    325 };
    326 #define PERF_MAX_STACK_DEPTH 127
    327 enum perf_callchain_context {
    328 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    329  PERF_CONTEXT_HV = (__u64)-32,
    330  PERF_CONTEXT_KERNEL = (__u64)-128,
    331  PERF_CONTEXT_USER = (__u64)-512,
    332  PERF_CONTEXT_GUEST = (__u64)-2048,
    333 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    334  PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176,
    335  PERF_CONTEXT_GUEST_USER = (__u64)-2560,
    336  PERF_CONTEXT_MAX = (__u64)-4095,
    337 };
    338 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    339 #define PERF_FLAG_FD_NO_GROUP (1U << 0)
    340 #define PERF_FLAG_FD_OUTPUT (1U << 1)
    341 #define PERF_FLAG_PID_CGROUP (1U << 2)
    342 #define PERF_FLAG_FD_CLOEXEC (1U << 3)
    343 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    344 union perf_mem_data_src {
    345  __u64 val;
    346  struct {
    347  __u64 mem_op:5,
    348 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    349  mem_lvl:14,
    350  mem_snoop:5,
    351  mem_lock:2,
    352  mem_dtlb:7,
    353 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    354  mem_rsvd:31;
    355  };
    356 };
    357 #define PERF_MEM_OP_NA 0x01
    358 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    359 #define PERF_MEM_OP_LOAD 0x02
    360 #define PERF_MEM_OP_STORE 0x04
    361 #define PERF_MEM_OP_PFETCH 0x08
    362 #define PERF_MEM_OP_EXEC 0x10
    363 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    364 #define PERF_MEM_OP_SHIFT 0
    365 #define PERF_MEM_LVL_NA 0x01
    366 #define PERF_MEM_LVL_HIT 0x02
    367 #define PERF_MEM_LVL_MISS 0x04
    368 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    369 #define PERF_MEM_LVL_L1 0x08
    370 #define PERF_MEM_LVL_LFB 0x10
    371 #define PERF_MEM_LVL_L2 0x20
    372 #define PERF_MEM_LVL_L3 0x40
    373 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    374 #define PERF_MEM_LVL_LOC_RAM 0x80
    375 #define PERF_MEM_LVL_REM_RAM1 0x100
    376 #define PERF_MEM_LVL_REM_RAM2 0x200
    377 #define PERF_MEM_LVL_REM_CCE1 0x400
    378 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    379 #define PERF_MEM_LVL_REM_CCE2 0x800
    380 #define PERF_MEM_LVL_IO 0x1000
    381 #define PERF_MEM_LVL_UNC 0x2000
    382 #define PERF_MEM_LVL_SHIFT 5
    383 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    384 #define PERF_MEM_SNOOP_NA 0x01
    385 #define PERF_MEM_SNOOP_NONE 0x02
    386 #define PERF_MEM_SNOOP_HIT 0x04
    387 #define PERF_MEM_SNOOP_MISS 0x08
    388 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    389 #define PERF_MEM_SNOOP_HITM 0x10
    390 #define PERF_MEM_SNOOP_SHIFT 19
    391 #define PERF_MEM_LOCK_NA 0x01
    392 #define PERF_MEM_LOCK_LOCKED 0x02
    393 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    394 #define PERF_MEM_LOCK_SHIFT 24
    395 #define PERF_MEM_TLB_NA 0x01
    396 #define PERF_MEM_TLB_HIT 0x02
    397 #define PERF_MEM_TLB_MISS 0x04
    398 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    399 #define PERF_MEM_TLB_L1 0x08
    400 #define PERF_MEM_TLB_L2 0x10
    401 #define PERF_MEM_TLB_WK 0x20
    402 #define PERF_MEM_TLB_OS 0x40
    403 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    404 #define PERF_MEM_TLB_SHIFT 26
    405 #define PERF_MEM_S(a, s)   (((__u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT)
    406 struct perf_branch_entry {
    407  __u64 from;
    408 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    409  __u64 to;
    410  __u64 mispred:1,
    411  predicted:1,
    412  in_tx:1,
    413 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    414  abort:1,
    415  reserved:60;
    416 };
    417 #endif
    418 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
    419