Lines Matching defs:IP
279 MachineBasicBlock::iterator IP = EntryBB.begin(); // Insert Point
280 BuildMI(EntryBB, IP, dl, TII.get(PPC::MFVRSAVE), InVRSAVE);
281 BuildMI(EntryBB, IP, dl, TII.get(PPC::UPDATE_VRSAVE),
283 BuildMI(EntryBB, IP, dl, TII.get(PPC::MTVRSAVE)).addReg(UpdatedVRSAVE);
288 IP = BB->end(); --IP;
292 MachineBasicBlock::iterator I2 = IP;
294 IP = I2;
297 BuildMI(*BB, IP, dl, TII.get(PPC::MTVRSAVE)).addReg(InVRSAVE);
1126 auto IP = (I == BitGroups.begin()) ?
1128 if (I->Repl32 && IP->Repl32 && I->V == IP->V && I->RLAmt == IP->RLAmt &&
1129 I->StartIdx == (IP->EndIdx + 1) % 64 && I != IP) {
1135 IP->StartIdx << ", " << IP->EndIdx << "]\n");
1137 IP->EndIdx = I->EndIdx;
1138 IP->Repl32CR = IP->Repl32CR || I->Repl32CR;
1139 IP->Repl32Coalesced = true;
1154 if (IP->Repl32 && IN->Repl32 && I->V == IP->V && I->V == IN->V &&
1155 (I->RLAmt % 32) == IP->RLAmt && (I->RLAmt % 32) == IN->RLAmt &&
1156 IP->EndIdx == 31 && IN->StartIdx == 0 && I != IP &&
1163 IP->StartIdx << ", " << IP->EndIdx << "] and [" <<
1166 if (IP == IN) {
1170 IP->StartIdx = 31;
1171 IP->EndIdx = 30;
1172 IP->Repl32CR = IP->Repl32CR || I->RLAmt >= 32;
1173 IP->Repl32Coalesced = true;
1179 IP->EndIdx = IN->EndIdx;
1180 IP->Repl32CR = IP->Repl32CR || IN->Repl32CR || I->RLAmt >= 32;
1181 IP->Repl32Coalesced = true;
