| /external/llvm/bindings/python/llvm/tests/ |
| test_bitreader.py | 2 from ..core import OpCode
|
| test_core.py | 7 from ..core import OpCode
117 inst_list = [('arg1', OpCode.ExtractValue),
118 ('arg2', OpCode.ExtractValue),
119 ('', OpCode.Call),
120 ('', OpCode.Ret)]
127 self.assertEqual(inst.opcode, inst_list[i][1])
139 self.assertEqual(inst.opcode, inst_list[i][1])
|
| /external/llvm/bindings/python/llvm/ |
| bit_reader.py | 8 from .core import OpCode
|
| core.py | 24 "OpCode",
82 class OpCode(LLVMEnumeration):
83 """Represents an individual OpCode enumeration."""
88 super(OpCode, self).__init__(name, value)
416 def opcode(self): member in class:Instruction
417 return OpCode.from_value(lib.LLVMGetInstructionOpcode(self))
597 (OpCode, enumerations.OpCodes),
|
| /external/llvm/lib/Target/XCore/ |
| XCoreLowerThreadLocal.cpp | 80 unsigned OpCode = CE->getOpcode();
81 switch (OpCode) {
105 Builder.CreateBinOp((Instruction::BinaryOps)OpCode,
121 Builder.CreateCast((Instruction::CastOps)OpCode,
|
| XCoreRegisterInfo.cpp | 89 llvm_unreachable("Unexpected Opcode");
125 llvm_unreachable("Unexpected Opcode");
158 llvm_unreachable("Unexpected Opcode");
169 unsigned OpCode = MI.getOpcode();
172 if (OpCode==XCore::STWFI) {
182 switch (OpCode) {
202 llvm_unreachable("Unexpected Opcode");
|
| /external/nanohttpd/websocket/src/main/java/fi/iki/elonen/ |
| WebSocketFrame.java | 17 private OpCode opCode;
26 private WebSocketFrame(OpCode opCode, boolean fin) {
27 setOpCode(opCode);
31 public WebSocketFrame(OpCode opCode, boolean fin, byte[] payload, byte[] maskingKey) {
32 this(opCode, fin);
37 public WebSocketFrame(OpCode opCode, boolean fin, byte[] payload)
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 327 unsigned Opcode;
329 default: Opcode = PPC::NOP; break;
330 case PPC::DIR_PWR6: Opcode = PPC::NOP_GT_PWR6; break;
331 case PPC::DIR_PWR7: Opcode = PPC::NOP_GT_PWR7; break;
332 case PPC::DIR_PWR8: Opcode = PPC::NOP_GT_PWR7; break; /* FIXME: Update when P8 InstrScheduling model is ready */
336 BuildMI(MBB, MI, DL, get(Opcode));
658 unsigned OpCode = Is64Bit ? PPC::ISEL8 : PPC::ISEL;
694 BuildMI(MBB, MI, dl, get(OpCode), DestReg)
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 613 int OpCode = doesNotReturn ? HexagonISD::CALLv3nr : HexagonISD::CALLv3;
614 Chain = DAG.getNode(OpCode, dl, NodeTys, Ops);
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| IndVarSimplify.cpp | 775 unsigned OpCode) const;
814 unsigned Opcode = DU.NarrowUse->getOpcode();
815 switch (Opcode) {
[all...] |
| /external/mesa3d/src/mesa/main/ |
| dlist.c | 105 struct gl_list_instruction Opcode[MAX_DLIST_EXT_OPCODES];
493 } OpCode;
510 OpCode opcode; member in union:gl_dlist_node
522 void *next; /* If prev node's opcode==OPCODE_CONTINUE */
577 dlist->Head[0].opcode = OPCODE_END_OF_LIST;
593 /** Is the given opcode an extension code? */
595 is_ext_opcode(OpCode opcode)
597 return (opcode >= OPCODE_EXT_0)
651 const OpCode opcode = n[0].opcode; local
7692 const OpCode opcode = n[0].opcode; local
10703 const OpCode opcode = n[0].opcode; local
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
