/art/disassembler/ |
disassembler_arm.cc | 677 uint32_t imm5 = ((imm3 << 2) | imm2); local 768 bool noShift = (imm5 == 0 && shift_type != 0x3); 776 if (imm5 == 0) { 784 args << StringPrintf(" #%d", (0 != imm5 || 0 == shift_type) ? imm5 : 32); 1573 uint16_t imm5 = (instr >> 6) & 0x1F; local 1583 args << Rd << ", " << rm << ", #" << imm5; local 1721 uint16_t imm5 = (instr >> 6) & 0x1F; local 1739 args << Rt << ", [" << Rn << ", #" << imm5 << "]"; local 1776 uint16_t imm5 = (instr >> 3) & 0x1F; local 1863 uint16_t imm5 = (instr >> 6) & 0x1F; local [all...] |
/art/compiler/utils/arm/ |
assembler_thumb2.cc | 1322 uint16_t imm5 = (offset >> 1) & 31U \/* 0b11111 *\/; local [all...] |
/external/valgrind/VEX/priv/ |
host_tilegx_defs.h | 196 /* --------- Reg or imm5 operands --------- */ 198 TILEGXri5_I5 = 7, /* imm5, 1 .. 31 only (no zero!) */ 206 UInt imm5; member in struct:__anon19856::__anon19857::__anon19858 214 extern TILEGXRI5 *TILEGXRI5_I5 ( UInt imm5 );
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host_arm_defs.c | 478 /* --------- Reg or imm5 operands --------- */ 480 ARMRI5* ARMRI5_I5 ( UInt imm5 ) { 483 ri5->ARMri5.I5.imm5 = imm5; 484 vassert(imm5 > 0 && imm5 <= 31); // zero is not allowed 497 vex_printf("%u", ri5->ARMri5.I5.imm5); 2785 UInt imm5 = ri->ARMri5.I5.imm5; local [all...] |
host_arm_defs.h | 262 /* --------- Reg or imm5 operands --------- */ 265 ARMri5_I5=9, /* imm5, 1 .. 31 only (no zero!) */ 275 UInt imm5; member in struct:__anon19540::__anon19541::__anon19542 284 extern ARMRI5* ARMRI5_I5 ( UInt imm5 ); [all...] |
guest_arm_toIR.c | 9066 UInt regD = 99, regN = 99, regM = 99, imm5 = 99, shift_type = 99; local 9126 UInt regD = 99, regN = 99, shift_type = 99, imm5 = 99, sat_imm = 99; local 9184 UInt regD = 99, regN = 99, shift_type = 99, imm5 = 99, sat_imm = 99; local 14465 UInt imm5 = INSN(11,7); local 15096 UInt imm5 = (insn >> 7) & 0x1F; \/* 11:7 *\/ local 16806 UInt imm5 = INSN(11,7); local 16861 UInt imm5 = INSN(11,7); local 17082 UInt imm5 = INSN(11,7); local 17186 UInt imm5 = INSN(11,7); local 18854 UInt imm5 = INSN0(10,6); local 18879 UInt imm5 = INSN0(10,6); local 18904 UInt imm5 = INSN0(10,6); local 19046 UInt imm5 = INSN0(10,6); local 19606 UInt imm5 = (INSN1(14,12) << 2) | INSN1(7,6); local 19686 UInt imm5 = (INSN1(14,12) << 2) | INSN1(7,6); local 19768 UInt imm5 = (INSN1(14,12) << 2) | INSN1(7,6); local 19856 UInt imm5 = (INSN1(14,12) << 2) | INSN1(7,6); local 19897 UInt imm5 = (INSN1(14,12) << 2) | INSN1(7,6); local 19937 UInt imm5 = (INSN1(14,12) << 2) | INSN1(7,6); local [all...] |
guest_arm64_toIR.c | 3195 UInt imm5 = INSN(20,16); local 8554 UInt imm5 = INSN(20,16); local 8992 UInt imm5 = INSN(20,16); local 13323 UInt imm5 = INSN(9,5); local [all...] |
/external/vixl/src/vixl/a64/ |
disasm-a64.cc | 3075 int imm5 = instr->ImmNEON5(); local [all...] |
simulator-a64.cc | 2962 int imm5 = instr->ImmNEON5(); local 3671 int imm5 = instr->ImmNEON5(); local [all...] |
/external/v8/src/arm/ |
assembler-arm.cc | 2860 int imm5 = 32 - fraction_bits; local [all...] |
/external/lldb/source/Plugins/Instruction/ARM/ |
EmulateInstructionARM.cpp | 3191 uint32_t imm5; \/\/ encoding for the shift amount local 4819 uint32_t imm5 = Bits32 (opcode, 11, 7); local 6015 uint32_t imm5 = Bits32 (opcode, 11, 7); local 6427 uint32_t imm5 = Bits32 (opcode, 11, 7); local [all...] |