1 2 /*---------------------------------------------------------------*/ 3 /*--- begin ir_defs.c ---*/ 4 /*---------------------------------------------------------------*/ 5 6 /* 7 This file is part of Valgrind, a dynamic binary instrumentation 8 framework. 9 10 Copyright (C) 2004-2013 OpenWorks LLP 11 info (at) open-works.net 12 13 This program is free software; you can redistribute it and/or 14 modify it under the terms of the GNU General Public License as 15 published by the Free Software Foundation; either version 2 of the 16 License, or (at your option) any later version. 17 18 This program is distributed in the hope that it will be useful, but 19 WITHOUT ANY WARRANTY; without even the implied warranty of 20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 21 General Public License for more details. 22 23 You should have received a copy of the GNU General Public License 24 along with this program; if not, write to the Free Software 25 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 26 02110-1301, USA. 27 28 The GNU General Public License is contained in the file COPYING. 29 30 Neither the names of the U.S. Department of Energy nor the 31 University of California nor the names of its contributors may be 32 used to endorse or promote products derived from this software 33 without prior written permission. 34 */ 35 36 #include "libvex_basictypes.h" 37 #include "libvex_ir.h" 38 #include "libvex.h" 39 40 #include "main_util.h" 41 42 43 /*---------------------------------------------------------------*/ 44 /*--- Printing the IR ---*/ 45 /*---------------------------------------------------------------*/ 46 47 void ppIRType ( IRType ty ) 48 { 49 switch (ty) { 50 case Ity_INVALID: vex_printf("Ity_INVALID"); break; 51 case Ity_I1: vex_printf( "I1"); break; 52 case Ity_I8: vex_printf( "I8"); break; 53 case Ity_I16: vex_printf( "I16"); break; 54 case Ity_I32: vex_printf( "I32"); break; 55 case Ity_I64: vex_printf( "I64"); break; 56 case Ity_I128: vex_printf( "I128"); break; 57 case Ity_F16: vex_printf( "F16"); break; 58 case Ity_F32: vex_printf( "F32"); break; 59 case Ity_F64: vex_printf( "F64"); break; 60 case Ity_F128: vex_printf( "F128"); break; 61 case Ity_D32: vex_printf( "D32"); break; 62 case Ity_D64: vex_printf( "D64"); break; 63 case Ity_D128: vex_printf( "D128"); break; 64 case Ity_V128: vex_printf( "V128"); break; 65 case Ity_V256: vex_printf( "V256"); break; 66 default: vex_printf("ty = 0x%x\n", (Int)ty); 67 vpanic("ppIRType"); 68 } 69 } 70 71 void ppIRConst ( const IRConst* con ) 72 { 73 union { ULong i64; Double f64; UInt i32; Float f32; } u; 74 vassert(sizeof(ULong) == sizeof(Double)); 75 switch (con->tag) { 76 case Ico_U1: vex_printf( "%d:I1", con->Ico.U1 ? 1 : 0); break; 77 case Ico_U8: vex_printf( "0x%x:I8", (UInt)(con->Ico.U8)); break; 78 case Ico_U16: vex_printf( "0x%x:I16", (UInt)(con->Ico.U16)); break; 79 case Ico_U32: vex_printf( "0x%x:I32", (UInt)(con->Ico.U32)); break; 80 case Ico_U64: vex_printf( "0x%llx:I64", (ULong)(con->Ico.U64)); break; 81 case Ico_F32: u.f32 = con->Ico.F32; 82 vex_printf( "F32{0x%x}", u.i32); 83 break; 84 case Ico_F32i: vex_printf( "F32i{0x%x}", con->Ico.F32i); break; 85 case Ico_F64: u.f64 = con->Ico.F64; 86 vex_printf( "F64{0x%llx}", u.i64); 87 break; 88 case Ico_F64i: vex_printf( "F64i{0x%llx}", con->Ico.F64i); break; 89 case Ico_V128: vex_printf( "V128{0x%04x}", (UInt)(con->Ico.V128)); break; 90 case Ico_V256: vex_printf( "V256{0x%08x}", con->Ico.V256); break; 91 default: vpanic("ppIRConst"); 92 } 93 } 94 95 void ppIRCallee ( const IRCallee* ce ) 96 { 97 vex_printf("%s", ce->name); 98 if (ce->regparms > 0) 99 vex_printf("[rp=%d]", ce->regparms); 100 if (ce->mcx_mask > 0) 101 vex_printf("[mcx=0x%x]", ce->mcx_mask); 102 vex_printf("{%p}", (void*)ce->addr); 103 } 104 105 void ppIRRegArray ( const IRRegArray* arr ) 106 { 107 vex_printf("(%d:%dx", arr->base, arr->nElems); 108 ppIRType(arr->elemTy); 109 vex_printf(")"); 110 } 111 112 void ppIRTemp ( IRTemp tmp ) 113 { 114 if (tmp == IRTemp_INVALID) 115 vex_printf("IRTemp_INVALID"); 116 else 117 vex_printf( "t%d", (Int)tmp); 118 } 119 120 void ppIROp ( IROp op ) 121 { 122 const HChar* str = NULL; 123 IROp base; 124 switch (op) { 125 case Iop_Add8 ... Iop_Add64: 126 str = "Add"; base = Iop_Add8; break; 127 case Iop_Sub8 ... Iop_Sub64: 128 str = "Sub"; base = Iop_Sub8; break; 129 case Iop_Mul8 ... Iop_Mul64: 130 str = "Mul"; base = Iop_Mul8; break; 131 case Iop_Or8 ... Iop_Or64: 132 str = "Or"; base = Iop_Or8; break; 133 case Iop_And8 ... Iop_And64: 134 str = "And"; base = Iop_And8; break; 135 case Iop_Xor8 ... Iop_Xor64: 136 str = "Xor"; base = Iop_Xor8; break; 137 case Iop_Shl8 ... Iop_Shl64: 138 str = "Shl"; base = Iop_Shl8; break; 139 case Iop_Shr8 ... Iop_Shr64: 140 str = "Shr"; base = Iop_Shr8; break; 141 case Iop_Sar8 ... Iop_Sar64: 142 str = "Sar"; base = Iop_Sar8; break; 143 case Iop_CmpEQ8 ... Iop_CmpEQ64: 144 str = "CmpEQ"; base = Iop_CmpEQ8; break; 145 case Iop_CmpNE8 ... Iop_CmpNE64: 146 str = "CmpNE"; base = Iop_CmpNE8; break; 147 case Iop_CasCmpEQ8 ... Iop_CasCmpEQ64: 148 str = "CasCmpEQ"; base = Iop_CasCmpEQ8; break; 149 case Iop_CasCmpNE8 ... Iop_CasCmpNE64: 150 str = "CasCmpNE"; base = Iop_CasCmpNE8; break; 151 case Iop_ExpCmpNE8 ... Iop_ExpCmpNE64: 152 str = "ExpCmpNE"; base = Iop_ExpCmpNE8; break; 153 case Iop_Not8 ... Iop_Not64: 154 str = "Not"; base = Iop_Not8; break; 155 /* other cases must explicitly "return;" */ 156 case Iop_8Uto16: vex_printf("8Uto16"); return; 157 case Iop_8Uto32: vex_printf("8Uto32"); return; 158 case Iop_16Uto32: vex_printf("16Uto32"); return; 159 case Iop_8Sto16: vex_printf("8Sto16"); return; 160 case Iop_8Sto32: vex_printf("8Sto32"); return; 161 case Iop_16Sto32: vex_printf("16Sto32"); return; 162 case Iop_32Sto64: vex_printf("32Sto64"); return; 163 case Iop_32Uto64: vex_printf("32Uto64"); return; 164 case Iop_32to8: vex_printf("32to8"); return; 165 case Iop_16Uto64: vex_printf("16Uto64"); return; 166 case Iop_16Sto64: vex_printf("16Sto64"); return; 167 case Iop_8Uto64: vex_printf("8Uto64"); return; 168 case Iop_8Sto64: vex_printf("8Sto64"); return; 169 case Iop_64to16: vex_printf("64to16"); return; 170 case Iop_64to8: vex_printf("64to8"); return; 171 172 case Iop_Not1: vex_printf("Not1"); return; 173 case Iop_32to1: vex_printf("32to1"); return; 174 case Iop_64to1: vex_printf("64to1"); return; 175 case Iop_1Uto8: vex_printf("1Uto8"); return; 176 case Iop_1Uto32: vex_printf("1Uto32"); return; 177 case Iop_1Uto64: vex_printf("1Uto64"); return; 178 case Iop_1Sto8: vex_printf("1Sto8"); return; 179 case Iop_1Sto16: vex_printf("1Sto16"); return; 180 case Iop_1Sto32: vex_printf("1Sto32"); return; 181 case Iop_1Sto64: vex_printf("1Sto64"); return; 182 183 case Iop_MullS8: vex_printf("MullS8"); return; 184 case Iop_MullS16: vex_printf("MullS16"); return; 185 case Iop_MullS32: vex_printf("MullS32"); return; 186 case Iop_MullS64: vex_printf("MullS64"); return; 187 case Iop_MullU8: vex_printf("MullU8"); return; 188 case Iop_MullU16: vex_printf("MullU16"); return; 189 case Iop_MullU32: vex_printf("MullU32"); return; 190 case Iop_MullU64: vex_printf("MullU64"); return; 191 192 case Iop_Clz64: vex_printf("Clz64"); return; 193 case Iop_Clz32: vex_printf("Clz32"); return; 194 case Iop_Ctz64: vex_printf("Ctz64"); return; 195 case Iop_Ctz32: vex_printf("Ctz32"); return; 196 197 case Iop_CmpLT32S: vex_printf("CmpLT32S"); return; 198 case Iop_CmpLE32S: vex_printf("CmpLE32S"); return; 199 case Iop_CmpLT32U: vex_printf("CmpLT32U"); return; 200 case Iop_CmpLE32U: vex_printf("CmpLE32U"); return; 201 202 case Iop_CmpLT64S: vex_printf("CmpLT64S"); return; 203 case Iop_CmpLE64S: vex_printf("CmpLE64S"); return; 204 case Iop_CmpLT64U: vex_printf("CmpLT64U"); return; 205 case Iop_CmpLE64U: vex_printf("CmpLE64U"); return; 206 207 case Iop_CmpNEZ8: vex_printf("CmpNEZ8"); return; 208 case Iop_CmpNEZ16: vex_printf("CmpNEZ16"); return; 209 case Iop_CmpNEZ32: vex_printf("CmpNEZ32"); return; 210 case Iop_CmpNEZ64: vex_printf("CmpNEZ64"); return; 211 212 case Iop_CmpwNEZ32: vex_printf("CmpwNEZ32"); return; 213 case Iop_CmpwNEZ64: vex_printf("CmpwNEZ64"); return; 214 215 case Iop_Left8: vex_printf("Left8"); return; 216 case Iop_Left16: vex_printf("Left16"); return; 217 case Iop_Left32: vex_printf("Left32"); return; 218 case Iop_Left64: vex_printf("Left64"); return; 219 case Iop_Max32U: vex_printf("Max32U"); return; 220 221 case Iop_CmpORD32U: vex_printf("CmpORD32U"); return; 222 case Iop_CmpORD32S: vex_printf("CmpORD32S"); return; 223 224 case Iop_CmpORD64U: vex_printf("CmpORD64U"); return; 225 case Iop_CmpORD64S: vex_printf("CmpORD64S"); return; 226 227 case Iop_DivU32: vex_printf("DivU32"); return; 228 case Iop_DivS32: vex_printf("DivS32"); return; 229 case Iop_DivU64: vex_printf("DivU64"); return; 230 case Iop_DivS64: vex_printf("DivS64"); return; 231 case Iop_DivU64E: vex_printf("DivU64E"); return; 232 case Iop_DivS64E: vex_printf("DivS64E"); return; 233 case Iop_DivU32E: vex_printf("DivU32E"); return; 234 case Iop_DivS32E: vex_printf("DivS32E"); return; 235 236 case Iop_DivModU64to32: vex_printf("DivModU64to32"); return; 237 case Iop_DivModS64to32: vex_printf("DivModS64to32"); return; 238 239 case Iop_DivModU128to64: vex_printf("DivModU128to64"); return; 240 case Iop_DivModS128to64: vex_printf("DivModS128to64"); return; 241 242 case Iop_DivModS64to64: vex_printf("DivModS64to64"); return; 243 244 case Iop_16HIto8: vex_printf("16HIto8"); return; 245 case Iop_16to8: vex_printf("16to8"); return; 246 case Iop_8HLto16: vex_printf("8HLto16"); return; 247 248 case Iop_32HIto16: vex_printf("32HIto16"); return; 249 case Iop_32to16: vex_printf("32to16"); return; 250 case Iop_16HLto32: vex_printf("16HLto32"); return; 251 252 case Iop_64HIto32: vex_printf("64HIto32"); return; 253 case Iop_64to32: vex_printf("64to32"); return; 254 case Iop_32HLto64: vex_printf("32HLto64"); return; 255 256 case Iop_128HIto64: vex_printf("128HIto64"); return; 257 case Iop_128to64: vex_printf("128to64"); return; 258 case Iop_64HLto128: vex_printf("64HLto128"); return; 259 260 case Iop_CmpF32: vex_printf("CmpF32"); return; 261 case Iop_F32toI32S: vex_printf("F32toI32S"); return; 262 case Iop_F32toI64S: vex_printf("F32toI64S"); return; 263 case Iop_I32StoF32: vex_printf("I32StoF32"); return; 264 case Iop_I64StoF32: vex_printf("I64StoF32"); return; 265 266 case Iop_AddF64: vex_printf("AddF64"); return; 267 case Iop_SubF64: vex_printf("SubF64"); return; 268 case Iop_MulF64: vex_printf("MulF64"); return; 269 case Iop_DivF64: vex_printf("DivF64"); return; 270 case Iop_AddF64r32: vex_printf("AddF64r32"); return; 271 case Iop_SubF64r32: vex_printf("SubF64r32"); return; 272 case Iop_MulF64r32: vex_printf("MulF64r32"); return; 273 case Iop_DivF64r32: vex_printf("DivF64r32"); return; 274 case Iop_AddF32: vex_printf("AddF32"); return; 275 case Iop_SubF32: vex_printf("SubF32"); return; 276 case Iop_MulF32: vex_printf("MulF32"); return; 277 case Iop_DivF32: vex_printf("DivF32"); return; 278 279 /* 128 bit floating point */ 280 case Iop_AddF128: vex_printf("AddF128"); return; 281 case Iop_SubF128: vex_printf("SubF128"); return; 282 case Iop_MulF128: vex_printf("MulF128"); return; 283 case Iop_DivF128: vex_printf("DivF128"); return; 284 case Iop_AbsF128: vex_printf("AbsF128"); return; 285 case Iop_NegF128: vex_printf("NegF128"); return; 286 case Iop_SqrtF128: vex_printf("SqrtF128"); return; 287 case Iop_CmpF128: vex_printf("CmpF128"); return; 288 289 case Iop_F64HLtoF128: vex_printf("F64HLtoF128"); return; 290 case Iop_F128HItoF64: vex_printf("F128HItoF64"); return; 291 case Iop_F128LOtoF64: vex_printf("F128LOtoF64"); return; 292 case Iop_I32StoF128: vex_printf("I32StoF128"); return; 293 case Iop_I64StoF128: vex_printf("I64StoF128"); return; 294 case Iop_I32UtoF128: vex_printf("I32UtoF128"); return; 295 case Iop_I64UtoF128: vex_printf("I64UtoF128"); return; 296 case Iop_F128toI32S: vex_printf("F128toI32S"); return; 297 case Iop_F128toI64S: vex_printf("F128toI64S"); return; 298 case Iop_F128toI32U: vex_printf("F128toI32U"); return; 299 case Iop_F128toI64U: vex_printf("F128toI64U"); return; 300 case Iop_F32toF128: vex_printf("F32toF128"); return; 301 case Iop_F64toF128: vex_printf("F64toF128"); return; 302 case Iop_F128toF64: vex_printf("F128toF64"); return; 303 case Iop_F128toF32: vex_printf("F128toF32"); return; 304 305 /* s390 specific */ 306 case Iop_MAddF32: vex_printf("s390_MAddF32"); return; 307 case Iop_MSubF32: vex_printf("s390_MSubF32"); return; 308 309 case Iop_ScaleF64: vex_printf("ScaleF64"); return; 310 case Iop_AtanF64: vex_printf("AtanF64"); return; 311 case Iop_Yl2xF64: vex_printf("Yl2xF64"); return; 312 case Iop_Yl2xp1F64: vex_printf("Yl2xp1F64"); return; 313 case Iop_PRemF64: vex_printf("PRemF64"); return; 314 case Iop_PRemC3210F64: vex_printf("PRemC3210F64"); return; 315 case Iop_PRem1F64: vex_printf("PRem1F64"); return; 316 case Iop_PRem1C3210F64: vex_printf("PRem1C3210F64"); return; 317 case Iop_NegF64: vex_printf("NegF64"); return; 318 case Iop_AbsF64: vex_printf("AbsF64"); return; 319 case Iop_NegF32: vex_printf("NegF32"); return; 320 case Iop_AbsF32: vex_printf("AbsF32"); return; 321 case Iop_SqrtF64: vex_printf("SqrtF64"); return; 322 case Iop_SqrtF32: vex_printf("SqrtF32"); return; 323 case Iop_SinF64: vex_printf("SinF64"); return; 324 case Iop_CosF64: vex_printf("CosF64"); return; 325 case Iop_TanF64: vex_printf("TanF64"); return; 326 case Iop_2xm1F64: vex_printf("2xm1F64"); return; 327 328 case Iop_MAddF64: vex_printf("MAddF64"); return; 329 case Iop_MSubF64: vex_printf("MSubF64"); return; 330 case Iop_MAddF64r32: vex_printf("MAddF64r32"); return; 331 case Iop_MSubF64r32: vex_printf("MSubF64r32"); return; 332 333 case Iop_RSqrtEst5GoodF64: vex_printf("RSqrtEst5GoodF64"); return; 334 case Iop_RoundF64toF64_NEAREST: vex_printf("RoundF64toF64_NEAREST"); return; 335 case Iop_RoundF64toF64_NegINF: vex_printf("RoundF64toF64_NegINF"); return; 336 case Iop_RoundF64toF64_PosINF: vex_printf("RoundF64toF64_PosINF"); return; 337 case Iop_RoundF64toF64_ZERO: vex_printf("RoundF64toF64_ZERO"); return; 338 339 case Iop_TruncF64asF32: vex_printf("TruncF64asF32"); return; 340 341 case Iop_RecpExpF64: vex_printf("RecpExpF64"); return; 342 case Iop_RecpExpF32: vex_printf("RecpExpF32"); return; 343 344 case Iop_F16toF64: vex_printf("F16toF64"); return; 345 case Iop_F64toF16: vex_printf("F64toF16"); return; 346 case Iop_F16toF32: vex_printf("F16toF32"); return; 347 case Iop_F32toF16: vex_printf("F32toF16"); return; 348 349 case Iop_QAdd32S: vex_printf("QAdd32S"); return; 350 case Iop_QSub32S: vex_printf("QSub32S"); return; 351 case Iop_Add16x2: vex_printf("Add16x2"); return; 352 case Iop_Sub16x2: vex_printf("Sub16x2"); return; 353 case Iop_QAdd16Sx2: vex_printf("QAdd16Sx2"); return; 354 case Iop_QAdd16Ux2: vex_printf("QAdd16Ux2"); return; 355 case Iop_QSub16Sx2: vex_printf("QSub16Sx2"); return; 356 case Iop_QSub16Ux2: vex_printf("QSub16Ux2"); return; 357 case Iop_HAdd16Ux2: vex_printf("HAdd16Ux2"); return; 358 case Iop_HAdd16Sx2: vex_printf("HAdd16Sx2"); return; 359 case Iop_HSub16Ux2: vex_printf("HSub16Ux2"); return; 360 case Iop_HSub16Sx2: vex_printf("HSub16Sx2"); return; 361 362 case Iop_Add8x4: vex_printf("Add8x4"); return; 363 case Iop_Sub8x4: vex_printf("Sub8x4"); return; 364 case Iop_QAdd8Sx4: vex_printf("QAdd8Sx4"); return; 365 case Iop_QAdd8Ux4: vex_printf("QAdd8Ux4"); return; 366 case Iop_QSub8Sx4: vex_printf("QSub8Sx4"); return; 367 case Iop_QSub8Ux4: vex_printf("QSub8Ux4"); return; 368 case Iop_HAdd8Ux4: vex_printf("HAdd8Ux4"); return; 369 case Iop_HAdd8Sx4: vex_printf("HAdd8Sx4"); return; 370 case Iop_HSub8Ux4: vex_printf("HSub8Ux4"); return; 371 case Iop_HSub8Sx4: vex_printf("HSub8Sx4"); return; 372 case Iop_Sad8Ux4: vex_printf("Sad8Ux4"); return; 373 374 case Iop_CmpNEZ16x2: vex_printf("CmpNEZ16x2"); return; 375 case Iop_CmpNEZ8x4: vex_printf("CmpNEZ8x4"); return; 376 377 case Iop_CmpF64: vex_printf("CmpF64"); return; 378 379 case Iop_F64toI16S: vex_printf("F64toI16S"); return; 380 case Iop_F64toI32S: vex_printf("F64toI32S"); return; 381 case Iop_F64toI64S: vex_printf("F64toI64S"); return; 382 case Iop_F64toI64U: vex_printf("F64toI64U"); return; 383 case Iop_F32toI32U: vex_printf("F32toI32U"); return; 384 case Iop_F32toI64U: vex_printf("F32toI64U"); return; 385 386 case Iop_F64toI32U: vex_printf("F64toI32U"); return; 387 388 case Iop_I32StoF64: vex_printf("I32StoF64"); return; 389 case Iop_I64StoF64: vex_printf("I64StoF64"); return; 390 case Iop_I64UtoF64: vex_printf("I64UtoF64"); return; 391 case Iop_I32UtoF32: vex_printf("I32UtoF32"); return; 392 case Iop_I64UtoF32: vex_printf("I64UtoF32"); return; 393 394 case Iop_I32UtoF64: vex_printf("I32UtoF64"); return; 395 396 case Iop_F32toF64: vex_printf("F32toF64"); return; 397 case Iop_F64toF32: vex_printf("F64toF32"); return; 398 399 case Iop_RoundF64toInt: vex_printf("RoundF64toInt"); return; 400 case Iop_RoundF32toInt: vex_printf("RoundF32toInt"); return; 401 case Iop_RoundF64toF32: vex_printf("RoundF64toF32"); return; 402 403 case Iop_ReinterpF64asI64: vex_printf("ReinterpF64asI64"); return; 404 case Iop_ReinterpI64asF64: vex_printf("ReinterpI64asF64"); return; 405 case Iop_ReinterpF32asI32: vex_printf("ReinterpF32asI32"); return; 406 case Iop_ReinterpI32asF32: vex_printf("ReinterpI32asF32"); return; 407 408 case Iop_I32UtoFx4: vex_printf("I32UtoFx4"); return; 409 case Iop_I32StoFx4: vex_printf("I32StoFx4"); return; 410 411 case Iop_F32toF16x4: vex_printf("F32toF16x4"); return; 412 case Iop_F16toF32x4: vex_printf("F16toF32x4"); return; 413 414 case Iop_RSqrtEst32Fx4: vex_printf("RSqrtEst32Fx4"); return; 415 case Iop_RSqrtEst32Ux4: vex_printf("RSqrtEst32Ux4"); return; 416 case Iop_RSqrtEst32Fx2: vex_printf("RSqrtEst32Fx2"); return; 417 case Iop_RSqrtEst32Ux2: vex_printf("RSqrtEst32Ux2"); return; 418 419 case Iop_QFtoI32Ux4_RZ: vex_printf("QFtoI32Ux4_RZ"); return; 420 case Iop_QFtoI32Sx4_RZ: vex_printf("QFtoI32Sx4_RZ"); return; 421 422 case Iop_FtoI32Ux4_RZ: vex_printf("FtoI32Ux4_RZ"); return; 423 case Iop_FtoI32Sx4_RZ: vex_printf("FtoI32Sx4_RZ"); return; 424 425 case Iop_I32UtoFx2: vex_printf("I32UtoFx2"); return; 426 case Iop_I32StoFx2: vex_printf("I32StoFx2"); return; 427 428 case Iop_FtoI32Ux2_RZ: vex_printf("FtoI32Ux2_RZ"); return; 429 case Iop_FtoI32Sx2_RZ: vex_printf("FtoI32Sx2_RZ"); return; 430 431 case Iop_RoundF32x4_RM: vex_printf("RoundF32x4_RM"); return; 432 case Iop_RoundF32x4_RP: vex_printf("RoundF32x4_RP"); return; 433 case Iop_RoundF32x4_RN: vex_printf("RoundF32x4_RN"); return; 434 case Iop_RoundF32x4_RZ: vex_printf("RoundF32x4_RZ"); return; 435 436 case Iop_Abs8x8: vex_printf("Abs8x8"); return; 437 case Iop_Abs16x4: vex_printf("Abs16x4"); return; 438 case Iop_Abs32x2: vex_printf("Abs32x2"); return; 439 case Iop_Add8x8: vex_printf("Add8x8"); return; 440 case Iop_Add16x4: vex_printf("Add16x4"); return; 441 case Iop_Add32x2: vex_printf("Add32x2"); return; 442 case Iop_QAdd8Ux8: vex_printf("QAdd8Ux8"); return; 443 case Iop_QAdd16Ux4: vex_printf("QAdd16Ux4"); return; 444 case Iop_QAdd32Ux2: vex_printf("QAdd32Ux2"); return; 445 case Iop_QAdd64Ux1: vex_printf("QAdd64Ux1"); return; 446 case Iop_QAdd8Sx8: vex_printf("QAdd8Sx8"); return; 447 case Iop_QAdd16Sx4: vex_printf("QAdd16Sx4"); return; 448 case Iop_QAdd32Sx2: vex_printf("QAdd32Sx2"); return; 449 case Iop_QAdd64Sx1: vex_printf("QAdd64Sx1"); return; 450 case Iop_PwAdd8x8: vex_printf("PwAdd8x8"); return; 451 case Iop_PwAdd16x4: vex_printf("PwAdd16x4"); return; 452 case Iop_PwAdd32x2: vex_printf("PwAdd32x2"); return; 453 case Iop_PwAdd32Fx2: vex_printf("PwAdd32Fx2"); return; 454 case Iop_PwAddL8Ux8: vex_printf("PwAddL8Ux8"); return; 455 case Iop_PwAddL16Ux4: vex_printf("PwAddL16Ux4"); return; 456 case Iop_PwAddL32Ux2: vex_printf("PwAddL32Ux2"); return; 457 case Iop_PwAddL8Sx8: vex_printf("PwAddL8Sx8"); return; 458 case Iop_PwAddL16Sx4: vex_printf("PwAddL16Sx4"); return; 459 case Iop_PwAddL32Sx2: vex_printf("PwAddL32Sx2"); return; 460 case Iop_Sub8x8: vex_printf("Sub8x8"); return; 461 case Iop_Sub16x4: vex_printf("Sub16x4"); return; 462 case Iop_Sub32x2: vex_printf("Sub32x2"); return; 463 case Iop_QSub8Ux8: vex_printf("QSub8Ux8"); return; 464 case Iop_QSub16Ux4: vex_printf("QSub16Ux4"); return; 465 case Iop_QSub32Ux2: vex_printf("QSub32Ux2"); return; 466 case Iop_QSub64Ux1: vex_printf("QSub64Ux1"); return; 467 case Iop_QSub8Sx8: vex_printf("QSub8Sx8"); return; 468 case Iop_QSub16Sx4: vex_printf("QSub16Sx4"); return; 469 case Iop_QSub32Sx2: vex_printf("QSub32Sx2"); return; 470 case Iop_QSub64Sx1: vex_printf("QSub64Sx1"); return; 471 case Iop_Mul8x8: vex_printf("Mul8x8"); return; 472 case Iop_Mul16x4: vex_printf("Mul16x4"); return; 473 case Iop_Mul32x2: vex_printf("Mul32x2"); return; 474 case Iop_Mul32Fx2: vex_printf("Mul32Fx2"); return; 475 case Iop_PolynomialMul8x8: vex_printf("PolynomialMul8x8"); return; 476 case Iop_MulHi16Ux4: vex_printf("MulHi16Ux4"); return; 477 case Iop_MulHi16Sx4: vex_printf("MulHi16Sx4"); return; 478 case Iop_QDMulHi16Sx4: vex_printf("QDMulHi16Sx4"); return; 479 case Iop_QDMulHi32Sx2: vex_printf("QDMulHi32Sx2"); return; 480 case Iop_QRDMulHi16Sx4: vex_printf("QRDMulHi16Sx4"); return; 481 case Iop_QRDMulHi32Sx2: vex_printf("QRDMulHi32Sx2"); return; 482 case Iop_QDMull16Sx4: vex_printf("QDMull16Sx4"); return; 483 case Iop_QDMull32Sx2: vex_printf("QDMull32Sx2"); return; 484 case Iop_Avg8Ux8: vex_printf("Avg8Ux8"); return; 485 case Iop_Avg16Ux4: vex_printf("Avg16Ux4"); return; 486 case Iop_Max8Sx8: vex_printf("Max8Sx8"); return; 487 case Iop_Max16Sx4: vex_printf("Max16Sx4"); return; 488 case Iop_Max32Sx2: vex_printf("Max32Sx2"); return; 489 case Iop_Max8Ux8: vex_printf("Max8Ux8"); return; 490 case Iop_Max16Ux4: vex_printf("Max16Ux4"); return; 491 case Iop_Max32Ux2: vex_printf("Max32Ux2"); return; 492 case Iop_Min8Sx8: vex_printf("Min8Sx8"); return; 493 case Iop_Min16Sx4: vex_printf("Min16Sx4"); return; 494 case Iop_Min32Sx2: vex_printf("Min32Sx2"); return; 495 case Iop_Min8Ux8: vex_printf("Min8Ux8"); return; 496 case Iop_Min16Ux4: vex_printf("Min16Ux4"); return; 497 case Iop_Min32Ux2: vex_printf("Min32Ux2"); return; 498 case Iop_PwMax8Sx8: vex_printf("PwMax8Sx8"); return; 499 case Iop_PwMax16Sx4: vex_printf("PwMax16Sx4"); return; 500 case Iop_PwMax32Sx2: vex_printf("PwMax32Sx2"); return; 501 case Iop_PwMax8Ux8: vex_printf("PwMax8Ux8"); return; 502 case Iop_PwMax16Ux4: vex_printf("PwMax16Ux4"); return; 503 case Iop_PwMax32Ux2: vex_printf("PwMax32Ux2"); return; 504 case Iop_PwMin8Sx8: vex_printf("PwMin8Sx8"); return; 505 case Iop_PwMin16Sx4: vex_printf("PwMin16Sx4"); return; 506 case Iop_PwMin32Sx2: vex_printf("PwMin32Sx2"); return; 507 case Iop_PwMin8Ux8: vex_printf("PwMin8Ux8"); return; 508 case Iop_PwMin16Ux4: vex_printf("PwMin16Ux4"); return; 509 case Iop_PwMin32Ux2: vex_printf("PwMin32Ux2"); return; 510 case Iop_CmpEQ8x8: vex_printf("CmpEQ8x8"); return; 511 case Iop_CmpEQ16x4: vex_printf("CmpEQ16x4"); return; 512 case Iop_CmpEQ32x2: vex_printf("CmpEQ32x2"); return; 513 case Iop_CmpGT8Ux8: vex_printf("CmpGT8Ux8"); return; 514 case Iop_CmpGT16Ux4: vex_printf("CmpGT16Ux4"); return; 515 case Iop_CmpGT32Ux2: vex_printf("CmpGT32Ux2"); return; 516 case Iop_CmpGT8Sx8: vex_printf("CmpGT8Sx8"); return; 517 case Iop_CmpGT16Sx4: vex_printf("CmpGT16Sx4"); return; 518 case Iop_CmpGT32Sx2: vex_printf("CmpGT32Sx2"); return; 519 case Iop_Cnt8x8: vex_printf("Cnt8x8"); return; 520 case Iop_Clz8x8: vex_printf("Clz8x8"); return; 521 case Iop_Clz16x4: vex_printf("Clz16x4"); return; 522 case Iop_Clz32x2: vex_printf("Clz32x2"); return; 523 case Iop_Cls8x8: vex_printf("Cls8x8"); return; 524 case Iop_Cls16x4: vex_printf("Cls16x4"); return; 525 case Iop_Cls32x2: vex_printf("Cls32x2"); return; 526 case Iop_ShlN8x8: vex_printf("ShlN8x8"); return; 527 case Iop_ShlN16x4: vex_printf("ShlN16x4"); return; 528 case Iop_ShlN32x2: vex_printf("ShlN32x2"); return; 529 case Iop_ShrN8x8: vex_printf("ShrN8x8"); return; 530 case Iop_ShrN16x4: vex_printf("ShrN16x4"); return; 531 case Iop_ShrN32x2: vex_printf("ShrN32x2"); return; 532 case Iop_SarN8x8: vex_printf("SarN8x8"); return; 533 case Iop_SarN16x4: vex_printf("SarN16x4"); return; 534 case Iop_SarN32x2: vex_printf("SarN32x2"); return; 535 case Iop_QNarrowBin16Sto8Ux8: vex_printf("QNarrowBin16Sto8Ux8"); return; 536 case Iop_QNarrowBin16Sto8Sx8: vex_printf("QNarrowBin16Sto8Sx8"); return; 537 case Iop_QNarrowBin32Sto16Sx4: vex_printf("QNarrowBin32Sto16Sx4"); return; 538 case Iop_QNarrowBin64Sto32Sx4: vex_printf("QNarrowBin64Sto32Sx4"); return; 539 case Iop_QNarrowBin64Uto32Ux4: vex_printf("QNarrowBin64Uto32Ux4"); return; 540 case Iop_NarrowBin16to8x8: vex_printf("NarrowBin16to8x8"); return; 541 case Iop_NarrowBin32to16x4: vex_printf("NarrowBin32to16x4"); return; 542 case Iop_NarrowBin64to32x4: vex_printf("NarrowBin64to32x4"); return; 543 case Iop_InterleaveHI8x8: vex_printf("InterleaveHI8x8"); return; 544 case Iop_InterleaveHI16x4: vex_printf("InterleaveHI16x4"); return; 545 case Iop_InterleaveHI32x2: vex_printf("InterleaveHI32x2"); return; 546 case Iop_InterleaveLO8x8: vex_printf("InterleaveLO8x8"); return; 547 case Iop_InterleaveLO16x4: vex_printf("InterleaveLO16x4"); return; 548 case Iop_InterleaveLO32x2: vex_printf("InterleaveLO32x2"); return; 549 case Iop_CatOddLanes8x8: vex_printf("CatOddLanes8x8"); return; 550 case Iop_CatOddLanes16x4: vex_printf("CatOddLanes16x4"); return; 551 case Iop_CatEvenLanes8x8: vex_printf("CatEvenLanes8x8"); return; 552 case Iop_CatEvenLanes16x4: vex_printf("CatEvenLanes16x4"); return; 553 case Iop_InterleaveOddLanes8x8: vex_printf("InterleaveOddLanes8x8"); return; 554 case Iop_InterleaveOddLanes16x4: vex_printf("InterleaveOddLanes16x4"); return; 555 case Iop_InterleaveEvenLanes8x8: vex_printf("InterleaveEvenLanes8x8"); return; 556 case Iop_InterleaveEvenLanes16x4: vex_printf("InterleaveEvenLanes16x4"); return; 557 case Iop_Shl8x8: vex_printf("Shl8x8"); return; 558 case Iop_Shl16x4: vex_printf("Shl16x4"); return; 559 case Iop_Shl32x2: vex_printf("Shl32x2"); return; 560 case Iop_Shr8x8: vex_printf("Shr8x8"); return; 561 case Iop_Shr16x4: vex_printf("Shr16x4"); return; 562 case Iop_Shr32x2: vex_printf("Shr32x2"); return; 563 case Iop_QShl8x8: vex_printf("QShl8x8"); return; 564 case Iop_QShl16x4: vex_printf("QShl16x4"); return; 565 case Iop_QShl32x2: vex_printf("QShl32x2"); return; 566 case Iop_QShl64x1: vex_printf("QShl64x1"); return; 567 case Iop_QSal8x8: vex_printf("QSal8x8"); return; 568 case Iop_QSal16x4: vex_printf("QSal16x4"); return; 569 case Iop_QSal32x2: vex_printf("QSal32x2"); return; 570 case Iop_QSal64x1: vex_printf("QSal64x1"); return; 571 case Iop_QShlNsatUU8x8: vex_printf("QShlNsatUU8x8"); return; 572 case Iop_QShlNsatUU16x4: vex_printf("QShlNsatUU16x4"); return; 573 case Iop_QShlNsatUU32x2: vex_printf("QShlNsatUU32x2"); return; 574 case Iop_QShlNsatUU64x1: vex_printf("QShlNsatUU64x1"); return; 575 case Iop_QShlNsatSU8x8: vex_printf("QShlNsatSU8x8"); return; 576 case Iop_QShlNsatSU16x4: vex_printf("QShlNsatSU16x4"); return; 577 case Iop_QShlNsatSU32x2: vex_printf("QShlNsatSU32x2"); return; 578 case Iop_QShlNsatSU64x1: vex_printf("QShlNsatSU64x1"); return; 579 case Iop_QShlNsatSS8x8: vex_printf("QShlNsatSS8x8"); return; 580 case Iop_QShlNsatSS16x4: vex_printf("QShlNsatSS16x4"); return; 581 case Iop_QShlNsatSS32x2: vex_printf("QShlNsatSS32x2"); return; 582 case Iop_QShlNsatSS64x1: vex_printf("QShlNsatSS64x1"); return; 583 case Iop_Sar8x8: vex_printf("Sar8x8"); return; 584 case Iop_Sar16x4: vex_printf("Sar16x4"); return; 585 case Iop_Sar32x2: vex_printf("Sar32x2"); return; 586 case Iop_Sal8x8: vex_printf("Sal8x8"); return; 587 case Iop_Sal16x4: vex_printf("Sal16x4"); return; 588 case Iop_Sal32x2: vex_printf("Sal32x2"); return; 589 case Iop_Sal64x1: vex_printf("Sal64x1"); return; 590 case Iop_Perm8x8: vex_printf("Perm8x8"); return; 591 case Iop_Reverse8sIn16_x4: vex_printf("Reverse8sIn16_x4"); return; 592 case Iop_Reverse8sIn32_x2: vex_printf("Reverse8sIn32_x2"); return; 593 case Iop_Reverse16sIn32_x2: vex_printf("Reverse16sIn32_x2"); return; 594 case Iop_Reverse8sIn64_x1: vex_printf("Reverse8sIn64_x1"); return; 595 case Iop_Reverse16sIn64_x1: vex_printf("Reverse16sIn64_x1"); return; 596 case Iop_Reverse32sIn64_x1: vex_printf("Reverse32sIn64_x1"); return; 597 case Iop_Abs32Fx2: vex_printf("Abs32Fx2"); return; 598 case Iop_GetMSBs8x8: vex_printf("GetMSBs8x8"); return; 599 case Iop_GetMSBs8x16: vex_printf("GetMSBs8x16"); return; 600 601 case Iop_CmpNEZ32x2: vex_printf("CmpNEZ32x2"); return; 602 case Iop_CmpNEZ16x4: vex_printf("CmpNEZ16x4"); return; 603 case Iop_CmpNEZ8x8: vex_printf("CmpNEZ8x8"); return; 604 605 case Iop_Add32Fx4: vex_printf("Add32Fx4"); return; 606 case Iop_Add32Fx2: vex_printf("Add32Fx2"); return; 607 case Iop_Add32F0x4: vex_printf("Add32F0x4"); return; 608 case Iop_Add64Fx2: vex_printf("Add64Fx2"); return; 609 case Iop_Add64F0x2: vex_printf("Add64F0x2"); return; 610 611 case Iop_Div32Fx4: vex_printf("Div32Fx4"); return; 612 case Iop_Div32F0x4: vex_printf("Div32F0x4"); return; 613 case Iop_Div64Fx2: vex_printf("Div64Fx2"); return; 614 case Iop_Div64F0x2: vex_printf("Div64F0x2"); return; 615 616 case Iop_Max32Fx8: vex_printf("Max32Fx8"); return; 617 case Iop_Max32Fx4: vex_printf("Max32Fx4"); return; 618 case Iop_Max32Fx2: vex_printf("Max32Fx2"); return; 619 case Iop_PwMax32Fx4: vex_printf("PwMax32Fx4"); return; 620 case Iop_PwMax32Fx2: vex_printf("PwMax32Fx2"); return; 621 case Iop_Max32F0x4: vex_printf("Max32F0x4"); return; 622 case Iop_Max64Fx4: vex_printf("Max64Fx4"); return; 623 case Iop_Max64Fx2: vex_printf("Max64Fx2"); return; 624 case Iop_Max64F0x2: vex_printf("Max64F0x2"); return; 625 626 case Iop_Min32Fx8: vex_printf("Min32Fx8"); return; 627 case Iop_Min32Fx4: vex_printf("Min32Fx4"); return; 628 case Iop_Min32Fx2: vex_printf("Min32Fx2"); return; 629 case Iop_PwMin32Fx4: vex_printf("PwMin32Fx4"); return; 630 case Iop_PwMin32Fx2: vex_printf("PwMin32Fx2"); return; 631 case Iop_Min32F0x4: vex_printf("Min32F0x4"); return; 632 case Iop_Min64Fx4: vex_printf("Min64Fx4"); return; 633 case Iop_Min64Fx2: vex_printf("Min64Fx2"); return; 634 case Iop_Min64F0x2: vex_printf("Min64F0x2"); return; 635 636 case Iop_Mul32Fx4: vex_printf("Mul32Fx4"); return; 637 case Iop_Mul32F0x4: vex_printf("Mul32F0x4"); return; 638 case Iop_Mul64Fx2: vex_printf("Mul64Fx2"); return; 639 case Iop_Mul64F0x2: vex_printf("Mul64F0x2"); return; 640 641 case Iop_RecipEst32Ux2: vex_printf("RecipEst32Ux2"); return; 642 case Iop_RecipEst32Fx2: vex_printf("RecipEst32Fx2"); return; 643 case Iop_RecipEst32Fx4: vex_printf("RecipEst32Fx4"); return; 644 case Iop_RecipEst32Fx8: vex_printf("RecipEst32Fx8"); return; 645 case Iop_RecipEst32Ux4: vex_printf("RecipEst32Ux4"); return; 646 case Iop_RecipEst32F0x4: vex_printf("RecipEst32F0x4"); return; 647 case Iop_RecipStep32Fx2: vex_printf("RecipStep32Fx2"); return; 648 case Iop_RecipStep32Fx4: vex_printf("RecipStep32Fx4"); return; 649 case Iop_RecipEst64Fx2: vex_printf("RecipEst64Fx2"); return; 650 case Iop_RecipStep64Fx2: vex_printf("RecipStep64Fx2"); return; 651 652 case Iop_Abs32Fx4: vex_printf("Abs32Fx4"); return; 653 case Iop_Abs64Fx2: vex_printf("Abs64Fx2"); return; 654 case Iop_RSqrtStep32Fx4: vex_printf("RSqrtStep32Fx4"); return; 655 case Iop_RSqrtStep64Fx2: vex_printf("RSqrtStep64Fx2"); return; 656 case Iop_RSqrtStep32Fx2: vex_printf("RSqrtStep32Fx2"); return; 657 case Iop_RSqrtEst64Fx2: vex_printf("RSqrtEst64Fx2"); return; 658 659 case Iop_RSqrtEst32F0x4: vex_printf("RSqrtEst32F0x4"); return; 660 case Iop_RSqrtEst32Fx8: vex_printf("RSqrtEst32Fx8"); return; 661 662 case Iop_Sqrt32Fx4: vex_printf("Sqrt32Fx4"); return; 663 case Iop_Sqrt32F0x4: vex_printf("Sqrt32F0x4"); return; 664 case Iop_Sqrt64Fx2: vex_printf("Sqrt64Fx2"); return; 665 case Iop_Sqrt64F0x2: vex_printf("Sqrt64F0x2"); return; 666 case Iop_Sqrt32Fx8: vex_printf("Sqrt32Fx8"); return; 667 case Iop_Sqrt64Fx4: vex_printf("Sqrt64Fx4"); return; 668 669 case Iop_Sub32Fx4: vex_printf("Sub32Fx4"); return; 670 case Iop_Sub32Fx2: vex_printf("Sub32Fx2"); return; 671 case Iop_Sub32F0x4: vex_printf("Sub32F0x4"); return; 672 case Iop_Sub64Fx2: vex_printf("Sub64Fx2"); return; 673 case Iop_Sub64F0x2: vex_printf("Sub64F0x2"); return; 674 675 case Iop_CmpEQ32Fx4: vex_printf("CmpEQ32Fx4"); return; 676 case Iop_CmpLT32Fx4: vex_printf("CmpLT32Fx4"); return; 677 case Iop_CmpLE32Fx4: vex_printf("CmpLE32Fx4"); return; 678 case Iop_CmpGT32Fx4: vex_printf("CmpGT32Fx4"); return; 679 case Iop_CmpGE32Fx4: vex_printf("CmpGE32Fx4"); return; 680 case Iop_CmpUN32Fx4: vex_printf("CmpUN32Fx4"); return; 681 case Iop_CmpEQ64Fx2: vex_printf("CmpEQ64Fx2"); return; 682 case Iop_CmpLT64Fx2: vex_printf("CmpLT64Fx2"); return; 683 case Iop_CmpLE64Fx2: vex_printf("CmpLE64Fx2"); return; 684 case Iop_CmpUN64Fx2: vex_printf("CmpUN64Fx2"); return; 685 case Iop_CmpGT32Fx2: vex_printf("CmpGT32Fx2"); return; 686 case Iop_CmpEQ32Fx2: vex_printf("CmpEQ32Fx2"); return; 687 case Iop_CmpGE32Fx2: vex_printf("CmpGE32Fx2"); return; 688 689 case Iop_CmpEQ32F0x4: vex_printf("CmpEQ32F0x4"); return; 690 case Iop_CmpLT32F0x4: vex_printf("CmpLT32F0x4"); return; 691 case Iop_CmpLE32F0x4: vex_printf("CmpLE32F0x4"); return; 692 case Iop_CmpUN32F0x4: vex_printf("CmpUN32F0x4"); return; 693 case Iop_CmpEQ64F0x2: vex_printf("CmpEQ64F0x2"); return; 694 case Iop_CmpLT64F0x2: vex_printf("CmpLT64F0x2"); return; 695 case Iop_CmpLE64F0x2: vex_printf("CmpLE64F0x2"); return; 696 case Iop_CmpUN64F0x2: vex_printf("CmpUN64F0x2"); return; 697 698 case Iop_Neg64Fx2: vex_printf("Neg64Fx2"); return; 699 case Iop_Neg32Fx4: vex_printf("Neg32Fx4"); return; 700 case Iop_Neg32Fx2: vex_printf("Neg32Fx2"); return; 701 702 case Iop_V128to64: vex_printf("V128to64"); return; 703 case Iop_V128HIto64: vex_printf("V128HIto64"); return; 704 case Iop_64HLtoV128: vex_printf("64HLtoV128"); return; 705 706 case Iop_64UtoV128: vex_printf("64UtoV128"); return; 707 case Iop_SetV128lo64: vex_printf("SetV128lo64"); return; 708 709 case Iop_ZeroHI64ofV128: vex_printf("ZeroHI64ofV128"); return; 710 case Iop_ZeroHI96ofV128: vex_printf("ZeroHI96ofV128"); return; 711 case Iop_ZeroHI112ofV128: vex_printf("ZeroHI112ofV128"); return; 712 case Iop_ZeroHI120ofV128: vex_printf("ZeroHI120ofV128"); return; 713 714 case Iop_32UtoV128: vex_printf("32UtoV128"); return; 715 case Iop_V128to32: vex_printf("V128to32"); return; 716 case Iop_SetV128lo32: vex_printf("SetV128lo32"); return; 717 718 case Iop_Dup8x16: vex_printf("Dup8x16"); return; 719 case Iop_Dup16x8: vex_printf("Dup16x8"); return; 720 case Iop_Dup32x4: vex_printf("Dup32x4"); return; 721 case Iop_Dup8x8: vex_printf("Dup8x8"); return; 722 case Iop_Dup16x4: vex_printf("Dup16x4"); return; 723 case Iop_Dup32x2: vex_printf("Dup32x2"); return; 724 725 case Iop_NotV128: vex_printf("NotV128"); return; 726 case Iop_AndV128: vex_printf("AndV128"); return; 727 case Iop_OrV128: vex_printf("OrV128"); return; 728 case Iop_XorV128: vex_printf("XorV128"); return; 729 730 case Iop_CmpNEZ8x16: vex_printf("CmpNEZ8x16"); return; 731 case Iop_CmpNEZ16x8: vex_printf("CmpNEZ16x8"); return; 732 case Iop_CmpNEZ32x4: vex_printf("CmpNEZ32x4"); return; 733 case Iop_CmpNEZ64x2: vex_printf("CmpNEZ64x2"); return; 734 735 case Iop_Abs8x16: vex_printf("Abs8x16"); return; 736 case Iop_Abs16x8: vex_printf("Abs16x8"); return; 737 case Iop_Abs32x4: vex_printf("Abs32x4"); return; 738 case Iop_Abs64x2: vex_printf("Abs64x2"); return; 739 740 case Iop_Add8x16: vex_printf("Add8x16"); return; 741 case Iop_Add16x8: vex_printf("Add16x8"); return; 742 case Iop_Add32x4: vex_printf("Add32x4"); return; 743 case Iop_Add64x2: vex_printf("Add64x2"); return; 744 case Iop_QAdd8Ux16: vex_printf("QAdd8Ux16"); return; 745 case Iop_QAdd16Ux8: vex_printf("QAdd16Ux8"); return; 746 case Iop_QAdd32Ux4: vex_printf("QAdd32Ux4"); return; 747 case Iop_QAdd8Sx16: vex_printf("QAdd8Sx16"); return; 748 case Iop_QAdd16Sx8: vex_printf("QAdd16Sx8"); return; 749 case Iop_QAdd32Sx4: vex_printf("QAdd32Sx4"); return; 750 case Iop_QAdd64Ux2: vex_printf("QAdd64Ux2"); return; 751 case Iop_QAdd64Sx2: vex_printf("QAdd64Sx2"); return; 752 753 case Iop_QAddExtUSsatSS8x16: vex_printf("QAddExtUSsatSS8x16"); return; 754 case Iop_QAddExtUSsatSS16x8: vex_printf("QAddExtUSsatSS16x8"); return; 755 case Iop_QAddExtUSsatSS32x4: vex_printf("QAddExtUSsatSS32x4"); return; 756 case Iop_QAddExtUSsatSS64x2: vex_printf("QAddExtUSsatSS64x2"); return; 757 case Iop_QAddExtSUsatUU8x16: vex_printf("QAddExtSUsatUU8x16"); return; 758 case Iop_QAddExtSUsatUU16x8: vex_printf("QAddExtSUsatUU16x8"); return; 759 case Iop_QAddExtSUsatUU32x4: vex_printf("QAddExtSUsatUU32x4"); return; 760 case Iop_QAddExtSUsatUU64x2: vex_printf("QAddExtSUsatUU64x2"); return; 761 762 case Iop_PwAdd8x16: vex_printf("PwAdd8x16"); return; 763 case Iop_PwAdd16x8: vex_printf("PwAdd16x8"); return; 764 case Iop_PwAdd32x4: vex_printf("PwAdd32x4"); return; 765 case Iop_PwAddL8Ux16: vex_printf("PwAddL8Ux16"); return; 766 case Iop_PwAddL16Ux8: vex_printf("PwAddL16Ux8"); return; 767 case Iop_PwAddL32Ux4: vex_printf("PwAddL32Ux4"); return; 768 case Iop_PwAddL8Sx16: vex_printf("PwAddL8Sx16"); return; 769 case Iop_PwAddL16Sx8: vex_printf("PwAddL16Sx8"); return; 770 case Iop_PwAddL32Sx4: vex_printf("PwAddL32Sx4"); return; 771 772 case Iop_Sub8x16: vex_printf("Sub8x16"); return; 773 case Iop_Sub16x8: vex_printf("Sub16x8"); return; 774 case Iop_Sub32x4: vex_printf("Sub32x4"); return; 775 case Iop_Sub64x2: vex_printf("Sub64x2"); return; 776 case Iop_QSub8Ux16: vex_printf("QSub8Ux16"); return; 777 case Iop_QSub16Ux8: vex_printf("QSub16Ux8"); return; 778 case Iop_QSub32Ux4: vex_printf("QSub32Ux4"); return; 779 case Iop_QSub8Sx16: vex_printf("QSub8Sx16"); return; 780 case Iop_QSub16Sx8: vex_printf("QSub16Sx8"); return; 781 case Iop_QSub32Sx4: vex_printf("QSub32Sx4"); return; 782 case Iop_QSub64Ux2: vex_printf("QSub64Ux2"); return; 783 case Iop_QSub64Sx2: vex_printf("QSub64Sx2"); return; 784 785 case Iop_Mul8x16: vex_printf("Mul8x16"); return; 786 case Iop_Mul16x8: vex_printf("Mul16x8"); return; 787 case Iop_Mul32x4: vex_printf("Mul32x4"); return; 788 case Iop_Mull8Ux8: vex_printf("Mull8Ux8"); return; 789 case Iop_Mull8Sx8: vex_printf("Mull8Sx8"); return; 790 case Iop_Mull16Ux4: vex_printf("Mull16Ux4"); return; 791 case Iop_Mull16Sx4: vex_printf("Mull16Sx4"); return; 792 case Iop_Mull32Ux2: vex_printf("Mull32Ux2"); return; 793 case Iop_Mull32Sx2: vex_printf("Mull32Sx2"); return; 794 case Iop_PolynomialMul8x16: vex_printf("PolynomialMul8x16"); return; 795 case Iop_PolynomialMull8x8: vex_printf("PolynomialMull8x8"); return; 796 case Iop_MulHi16Ux8: vex_printf("MulHi16Ux8"); return; 797 case Iop_MulHi32Ux4: vex_printf("MulHi32Ux4"); return; 798 case Iop_MulHi16Sx8: vex_printf("MulHi16Sx8"); return; 799 case Iop_MulHi32Sx4: vex_printf("MulHi32Sx4"); return; 800 case Iop_QDMulHi16Sx8: vex_printf("QDMulHi16Sx8"); return; 801 case Iop_QDMulHi32Sx4: vex_printf("QDMulHi32Sx4"); return; 802 case Iop_QRDMulHi16Sx8: vex_printf("QRDMulHi16Sx8"); return; 803 case Iop_QRDMulHi32Sx4: vex_printf("QRDMulHi32Sx4"); return; 804 805 case Iop_MullEven8Ux16: vex_printf("MullEven8Ux16"); return; 806 case Iop_MullEven16Ux8: vex_printf("MullEven16Ux8"); return; 807 case Iop_MullEven32Ux4: vex_printf("MullEven32Ux4"); return; 808 case Iop_MullEven8Sx16: vex_printf("MullEven8Sx16"); return; 809 case Iop_MullEven16Sx8: vex_printf("MullEven16Sx8"); return; 810 case Iop_MullEven32Sx4: vex_printf("MullEven32Sx4"); return; 811 812 case Iop_PolynomialMulAdd8x16: 813 vex_printf("PolynomialMulAdd8x16"); return; 814 case Iop_PolynomialMulAdd16x8: 815 vex_printf("PolynomialMulAdd16x8"); return; 816 case Iop_PolynomialMulAdd32x4: 817 vex_printf("PolynomialMulAdd32x4"); return; 818 case Iop_PolynomialMulAdd64x2: 819 vex_printf("PolynomialMulAdd64x2"); return; 820 821 case Iop_Avg8Ux16: vex_printf("Avg8Ux16"); return; 822 case Iop_Avg16Ux8: vex_printf("Avg16Ux8"); return; 823 case Iop_Avg32Ux4: vex_printf("Avg32Ux4"); return; 824 case Iop_Avg8Sx16: vex_printf("Avg8Sx16"); return; 825 case Iop_Avg16Sx8: vex_printf("Avg16Sx8"); return; 826 case Iop_Avg32Sx4: vex_printf("Avg32Sx4"); return; 827 828 case Iop_Max8Sx16: vex_printf("Max8Sx16"); return; 829 case Iop_Max16Sx8: vex_printf("Max16Sx8"); return; 830 case Iop_Max32Sx4: vex_printf("Max32Sx4"); return; 831 case Iop_Max64Sx2: vex_printf("Max64Sx2"); return; 832 case Iop_Max8Ux16: vex_printf("Max8Ux16"); return; 833 case Iop_Max16Ux8: vex_printf("Max16Ux8"); return; 834 case Iop_Max32Ux4: vex_printf("Max32Ux4"); return; 835 case Iop_Max64Ux2: vex_printf("Max64Ux2"); return; 836 837 case Iop_Min8Sx16: vex_printf("Min8Sx16"); return; 838 case Iop_Min16Sx8: vex_printf("Min16Sx8"); return; 839 case Iop_Min32Sx4: vex_printf("Min32Sx4"); return; 840 case Iop_Min64Sx2: vex_printf("Min64Sx2"); return; 841 case Iop_Min8Ux16: vex_printf("Min8Ux16"); return; 842 case Iop_Min16Ux8: vex_printf("Min16Ux8"); return; 843 case Iop_Min32Ux4: vex_printf("Min32Ux4"); return; 844 case Iop_Min64Ux2: vex_printf("Min64Ux2"); return; 845 846 case Iop_CmpEQ8x16: vex_printf("CmpEQ8x16"); return; 847 case Iop_CmpEQ16x8: vex_printf("CmpEQ16x8"); return; 848 case Iop_CmpEQ32x4: vex_printf("CmpEQ32x4"); return; 849 case Iop_CmpEQ64x2: vex_printf("CmpEQ64x2"); return; 850 case Iop_CmpGT8Sx16: vex_printf("CmpGT8Sx16"); return; 851 case Iop_CmpGT16Sx8: vex_printf("CmpGT16Sx8"); return; 852 case Iop_CmpGT32Sx4: vex_printf("CmpGT32Sx4"); return; 853 case Iop_CmpGT64Sx2: vex_printf("CmpGT64Sx2"); return; 854 case Iop_CmpGT8Ux16: vex_printf("CmpGT8Ux16"); return; 855 case Iop_CmpGT16Ux8: vex_printf("CmpGT16Ux8"); return; 856 case Iop_CmpGT32Ux4: vex_printf("CmpGT32Ux4"); return; 857 case Iop_CmpGT64Ux2: vex_printf("CmpGT64Ux2"); return; 858 859 case Iop_Cnt8x16: vex_printf("Cnt8x16"); return; 860 case Iop_Clz8x16: vex_printf("Clz8x16"); return; 861 case Iop_Clz16x8: vex_printf("Clz16x8"); return; 862 case Iop_Clz32x4: vex_printf("Clz32x4"); return; 863 case Iop_Clz64x2: vex_printf("Clz64x2"); return; 864 case Iop_Cls8x16: vex_printf("Cls8x16"); return; 865 case Iop_Cls16x8: vex_printf("Cls16x8"); return; 866 case Iop_Cls32x4: vex_printf("Cls32x4"); return; 867 868 case Iop_ShlV128: vex_printf("ShlV128"); return; 869 case Iop_ShrV128: vex_printf("ShrV128"); return; 870 871 case Iop_ShlN8x16: vex_printf("ShlN8x16"); return; 872 case Iop_ShlN16x8: vex_printf("ShlN16x8"); return; 873 case Iop_ShlN32x4: vex_printf("ShlN32x4"); return; 874 case Iop_ShlN64x2: vex_printf("ShlN64x2"); return; 875 case Iop_ShrN8x16: vex_printf("ShrN8x16"); return; 876 case Iop_ShrN16x8: vex_printf("ShrN16x8"); return; 877 case Iop_ShrN32x4: vex_printf("ShrN32x4"); return; 878 case Iop_ShrN64x2: vex_printf("ShrN64x2"); return; 879 case Iop_SarN8x16: vex_printf("SarN8x16"); return; 880 case Iop_SarN16x8: vex_printf("SarN16x8"); return; 881 case Iop_SarN32x4: vex_printf("SarN32x4"); return; 882 case Iop_SarN64x2: vex_printf("SarN64x2"); return; 883 884 case Iop_Shl8x16: vex_printf("Shl8x16"); return; 885 case Iop_Shl16x8: vex_printf("Shl16x8"); return; 886 case Iop_Shl32x4: vex_printf("Shl32x4"); return; 887 case Iop_Shl64x2: vex_printf("Shl64x2"); return; 888 case Iop_QSal8x16: vex_printf("QSal8x16"); return; 889 case Iop_QSal16x8: vex_printf("QSal16x8"); return; 890 case Iop_QSal32x4: vex_printf("QSal32x4"); return; 891 case Iop_QSal64x2: vex_printf("QSal64x2"); return; 892 case Iop_QShl8x16: vex_printf("QShl8x16"); return; 893 case Iop_QShl16x8: vex_printf("QShl16x8"); return; 894 case Iop_QShl32x4: vex_printf("QShl32x4"); return; 895 case Iop_QShl64x2: vex_printf("QShl64x2"); return; 896 case Iop_QShlNsatSS8x16: vex_printf("QShlNsatSS8x16"); return; 897 case Iop_QShlNsatSS16x8: vex_printf("QShlNsatSS16x8"); return; 898 case Iop_QShlNsatSS32x4: vex_printf("QShlNsatSS32x4"); return; 899 case Iop_QShlNsatSS64x2: vex_printf("QShlNsatSS64x2"); return; 900 case Iop_QShlNsatUU8x16: vex_printf("QShlNsatUU8x16"); return; 901 case Iop_QShlNsatUU16x8: vex_printf("QShlNsatUU16x8"); return; 902 case Iop_QShlNsatUU32x4: vex_printf("QShlNsatUU32x4"); return; 903 case Iop_QShlNsatUU64x2: vex_printf("QShlNsatUU64x2"); return; 904 case Iop_QShlNsatSU8x16: vex_printf("QShlNsatSU8x16"); return; 905 case Iop_QShlNsatSU16x8: vex_printf("QShlNsatSU16x8"); return; 906 case Iop_QShlNsatSU32x4: vex_printf("QShlNsatSU32x4"); return; 907 case Iop_QShlNsatSU64x2: vex_printf("QShlNsatSU64x2"); return; 908 case Iop_Shr8x16: vex_printf("Shr8x16"); return; 909 case Iop_Shr16x8: vex_printf("Shr16x8"); return; 910 case Iop_Shr32x4: vex_printf("Shr32x4"); return; 911 case Iop_Shr64x2: vex_printf("Shr64x2"); return; 912 case Iop_Sar8x16: vex_printf("Sar8x16"); return; 913 case Iop_Sar16x8: vex_printf("Sar16x8"); return; 914 case Iop_Sar32x4: vex_printf("Sar32x4"); return; 915 case Iop_Sar64x2: vex_printf("Sar64x2"); return; 916 case Iop_Sal8x16: vex_printf("Sal8x16"); return; 917 case Iop_Sal16x8: vex_printf("Sal16x8"); return; 918 case Iop_Sal32x4: vex_printf("Sal32x4"); return; 919 case Iop_Sal64x2: vex_printf("Sal64x2"); return; 920 case Iop_Rol8x16: vex_printf("Rol8x16"); return; 921 case Iop_Rol16x8: vex_printf("Rol16x8"); return; 922 case Iop_Rol32x4: vex_printf("Rol32x4"); return; 923 case Iop_Rol64x2: vex_printf("Rol64x2"); return; 924 925 case Iop_QandUQsh8x16: vex_printf("QandUQsh8x16"); return; 926 case Iop_QandUQsh16x8: vex_printf("QandUQsh16x8"); return; 927 case Iop_QandUQsh32x4: vex_printf("QandUQsh32x4"); return; 928 case Iop_QandUQsh64x2: vex_printf("QandUQsh64x2"); return; 929 case Iop_QandSQsh8x16: vex_printf("QandSQsh8x16"); return; 930 case Iop_QandSQsh16x8: vex_printf("QandSQsh16x8"); return; 931 case Iop_QandSQsh32x4: vex_printf("QandSQsh32x4"); return; 932 case Iop_QandSQsh64x2: vex_printf("QandSQsh64x2"); return; 933 case Iop_QandUQRsh8x16: vex_printf("QandUQRsh8x16"); return; 934 case Iop_QandUQRsh16x8: vex_printf("QandUQRsh16x8"); return; 935 case Iop_QandUQRsh32x4: vex_printf("QandUQRsh32x4"); return; 936 case Iop_QandUQRsh64x2: vex_printf("QandUQRsh64x2"); return; 937 case Iop_QandSQRsh8x16: vex_printf("QandSQRsh8x16"); return; 938 case Iop_QandSQRsh16x8: vex_printf("QandSQRsh16x8"); return; 939 case Iop_QandSQRsh32x4: vex_printf("QandSQRsh32x4"); return; 940 case Iop_QandSQRsh64x2: vex_printf("QandSQRsh64x2"); return; 941 942 case Iop_Sh8Sx16: vex_printf("Sh8Sx16"); return; 943 case Iop_Sh16Sx8: vex_printf("Sh16Sx8"); return; 944 case Iop_Sh32Sx4: vex_printf("Sh32Sx4"); return; 945 case Iop_Sh64Sx2: vex_printf("Sh64Sx2"); return; 946 case Iop_Sh8Ux16: vex_printf("Sh8Ux16"); return; 947 case Iop_Sh16Ux8: vex_printf("Sh16Ux8"); return; 948 case Iop_Sh32Ux4: vex_printf("Sh32Ux4"); return; 949 case Iop_Sh64Ux2: vex_printf("Sh64Ux2"); return; 950 case Iop_Rsh8Sx16: vex_printf("Rsh8Sx16"); return; 951 case Iop_Rsh16Sx8: vex_printf("Rsh16Sx8"); return; 952 case Iop_Rsh32Sx4: vex_printf("Rsh32Sx4"); return; 953 case Iop_Rsh64Sx2: vex_printf("Rsh64Sx2"); return; 954 case Iop_Rsh8Ux16: vex_printf("Rsh8Ux16"); return; 955 case Iop_Rsh16Ux8: vex_printf("Rsh16Ux8"); return; 956 case Iop_Rsh32Ux4: vex_printf("Rsh32Ux4"); return; 957 case Iop_Rsh64Ux2: vex_printf("Rsh64Ux2"); return; 958 959 case Iop_QandQShrNnarrow16Uto8Ux8: 960 vex_printf("QandQShrNnarrow16Uto8Ux8"); return; 961 case Iop_QandQShrNnarrow32Uto16Ux4: 962 vex_printf("QandQShrNnarrow32Uto16Ux4"); return; 963 case Iop_QandQShrNnarrow64Uto32Ux2: 964 vex_printf("QandQShrNnarrow64Uto32Ux2"); return; 965 case Iop_QandQSarNnarrow16Sto8Sx8: 966 vex_printf("QandQSarNnarrow16Sto8Sx8"); return; 967 case Iop_QandQSarNnarrow32Sto16Sx4: 968 vex_printf("QandQSarNnarrow32Sto16Sx4"); return; 969 case Iop_QandQSarNnarrow64Sto32Sx2: 970 vex_printf("QandQSarNnarrow64Sto32Sx2"); return; 971 case Iop_QandQSarNnarrow16Sto8Ux8: 972 vex_printf("QandQSarNnarrow16Sto8Ux8"); return; 973 case Iop_QandQSarNnarrow32Sto16Ux4: 974 vex_printf("QandQSarNnarrow32Sto16Ux4"); return; 975 case Iop_QandQSarNnarrow64Sto32Ux2: 976 vex_printf("QandQSarNnarrow64Sto32Ux2"); return; 977 case Iop_QandQRShrNnarrow16Uto8Ux8: 978 vex_printf("QandQRShrNnarrow16Uto8Ux8"); return; 979 case Iop_QandQRShrNnarrow32Uto16Ux4: 980 vex_printf("QandQRShrNnarrow32Uto16Ux4"); return; 981 case Iop_QandQRShrNnarrow64Uto32Ux2: 982 vex_printf("QandQRShrNnarrow64Uto32Ux2"); return; 983 case Iop_QandQRSarNnarrow16Sto8Sx8: 984 vex_printf("QandQRSarNnarrow16Sto8Sx8"); return; 985 case Iop_QandQRSarNnarrow32Sto16Sx4: 986 vex_printf("QandQRSarNnarrow32Sto16Sx4"); return; 987 case Iop_QandQRSarNnarrow64Sto32Sx2: 988 vex_printf("QandQRSarNnarrow64Sto32Sx2"); return; 989 case Iop_QandQRSarNnarrow16Sto8Ux8: 990 vex_printf("QandQRSarNnarrow16Sto8Ux8"); return; 991 case Iop_QandQRSarNnarrow32Sto16Ux4: 992 vex_printf("QandQRSarNnarrow32Sto16Ux4"); return; 993 case Iop_QandQRSarNnarrow64Sto32Ux2: 994 vex_printf("QandQRSarNnarrow64Sto32Ux2"); return; 995 996 case Iop_NarrowBin16to8x16: vex_printf("NarrowBin16to8x16"); return; 997 case Iop_NarrowBin32to16x8: vex_printf("NarrowBin32to16x8"); return; 998 case Iop_QNarrowBin16Uto8Ux16: vex_printf("QNarrowBin16Uto8Ux16"); return; 999 case Iop_QNarrowBin32Sto16Ux8: vex_printf("QNarrowBin32Sto16Ux8"); return; 1000 case Iop_QNarrowBin16Sto8Ux16: vex_printf("QNarrowBin16Sto8Ux16"); return; 1001 case Iop_QNarrowBin32Uto16Ux8: vex_printf("QNarrowBin32Uto16Ux8"); return; 1002 case Iop_QNarrowBin16Sto8Sx16: vex_printf("QNarrowBin16Sto8Sx16"); return; 1003 case Iop_QNarrowBin32Sto16Sx8: vex_printf("QNarrowBin32Sto16Sx8"); return; 1004 case Iop_NarrowUn16to8x8: vex_printf("NarrowUn16to8x8"); return; 1005 case Iop_NarrowUn32to16x4: vex_printf("NarrowUn32to16x4"); return; 1006 case Iop_NarrowUn64to32x2: vex_printf("NarrowUn64to32x2"); return; 1007 case Iop_QNarrowUn16Uto8Ux8: vex_printf("QNarrowUn16Uto8Ux8"); return; 1008 case Iop_QNarrowUn32Uto16Ux4: vex_printf("QNarrowUn32Uto16Ux4"); return; 1009 case Iop_QNarrowUn64Uto32Ux2: vex_printf("QNarrowUn64Uto32Ux2"); return; 1010 case Iop_QNarrowUn16Sto8Sx8: vex_printf("QNarrowUn16Sto8Sx8"); return; 1011 case Iop_QNarrowUn32Sto16Sx4: vex_printf("QNarrowUn32Sto16Sx4"); return; 1012 case Iop_QNarrowUn64Sto32Sx2: vex_printf("QNarrowUn64Sto32Sx2"); return; 1013 case Iop_QNarrowUn16Sto8Ux8: vex_printf("QNarrowUn16Sto8Ux8"); return; 1014 case Iop_QNarrowUn32Sto16Ux4: vex_printf("QNarrowUn32Sto16Ux4"); return; 1015 case Iop_QNarrowUn64Sto32Ux2: vex_printf("QNarrowUn64Sto32Ux2"); return; 1016 case Iop_Widen8Uto16x8: vex_printf("Widen8Uto16x8"); return; 1017 case Iop_Widen16Uto32x4: vex_printf("Widen16Uto32x4"); return; 1018 case Iop_Widen32Uto64x2: vex_printf("Widen32Uto64x2"); return; 1019 case Iop_Widen8Sto16x8: vex_printf("Widen8Sto16x8"); return; 1020 case Iop_Widen16Sto32x4: vex_printf("Widen16Sto32x4"); return; 1021 case Iop_Widen32Sto64x2: vex_printf("Widen32Sto64x2"); return; 1022 1023 case Iop_InterleaveHI8x16: vex_printf("InterleaveHI8x16"); return; 1024 case Iop_InterleaveHI16x8: vex_printf("InterleaveHI16x8"); return; 1025 case Iop_InterleaveHI32x4: vex_printf("InterleaveHI32x4"); return; 1026 case Iop_InterleaveHI64x2: vex_printf("InterleaveHI64x2"); return; 1027 case Iop_InterleaveLO8x16: vex_printf("InterleaveLO8x16"); return; 1028 case Iop_InterleaveLO16x8: vex_printf("InterleaveLO16x8"); return; 1029 case Iop_InterleaveLO32x4: vex_printf("InterleaveLO32x4"); return; 1030 case Iop_InterleaveLO64x2: vex_printf("InterleaveLO64x2"); return; 1031 1032 case Iop_CatOddLanes8x16: vex_printf("CatOddLanes8x16"); return; 1033 case Iop_CatOddLanes16x8: vex_printf("CatOddLanes16x8"); return; 1034 case Iop_CatOddLanes32x4: vex_printf("CatOddLanes32x4"); return; 1035 case Iop_CatEvenLanes8x16: vex_printf("CatEvenLanes8x16"); return; 1036 case Iop_CatEvenLanes16x8: vex_printf("CatEvenLanes16x8"); return; 1037 case Iop_CatEvenLanes32x4: vex_printf("CatEvenLanes32x4"); return; 1038 1039 case Iop_InterleaveOddLanes8x16: vex_printf("InterleaveOddLanes8x16"); return; 1040 case Iop_InterleaveOddLanes16x8: vex_printf("InterleaveOddLanes16x8"); return; 1041 case Iop_InterleaveOddLanes32x4: vex_printf("InterleaveOddLanes32x4"); return; 1042 case Iop_InterleaveEvenLanes8x16: vex_printf("InterleaveEvenLanes8x16"); return; 1043 case Iop_InterleaveEvenLanes16x8: vex_printf("InterleaveEvenLanes16x8"); return; 1044 case Iop_InterleaveEvenLanes32x4: vex_printf("InterleaveEvenLanes32x4"); return; 1045 1046 case Iop_GetElem8x16: vex_printf("GetElem8x16"); return; 1047 case Iop_GetElem16x8: vex_printf("GetElem16x8"); return; 1048 case Iop_GetElem32x4: vex_printf("GetElem32x4"); return; 1049 case Iop_GetElem64x2: vex_printf("GetElem64x2"); return; 1050 1051 case Iop_GetElem8x8: vex_printf("GetElem8x8"); return; 1052 case Iop_GetElem16x4: vex_printf("GetElem16x4"); return; 1053 case Iop_GetElem32x2: vex_printf("GetElem32x2"); return; 1054 case Iop_SetElem8x8: vex_printf("SetElem8x8"); return; 1055 case Iop_SetElem16x4: vex_printf("SetElem16x4"); return; 1056 case Iop_SetElem32x2: vex_printf("SetElem32x2"); return; 1057 1058 case Iop_Slice64: vex_printf("Slice64"); return; 1059 case Iop_SliceV128: vex_printf("SliceV128"); return; 1060 1061 case Iop_Perm8x16: vex_printf("Perm8x16"); return; 1062 case Iop_Perm32x4: vex_printf("Perm32x4"); return; 1063 case Iop_Reverse8sIn16_x8: vex_printf("Reverse8sIn16_x8"); return; 1064 case Iop_Reverse8sIn32_x4: vex_printf("Reverse8sIn32_x4"); return; 1065 case Iop_Reverse16sIn32_x4: vex_printf("Reverse16sIn32_x4"); return; 1066 case Iop_Reverse8sIn64_x2: vex_printf("Reverse8sIn64_x2"); return; 1067 case Iop_Reverse16sIn64_x2: vex_printf("Reverse16sIn64_x2"); return; 1068 case Iop_Reverse32sIn64_x2: vex_printf("Reverse32sIn64_x2"); return; 1069 case Iop_Reverse1sIn8_x16: vex_printf("Reverse1sIn8_x16"); return; 1070 1071 case Iop_F32ToFixed32Ux4_RZ: vex_printf("F32ToFixed32Ux4_RZ"); return; 1072 case Iop_F32ToFixed32Sx4_RZ: vex_printf("F32ToFixed32Sx4_RZ"); return; 1073 case Iop_Fixed32UToF32x4_RN: vex_printf("Fixed32UToF32x4_RN"); return; 1074 case Iop_Fixed32SToF32x4_RN: vex_printf("Fixed32SToF32x4_RN"); return; 1075 case Iop_F32ToFixed32Ux2_RZ: vex_printf("F32ToFixed32Ux2_RZ"); return; 1076 case Iop_F32ToFixed32Sx2_RZ: vex_printf("F32ToFixed32Sx2_RZ"); return; 1077 case Iop_Fixed32UToF32x2_RN: vex_printf("Fixed32UToF32x2_RN"); return; 1078 case Iop_Fixed32SToF32x2_RN: vex_printf("Fixed32SToF32x2_RN"); return; 1079 1080 case Iop_D32toD64: vex_printf("D32toD64"); return; 1081 case Iop_D64toD32: vex_printf("D64toD32"); return; 1082 case Iop_AddD64: vex_printf("AddD64"); return; 1083 case Iop_SubD64: vex_printf("SubD64"); return; 1084 case Iop_MulD64: vex_printf("MulD64"); return; 1085 case Iop_DivD64: vex_printf("DivD64"); return; 1086 case Iop_ShlD64: vex_printf("ShlD64"); return; 1087 case Iop_ShrD64: vex_printf("ShrD64"); return; 1088 case Iop_D64toI32S: vex_printf("D64toI32S"); return; 1089 case Iop_D64toI32U: vex_printf("D64toI32U"); return; 1090 case Iop_D64toI64S: vex_printf("D64toI64S"); return; 1091 case Iop_D64toI64U: vex_printf("D64toI64U"); return; 1092 case Iop_I32StoD64: vex_printf("I32StoD64"); return; 1093 case Iop_I32UtoD64: vex_printf("I32UtoD64"); return; 1094 case Iop_I64StoD64: vex_printf("I64StoD64"); return; 1095 case Iop_I64UtoD64: vex_printf("I64UtoD64"); return; 1096 case Iop_I32StoD128: vex_printf("I32StoD128"); return; 1097 case Iop_I32UtoD128: vex_printf("I32UtoD128"); return; 1098 case Iop_I64StoD128: vex_printf("I64StoD128"); return; 1099 case Iop_I64UtoD128: vex_printf("I64UtoD128"); return; 1100 case Iop_D64toD128: vex_printf("D64toD128"); return; 1101 case Iop_D128toD64: vex_printf("D128toD64"); return; 1102 case Iop_D128toI32S: vex_printf("D128toI32S"); return; 1103 case Iop_D128toI32U: vex_printf("D128toI32U"); return; 1104 case Iop_D128toI64S: vex_printf("D128toI64S"); return; 1105 case Iop_D128toI64U: vex_printf("D128toI64U"); return; 1106 case Iop_F32toD32: vex_printf("F32toD32"); return; 1107 case Iop_F32toD64: vex_printf("F32toD64"); return; 1108 case Iop_F32toD128: vex_printf("F32toD128"); return; 1109 case Iop_F64toD32: vex_printf("F64toD32"); return; 1110 case Iop_F64toD64: vex_printf("F64toD64"); return; 1111 case Iop_F64toD128: vex_printf("F64toD128"); return; 1112 case Iop_F128toD32: vex_printf("F128toD32"); return; 1113 case Iop_F128toD64: vex_printf("F128toD64"); return; 1114 case Iop_F128toD128: vex_printf("F128toD128"); return; 1115 case Iop_D32toF32: vex_printf("D32toF32"); return; 1116 case Iop_D32toF64: vex_printf("D32toF64"); return; 1117 case Iop_D32toF128: vex_printf("D32toF128"); return; 1118 case Iop_D64toF32: vex_printf("D64toF32"); return; 1119 case Iop_D64toF64: vex_printf("D64toF64"); return; 1120 case Iop_D64toF128: vex_printf("D64toF128"); return; 1121 case Iop_D128toF32: vex_printf("D128toF32"); return; 1122 case Iop_D128toF64: vex_printf("D128toF64"); return; 1123 case Iop_D128toF128: vex_printf("D128toF128"); return; 1124 case Iop_AddD128: vex_printf("AddD128"); return; 1125 case Iop_SubD128: vex_printf("SubD128"); return; 1126 case Iop_MulD128: vex_printf("MulD128"); return; 1127 case Iop_DivD128: vex_printf("DivD128"); return; 1128 case Iop_ShlD128: vex_printf("ShlD128"); return; 1129 case Iop_ShrD128: vex_printf("ShrD128"); return; 1130 case Iop_RoundD64toInt: vex_printf("RoundD64toInt"); return; 1131 case Iop_RoundD128toInt: vex_printf("RoundD128toInt"); return; 1132 case Iop_QuantizeD64: vex_printf("QuantizeD64"); return; 1133 case Iop_QuantizeD128: vex_printf("QuantizeD128"); return; 1134 case Iop_ExtractExpD64: vex_printf("ExtractExpD64"); return; 1135 case Iop_ExtractExpD128: vex_printf("ExtractExpD128"); return; 1136 case Iop_ExtractSigD64: vex_printf("ExtractSigD64"); return; 1137 case Iop_ExtractSigD128: vex_printf("ExtractSigD128"); return; 1138 case Iop_InsertExpD64: vex_printf("InsertExpD64"); return; 1139 case Iop_InsertExpD128: vex_printf("InsertExpD128"); return; 1140 case Iop_CmpD64: vex_printf("CmpD64"); return; 1141 case Iop_CmpD128: vex_printf("CmpD128"); return; 1142 case Iop_CmpExpD64: vex_printf("CmpExpD64"); return; 1143 case Iop_CmpExpD128: vex_printf("CmpExpD128"); return; 1144 case Iop_D64HLtoD128: vex_printf("D64HLtoD128"); return; 1145 case Iop_D128HItoD64: vex_printf("D128HItoD64"); return; 1146 case Iop_D128LOtoD64: vex_printf("D128LOtoD64"); return; 1147 case Iop_SignificanceRoundD64: vex_printf("SignificanceRoundD64"); 1148 return; 1149 case Iop_SignificanceRoundD128: vex_printf("SignificanceRoundD128"); 1150 return; 1151 case Iop_ReinterpI64asD64: vex_printf("ReinterpI64asD64"); return; 1152 case Iop_ReinterpD64asI64: vex_printf("ReinterpD64asI64"); return; 1153 case Iop_V256to64_0: vex_printf("V256to64_0"); return; 1154 case Iop_V256to64_1: vex_printf("V256to64_1"); return; 1155 case Iop_V256to64_2: vex_printf("V256to64_2"); return; 1156 case Iop_V256to64_3: vex_printf("V256to64_3"); return; 1157 case Iop_64x4toV256: vex_printf("64x4toV256"); return; 1158 case Iop_V256toV128_0: vex_printf("V256toV128_0"); return; 1159 case Iop_V256toV128_1: vex_printf("V256toV128_1"); return; 1160 case Iop_V128HLtoV256: vex_printf("V128HLtoV256"); return; 1161 case Iop_DPBtoBCD: vex_printf("DPBtoBCD"); return; 1162 case Iop_BCDtoDPB: vex_printf("BCDtoDPB"); return; 1163 case Iop_Add64Fx4: vex_printf("Add64Fx4"); return; 1164 case Iop_Sub64Fx4: vex_printf("Sub64Fx4"); return; 1165 case Iop_Mul64Fx4: vex_printf("Mul64Fx4"); return; 1166 case Iop_Div64Fx4: vex_printf("Div64Fx4"); return; 1167 case Iop_Add32Fx8: vex_printf("Add32Fx8"); return; 1168 case Iop_Sub32Fx8: vex_printf("Sub32Fx8"); return; 1169 case Iop_Mul32Fx8: vex_printf("Mul32Fx8"); return; 1170 case Iop_Div32Fx8: vex_printf("Div32Fx8"); return; 1171 case Iop_AndV256: vex_printf("AndV256"); return; 1172 case Iop_OrV256: vex_printf("OrV256"); return; 1173 case Iop_XorV256: vex_printf("XorV256"); return; 1174 case Iop_NotV256: vex_printf("NotV256"); return; 1175 case Iop_CmpNEZ64x4: vex_printf("CmpNEZ64x4"); return; 1176 case Iop_CmpNEZ32x8: vex_printf("CmpNEZ32x8"); return; 1177 case Iop_CmpNEZ16x16: vex_printf("CmpNEZ16x16"); return; 1178 case Iop_CmpNEZ8x32: vex_printf("CmpNEZ8x32"); return; 1179 1180 case Iop_Add8x32: vex_printf("Add8x32"); return; 1181 case Iop_Add16x16: vex_printf("Add16x16"); return; 1182 case Iop_Add32x8: vex_printf("Add32x8"); return; 1183 case Iop_Add64x4: vex_printf("Add64x4"); return; 1184 case Iop_Sub8x32: vex_printf("Sub8x32"); return; 1185 case Iop_Sub16x16: vex_printf("Sub16x16"); return; 1186 case Iop_Sub32x8: vex_printf("Sub32x8"); return; 1187 case Iop_Sub64x4: vex_printf("Sub64x4"); return; 1188 case Iop_QAdd8Ux32: vex_printf("QAdd8Ux32"); return; 1189 case Iop_QAdd16Ux16: vex_printf("QAdd16Ux16"); return; 1190 case Iop_QAdd8Sx32: vex_printf("QAdd8Sx32"); return; 1191 case Iop_QAdd16Sx16: vex_printf("QAdd16Sx16"); return; 1192 case Iop_QSub8Ux32: vex_printf("QSub8Ux32"); return; 1193 case Iop_QSub16Ux16: vex_printf("QSub16Ux16"); return; 1194 case Iop_QSub8Sx32: vex_printf("QSub8Sx32"); return; 1195 case Iop_QSub16Sx16: vex_printf("QSub16Sx16"); return; 1196 1197 case Iop_Mul16x16: vex_printf("Mul16x16"); return; 1198 case Iop_Mul32x8: vex_printf("Mul32x8"); return; 1199 case Iop_MulHi16Ux16: vex_printf("MulHi16Ux16"); return; 1200 case Iop_MulHi16Sx16: vex_printf("MulHi16Sx16"); return; 1201 1202 case Iop_Avg8Ux32: vex_printf("Avg8Ux32"); return; 1203 case Iop_Avg16Ux16: vex_printf("Avg16Ux16"); return; 1204 1205 case Iop_Max8Sx32: vex_printf("Max8Sx32"); return; 1206 case Iop_Max16Sx16: vex_printf("Max16Sx16"); return; 1207 case Iop_Max32Sx8: vex_printf("Max32Sx8"); return; 1208 case Iop_Max8Ux32: vex_printf("Max8Ux32"); return; 1209 case Iop_Max16Ux16: vex_printf("Max16Ux16"); return; 1210 case Iop_Max32Ux8: vex_printf("Max32Ux8"); return; 1211 1212 case Iop_Min8Sx32: vex_printf("Min8Sx32"); return; 1213 case Iop_Min16Sx16: vex_printf("Min16Sx16"); return; 1214 case Iop_Min32Sx8: vex_printf("Min32Sx8"); return; 1215 case Iop_Min8Ux32: vex_printf("Min8Ux32"); return; 1216 case Iop_Min16Ux16: vex_printf("Min16Ux16"); return; 1217 case Iop_Min32Ux8: vex_printf("Min32Ux8"); return; 1218 1219 case Iop_CmpEQ8x32: vex_printf("CmpEQ8x32"); return; 1220 case Iop_CmpEQ16x16: vex_printf("CmpEQ16x16"); return; 1221 case Iop_CmpEQ32x8: vex_printf("CmpEQ32x8"); return; 1222 case Iop_CmpEQ64x4: vex_printf("CmpEQ64x4"); return; 1223 case Iop_CmpGT8Sx32: vex_printf("CmpGT8Sx32"); return; 1224 case Iop_CmpGT16Sx16: vex_printf("CmpGT16Sx16"); return; 1225 case Iop_CmpGT32Sx8: vex_printf("CmpGT32Sx8"); return; 1226 case Iop_CmpGT64Sx4: vex_printf("CmpGT64Sx4"); return; 1227 1228 case Iop_ShlN16x16: vex_printf("ShlN16x16"); return; 1229 case Iop_ShlN32x8: vex_printf("ShlN32x8"); return; 1230 case Iop_ShlN64x4: vex_printf("ShlN64x4"); return; 1231 case Iop_ShrN16x16: vex_printf("ShrN16x16"); return; 1232 case Iop_ShrN32x8: vex_printf("ShrN32x8"); return; 1233 case Iop_ShrN64x4: vex_printf("ShrN64x4"); return; 1234 case Iop_SarN16x16: vex_printf("SarN16x16"); return; 1235 case Iop_SarN32x8: vex_printf("SarN32x8"); return; 1236 1237 case Iop_Perm32x8: vex_printf("Perm32x8"); return; 1238 1239 case Iop_CipherV128: vex_printf("CipherV128"); return; 1240 case Iop_CipherLV128: vex_printf("CipherLV128"); return; 1241 case Iop_NCipherV128: vex_printf("NCipherV128"); return; 1242 case Iop_NCipherLV128: vex_printf("NCipherLV128"); return; 1243 case Iop_CipherSV128: vex_printf("CipherSV128"); return; 1244 1245 case Iop_SHA256: vex_printf("SHA256"); return; 1246 case Iop_SHA512: vex_printf("SHA512"); return; 1247 case Iop_BCDAdd: vex_printf("BCDAdd"); return; 1248 case Iop_BCDSub: vex_printf("BCDSub"); return; 1249 1250 case Iop_PwBitMtxXpose64x2: vex_printf("BitMatrixTranspose64x2"); return; 1251 1252 default: vpanic("ppIROp(1)"); 1253 } 1254 1255 vassert(str); 1256 switch (op - base) { 1257 case 0: vex_printf("%s",str); vex_printf("8"); break; 1258 case 1: vex_printf("%s",str); vex_printf("16"); break; 1259 case 2: vex_printf("%s",str); vex_printf("32"); break; 1260 case 3: vex_printf("%s",str); vex_printf("64"); break; 1261 default: vpanic("ppIROp(2)"); 1262 } 1263 } 1264 1265 void ppIRExpr ( const IRExpr* e ) 1266 { 1267 Int i; 1268 switch (e->tag) { 1269 case Iex_Binder: 1270 vex_printf("BIND-%d", e->Iex.Binder.binder); 1271 break; 1272 case Iex_Get: 1273 vex_printf( "GET:" ); 1274 ppIRType(e->Iex.Get.ty); 1275 vex_printf("(%d)", e->Iex.Get.offset); 1276 break; 1277 case Iex_GetI: 1278 vex_printf( "GETI" ); 1279 ppIRRegArray(e->Iex.GetI.descr); 1280 vex_printf("["); 1281 ppIRExpr(e->Iex.GetI.ix); 1282 vex_printf(",%d]", e->Iex.GetI.bias); 1283 break; 1284 case Iex_RdTmp: 1285 ppIRTemp(e->Iex.RdTmp.tmp); 1286 break; 1287 case Iex_Qop: { 1288 const IRQop *qop = e->Iex.Qop.details; 1289 ppIROp(qop->op); 1290 vex_printf( "(" ); 1291 ppIRExpr(qop->arg1); 1292 vex_printf( "," ); 1293 ppIRExpr(qop->arg2); 1294 vex_printf( "," ); 1295 ppIRExpr(qop->arg3); 1296 vex_printf( "," ); 1297 ppIRExpr(qop->arg4); 1298 vex_printf( ")" ); 1299 break; 1300 } 1301 case Iex_Triop: { 1302 const IRTriop *triop = e->Iex.Triop.details; 1303 ppIROp(triop->op); 1304 vex_printf( "(" ); 1305 ppIRExpr(triop->arg1); 1306 vex_printf( "," ); 1307 ppIRExpr(triop->arg2); 1308 vex_printf( "," ); 1309 ppIRExpr(triop->arg3); 1310 vex_printf( ")" ); 1311 break; 1312 } 1313 case Iex_Binop: 1314 ppIROp(e->Iex.Binop.op); 1315 vex_printf( "(" ); 1316 ppIRExpr(e->Iex.Binop.arg1); 1317 vex_printf( "," ); 1318 ppIRExpr(e->Iex.Binop.arg2); 1319 vex_printf( ")" ); 1320 break; 1321 case Iex_Unop: 1322 ppIROp(e->Iex.Unop.op); 1323 vex_printf( "(" ); 1324 ppIRExpr(e->Iex.Unop.arg); 1325 vex_printf( ")" ); 1326 break; 1327 case Iex_Load: 1328 vex_printf( "LD%s:", e->Iex.Load.end==Iend_LE ? "le" : "be" ); 1329 ppIRType(e->Iex.Load.ty); 1330 vex_printf( "(" ); 1331 ppIRExpr(e->Iex.Load.addr); 1332 vex_printf( ")" ); 1333 break; 1334 case Iex_Const: 1335 ppIRConst(e->Iex.Const.con); 1336 break; 1337 case Iex_CCall: 1338 ppIRCallee(e->Iex.CCall.cee); 1339 vex_printf("("); 1340 for (i = 0; e->Iex.CCall.args[i] != NULL; i++) { 1341 IRExpr* arg = e->Iex.CCall.args[i]; 1342 ppIRExpr(arg); 1343 1344 if (e->Iex.CCall.args[i+1] != NULL) { 1345 vex_printf(","); 1346 } 1347 } 1348 vex_printf("):"); 1349 ppIRType(e->Iex.CCall.retty); 1350 break; 1351 case Iex_ITE: 1352 vex_printf("ITE("); 1353 ppIRExpr(e->Iex.ITE.cond); 1354 vex_printf(","); 1355 ppIRExpr(e->Iex.ITE.iftrue); 1356 vex_printf(","); 1357 ppIRExpr(e->Iex.ITE.iffalse); 1358 vex_printf(")"); 1359 break; 1360 case Iex_VECRET: 1361 vex_printf("VECRET"); 1362 break; 1363 case Iex_BBPTR: 1364 vex_printf("BBPTR"); 1365 break; 1366 default: 1367 vpanic("ppIRExpr"); 1368 } 1369 } 1370 1371 void ppIREffect ( IREffect fx ) 1372 { 1373 switch (fx) { 1374 case Ifx_None: vex_printf("noFX"); return; 1375 case Ifx_Read: vex_printf("RdFX"); return; 1376 case Ifx_Write: vex_printf("WrFX"); return; 1377 case Ifx_Modify: vex_printf("MoFX"); return; 1378 default: vpanic("ppIREffect"); 1379 } 1380 } 1381 1382 void ppIRDirty ( const IRDirty* d ) 1383 { 1384 Int i; 1385 if (d->tmp != IRTemp_INVALID) { 1386 ppIRTemp(d->tmp); 1387 vex_printf(" = "); 1388 } 1389 vex_printf("DIRTY "); 1390 ppIRExpr(d->guard); 1391 if (d->mFx != Ifx_None) { 1392 vex_printf(" "); 1393 ppIREffect(d->mFx); 1394 vex_printf("-mem("); 1395 ppIRExpr(d->mAddr); 1396 vex_printf(",%d)", d->mSize); 1397 } 1398 for (i = 0; i < d->nFxState; i++) { 1399 vex_printf(" "); 1400 ppIREffect(d->fxState[i].fx); 1401 vex_printf("-gst(%u,%u", (UInt)d->fxState[i].offset, 1402 (UInt)d->fxState[i].size); 1403 if (d->fxState[i].nRepeats > 0) { 1404 vex_printf(",reps%u,step%u", (UInt)d->fxState[i].nRepeats, 1405 (UInt)d->fxState[i].repeatLen); 1406 } 1407 vex_printf(")"); 1408 } 1409 vex_printf(" ::: "); 1410 ppIRCallee(d->cee); 1411 vex_printf("("); 1412 for (i = 0; d->args[i] != NULL; i++) { 1413 IRExpr* arg = d->args[i]; 1414 ppIRExpr(arg); 1415 1416 if (d->args[i+1] != NULL) { 1417 vex_printf(","); 1418 } 1419 } 1420 vex_printf(")"); 1421 } 1422 1423 void ppIRCAS ( const IRCAS* cas ) 1424 { 1425 /* Print even structurally invalid constructions, as an aid to 1426 debugging. */ 1427 if (cas->oldHi != IRTemp_INVALID) { 1428 ppIRTemp(cas->oldHi); 1429 vex_printf(","); 1430 } 1431 ppIRTemp(cas->oldLo); 1432 vex_printf(" = CAS%s(", cas->end==Iend_LE ? "le" : "be" ); 1433 ppIRExpr(cas->addr); 1434 vex_printf("::"); 1435 if (cas->expdHi) { 1436 ppIRExpr(cas->expdHi); 1437 vex_printf(","); 1438 } 1439 ppIRExpr(cas->expdLo); 1440 vex_printf("->"); 1441 if (cas->dataHi) { 1442 ppIRExpr(cas->dataHi); 1443 vex_printf(","); 1444 } 1445 ppIRExpr(cas->dataLo); 1446 vex_printf(")"); 1447 } 1448 1449 void ppIRPutI ( const IRPutI* puti ) 1450 { 1451 vex_printf( "PUTI" ); 1452 ppIRRegArray(puti->descr); 1453 vex_printf("["); 1454 ppIRExpr(puti->ix); 1455 vex_printf(",%d] = ", puti->bias); 1456 ppIRExpr(puti->data); 1457 } 1458 1459 void ppIRStoreG ( const IRStoreG* sg ) 1460 { 1461 vex_printf("if ("); 1462 ppIRExpr(sg->guard); 1463 vex_printf(") { ST%s(", sg->end==Iend_LE ? "le" : "be"); 1464 ppIRExpr(sg->addr); 1465 vex_printf(") = "); 1466 ppIRExpr(sg->data); 1467 vex_printf(" }"); 1468 } 1469 1470 void ppIRLoadGOp ( IRLoadGOp cvt ) 1471 { 1472 switch (cvt) { 1473 case ILGop_INVALID: vex_printf("ILGop_INVALID"); break; 1474 case ILGop_Ident64: vex_printf("Ident64"); break; 1475 case ILGop_Ident32: vex_printf("Ident32"); break; 1476 case ILGop_16Uto32: vex_printf("16Uto32"); break; 1477 case ILGop_16Sto32: vex_printf("16Sto32"); break; 1478 case ILGop_8Uto32: vex_printf("8Uto32"); break; 1479 case ILGop_8Sto32: vex_printf("8Sto32"); break; 1480 default: vpanic("ppIRLoadGOp"); 1481 } 1482 } 1483 1484 void ppIRLoadG ( const IRLoadG* lg ) 1485 { 1486 ppIRTemp(lg->dst); 1487 vex_printf(" = if-strict ("); 1488 ppIRExpr(lg->guard); 1489 vex_printf(") "); 1490 ppIRLoadGOp(lg->cvt); 1491 vex_printf("(LD%s(", lg->end==Iend_LE ? "le" : "be"); 1492 ppIRExpr(lg->addr); 1493 vex_printf(")) else "); 1494 ppIRExpr(lg->alt); 1495 } 1496 1497 void ppIRJumpKind ( IRJumpKind kind ) 1498 { 1499 switch (kind) { 1500 case Ijk_Boring: vex_printf("Boring"); break; 1501 case Ijk_Call: vex_printf("Call"); break; 1502 case Ijk_Ret: vex_printf("Return"); break; 1503 case Ijk_ClientReq: vex_printf("ClientReq"); break; 1504 case Ijk_Yield: vex_printf("Yield"); break; 1505 case Ijk_EmWarn: vex_printf("EmWarn"); break; 1506 case Ijk_EmFail: vex_printf("EmFail"); break; 1507 case Ijk_NoDecode: vex_printf("NoDecode"); break; 1508 case Ijk_MapFail: vex_printf("MapFail"); break; 1509 case Ijk_InvalICache: vex_printf("InvalICache"); break; 1510 case Ijk_FlushDCache: vex_printf("FlushDCache"); break; 1511 case Ijk_NoRedir: vex_printf("NoRedir"); break; 1512 case Ijk_SigILL: vex_printf("SigILL"); break; 1513 case Ijk_SigTRAP: vex_printf("SigTRAP"); break; 1514 case Ijk_SigSEGV: vex_printf("SigSEGV"); break; 1515 case Ijk_SigBUS: vex_printf("SigBUS"); break; 1516 case Ijk_SigFPE_IntDiv: vex_printf("SigFPE_IntDiv"); break; 1517 case Ijk_SigFPE_IntOvf: vex_printf("SigFPE_IntOvf"); break; 1518 case Ijk_Sys_syscall: vex_printf("Sys_syscall"); break; 1519 case Ijk_Sys_int32: vex_printf("Sys_int32"); break; 1520 case Ijk_Sys_int128: vex_printf("Sys_int128"); break; 1521 case Ijk_Sys_int129: vex_printf("Sys_int129"); break; 1522 case Ijk_Sys_int130: vex_printf("Sys_int130"); break; 1523 case Ijk_Sys_sysenter: vex_printf("Sys_sysenter"); break; 1524 default: vpanic("ppIRJumpKind"); 1525 } 1526 } 1527 1528 void ppIRMBusEvent ( IRMBusEvent event ) 1529 { 1530 switch (event) { 1531 case Imbe_Fence: 1532 vex_printf("Fence"); break; 1533 case Imbe_CancelReservation: 1534 vex_printf("CancelReservation"); break; 1535 default: 1536 vpanic("ppIRMBusEvent"); 1537 } 1538 } 1539 1540 void ppIRStmt ( const IRStmt* s ) 1541 { 1542 if (!s) { 1543 vex_printf("!!! IRStmt* which is NULL !!!"); 1544 return; 1545 } 1546 switch (s->tag) { 1547 case Ist_NoOp: 1548 vex_printf("IR-NoOp"); 1549 break; 1550 case Ist_IMark: 1551 vex_printf( "------ IMark(0x%lx, %u, %u) ------", 1552 s->Ist.IMark.addr, s->Ist.IMark.len, 1553 (UInt)s->Ist.IMark.delta); 1554 break; 1555 case Ist_AbiHint: 1556 vex_printf("====== AbiHint("); 1557 ppIRExpr(s->Ist.AbiHint.base); 1558 vex_printf(", %d, ", s->Ist.AbiHint.len); 1559 ppIRExpr(s->Ist.AbiHint.nia); 1560 vex_printf(") ======"); 1561 break; 1562 case Ist_Put: 1563 vex_printf( "PUT(%d) = ", s->Ist.Put.offset); 1564 ppIRExpr(s->Ist.Put.data); 1565 break; 1566 case Ist_PutI: 1567 ppIRPutI(s->Ist.PutI.details); 1568 break; 1569 case Ist_WrTmp: 1570 ppIRTemp(s->Ist.WrTmp.tmp); 1571 vex_printf( " = " ); 1572 ppIRExpr(s->Ist.WrTmp.data); 1573 break; 1574 case Ist_Store: 1575 vex_printf( "ST%s(", s->Ist.Store.end==Iend_LE ? "le" : "be" ); 1576 ppIRExpr(s->Ist.Store.addr); 1577 vex_printf( ") = "); 1578 ppIRExpr(s->Ist.Store.data); 1579 break; 1580 case Ist_StoreG: 1581 ppIRStoreG(s->Ist.StoreG.details); 1582 break; 1583 case Ist_LoadG: 1584 ppIRLoadG(s->Ist.LoadG.details); 1585 break; 1586 case Ist_CAS: 1587 ppIRCAS(s->Ist.CAS.details); 1588 break; 1589 case Ist_LLSC: 1590 if (s->Ist.LLSC.storedata == NULL) { 1591 ppIRTemp(s->Ist.LLSC.result); 1592 vex_printf(" = LD%s-Linked(", 1593 s->Ist.LLSC.end==Iend_LE ? "le" : "be"); 1594 ppIRExpr(s->Ist.LLSC.addr); 1595 vex_printf(")"); 1596 } else { 1597 ppIRTemp(s->Ist.LLSC.result); 1598 vex_printf(" = ( ST%s-Cond(", 1599 s->Ist.LLSC.end==Iend_LE ? "le" : "be"); 1600 ppIRExpr(s->Ist.LLSC.addr); 1601 vex_printf(") = "); 1602 ppIRExpr(s->Ist.LLSC.storedata); 1603 vex_printf(" )"); 1604 } 1605 break; 1606 case Ist_Dirty: 1607 ppIRDirty(s->Ist.Dirty.details); 1608 break; 1609 case Ist_MBE: 1610 vex_printf("IR-"); 1611 ppIRMBusEvent(s->Ist.MBE.event); 1612 break; 1613 case Ist_Exit: 1614 vex_printf( "if (" ); 1615 ppIRExpr(s->Ist.Exit.guard); 1616 vex_printf( ") { PUT(%d) = ", s->Ist.Exit.offsIP); 1617 ppIRConst(s->Ist.Exit.dst); 1618 vex_printf("; exit-"); 1619 ppIRJumpKind(s->Ist.Exit.jk); 1620 vex_printf(" } "); 1621 break; 1622 default: 1623 vpanic("ppIRStmt"); 1624 } 1625 } 1626 1627 void ppIRTypeEnv ( const IRTypeEnv* env ) 1628 { 1629 UInt i; 1630 for (i = 0; i < env->types_used; i++) { 1631 if (i % 8 == 0) 1632 vex_printf( " "); 1633 ppIRTemp(i); 1634 vex_printf( ":"); 1635 ppIRType(env->types[i]); 1636 if (i % 8 == 7) 1637 vex_printf( "\n"); 1638 else 1639 vex_printf( " "); 1640 } 1641 if (env->types_used > 0 && env->types_used % 8 != 7) 1642 vex_printf( "\n"); 1643 } 1644 1645 void ppIRSB ( const IRSB* bb ) 1646 { 1647 Int i; 1648 vex_printf("IRSB {\n"); 1649 ppIRTypeEnv(bb->tyenv); 1650 vex_printf("\n"); 1651 for (i = 0; i < bb->stmts_used; i++) { 1652 vex_printf( " "); 1653 ppIRStmt(bb->stmts[i]); 1654 vex_printf( "\n"); 1655 } 1656 vex_printf( " PUT(%d) = ", bb->offsIP ); 1657 ppIRExpr( bb->next ); 1658 vex_printf( "; exit-"); 1659 ppIRJumpKind(bb->jumpkind); 1660 vex_printf( "\n}\n"); 1661 } 1662 1663 1664 /*---------------------------------------------------------------*/ 1665 /*--- Constructors ---*/ 1666 /*---------------------------------------------------------------*/ 1667 1668 1669 /* Constructors -- IRConst */ 1670 1671 IRConst* IRConst_U1 ( Bool bit ) 1672 { 1673 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst)); 1674 c->tag = Ico_U1; 1675 c->Ico.U1 = bit; 1676 /* call me paranoid; I don't care :-) */ 1677 vassert(bit == False || bit == True); 1678 return c; 1679 } 1680 IRConst* IRConst_U8 ( UChar u8 ) 1681 { 1682 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst)); 1683 c->tag = Ico_U8; 1684 c->Ico.U8 = u8; 1685 return c; 1686 } 1687 IRConst* IRConst_U16 ( UShort u16 ) 1688 { 1689 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst)); 1690 c->tag = Ico_U16; 1691 c->Ico.U16 = u16; 1692 return c; 1693 } 1694 IRConst* IRConst_U32 ( UInt u32 ) 1695 { 1696 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst)); 1697 c->tag = Ico_U32; 1698 c->Ico.U32 = u32; 1699 return c; 1700 } 1701 IRConst* IRConst_U64 ( ULong u64 ) 1702 { 1703 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst)); 1704 c->tag = Ico_U64; 1705 c->Ico.U64 = u64; 1706 return c; 1707 } 1708 IRConst* IRConst_F32 ( Float f32 ) 1709 { 1710 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst)); 1711 c->tag = Ico_F32; 1712 c->Ico.F32 = f32; 1713 return c; 1714 } 1715 IRConst* IRConst_F32i ( UInt f32i ) 1716 { 1717 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst)); 1718 c->tag = Ico_F32i; 1719 c->Ico.F32i = f32i; 1720 return c; 1721 } 1722 IRConst* IRConst_F64 ( Double f64 ) 1723 { 1724 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst)); 1725 c->tag = Ico_F64; 1726 c->Ico.F64 = f64; 1727 return c; 1728 } 1729 IRConst* IRConst_F64i ( ULong f64i ) 1730 { 1731 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst)); 1732 c->tag = Ico_F64i; 1733 c->Ico.F64i = f64i; 1734 return c; 1735 } 1736 IRConst* IRConst_V128 ( UShort con ) 1737 { 1738 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst)); 1739 c->tag = Ico_V128; 1740 c->Ico.V128 = con; 1741 return c; 1742 } 1743 IRConst* IRConst_V256 ( UInt con ) 1744 { 1745 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst)); 1746 c->tag = Ico_V256; 1747 c->Ico.V256 = con; 1748 return c; 1749 } 1750 1751 /* Constructors -- IRCallee */ 1752 1753 IRCallee* mkIRCallee ( Int regparms, const HChar* name, void* addr ) 1754 { 1755 IRCallee* ce = LibVEX_Alloc_inline(sizeof(IRCallee)); 1756 ce->regparms = regparms; 1757 ce->name = name; 1758 ce->addr = addr; 1759 ce->mcx_mask = 0; 1760 vassert(regparms >= 0 && regparms <= 3); 1761 vassert(name != NULL); 1762 vassert(addr != 0); 1763 return ce; 1764 } 1765 1766 1767 /* Constructors -- IRRegArray */ 1768 1769 IRRegArray* mkIRRegArray ( Int base, IRType elemTy, Int nElems ) 1770 { 1771 IRRegArray* arr = LibVEX_Alloc_inline(sizeof(IRRegArray)); 1772 arr->base = base; 1773 arr->elemTy = elemTy; 1774 arr->nElems = nElems; 1775 vassert(!(arr->base < 0 || arr->base > 10000 /* somewhat arbitrary */)); 1776 vassert(!(arr->elemTy == Ity_I1)); 1777 vassert(!(arr->nElems <= 0 || arr->nElems > 500 /* somewhat arbitrary */)); 1778 return arr; 1779 } 1780 1781 1782 /* Constructors -- IRExpr */ 1783 1784 IRExpr* IRExpr_Binder ( Int binder ) { 1785 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1786 e->tag = Iex_Binder; 1787 e->Iex.Binder.binder = binder; 1788 return e; 1789 } 1790 IRExpr* IRExpr_Get ( Int off, IRType ty ) { 1791 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1792 e->tag = Iex_Get; 1793 e->Iex.Get.offset = off; 1794 e->Iex.Get.ty = ty; 1795 return e; 1796 } 1797 IRExpr* IRExpr_GetI ( IRRegArray* descr, IRExpr* ix, Int bias ) { 1798 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1799 e->tag = Iex_GetI; 1800 e->Iex.GetI.descr = descr; 1801 e->Iex.GetI.ix = ix; 1802 e->Iex.GetI.bias = bias; 1803 return e; 1804 } 1805 IRExpr* IRExpr_RdTmp ( IRTemp tmp ) { 1806 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1807 e->tag = Iex_RdTmp; 1808 e->Iex.RdTmp.tmp = tmp; 1809 return e; 1810 } 1811 IRExpr* IRExpr_Qop ( IROp op, IRExpr* arg1, IRExpr* arg2, 1812 IRExpr* arg3, IRExpr* arg4 ) { 1813 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1814 IRQop* qop = LibVEX_Alloc_inline(sizeof(IRQop)); 1815 qop->op = op; 1816 qop->arg1 = arg1; 1817 qop->arg2 = arg2; 1818 qop->arg3 = arg3; 1819 qop->arg4 = arg4; 1820 e->tag = Iex_Qop; 1821 e->Iex.Qop.details = qop; 1822 return e; 1823 } 1824 IRExpr* IRExpr_Triop ( IROp op, IRExpr* arg1, 1825 IRExpr* arg2, IRExpr* arg3 ) { 1826 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1827 IRTriop* triop = LibVEX_Alloc_inline(sizeof(IRTriop)); 1828 triop->op = op; 1829 triop->arg1 = arg1; 1830 triop->arg2 = arg2; 1831 triop->arg3 = arg3; 1832 e->tag = Iex_Triop; 1833 e->Iex.Triop.details = triop; 1834 return e; 1835 } 1836 IRExpr* IRExpr_Binop ( IROp op, IRExpr* arg1, IRExpr* arg2 ) { 1837 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1838 e->tag = Iex_Binop; 1839 e->Iex.Binop.op = op; 1840 e->Iex.Binop.arg1 = arg1; 1841 e->Iex.Binop.arg2 = arg2; 1842 return e; 1843 } 1844 IRExpr* IRExpr_Unop ( IROp op, IRExpr* arg ) { 1845 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1846 e->tag = Iex_Unop; 1847 e->Iex.Unop.op = op; 1848 e->Iex.Unop.arg = arg; 1849 return e; 1850 } 1851 IRExpr* IRExpr_Load ( IREndness end, IRType ty, IRExpr* addr ) { 1852 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1853 e->tag = Iex_Load; 1854 e->Iex.Load.end = end; 1855 e->Iex.Load.ty = ty; 1856 e->Iex.Load.addr = addr; 1857 vassert(end == Iend_LE || end == Iend_BE); 1858 return e; 1859 } 1860 IRExpr* IRExpr_Const ( IRConst* con ) { 1861 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1862 e->tag = Iex_Const; 1863 e->Iex.Const.con = con; 1864 return e; 1865 } 1866 IRExpr* IRExpr_CCall ( IRCallee* cee, IRType retty, IRExpr** args ) { 1867 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1868 e->tag = Iex_CCall; 1869 e->Iex.CCall.cee = cee; 1870 e->Iex.CCall.retty = retty; 1871 e->Iex.CCall.args = args; 1872 return e; 1873 } 1874 IRExpr* IRExpr_ITE ( IRExpr* cond, IRExpr* iftrue, IRExpr* iffalse ) { 1875 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1876 e->tag = Iex_ITE; 1877 e->Iex.ITE.cond = cond; 1878 e->Iex.ITE.iftrue = iftrue; 1879 e->Iex.ITE.iffalse = iffalse; 1880 return e; 1881 } 1882 IRExpr* IRExpr_VECRET ( void ) { 1883 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1884 e->tag = Iex_VECRET; 1885 return e; 1886 } 1887 IRExpr* IRExpr_BBPTR ( void ) { 1888 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1889 e->tag = Iex_BBPTR; 1890 return e; 1891 } 1892 1893 1894 /* Constructors for NULL-terminated IRExpr expression vectors, 1895 suitable for use as arg lists in clean/dirty helper calls. */ 1896 1897 IRExpr** mkIRExprVec_0 ( void ) { 1898 IRExpr** vec = LibVEX_Alloc_inline(1 * sizeof(IRExpr*)); 1899 vec[0] = NULL; 1900 return vec; 1901 } 1902 IRExpr** mkIRExprVec_1 ( IRExpr* arg1 ) { 1903 IRExpr** vec = LibVEX_Alloc_inline(2 * sizeof(IRExpr*)); 1904 vec[0] = arg1; 1905 vec[1] = NULL; 1906 return vec; 1907 } 1908 IRExpr** mkIRExprVec_2 ( IRExpr* arg1, IRExpr* arg2 ) { 1909 IRExpr** vec = LibVEX_Alloc_inline(3 * sizeof(IRExpr*)); 1910 vec[0] = arg1; 1911 vec[1] = arg2; 1912 vec[2] = NULL; 1913 return vec; 1914 } 1915 IRExpr** mkIRExprVec_3 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3 ) { 1916 IRExpr** vec = LibVEX_Alloc_inline(4 * sizeof(IRExpr*)); 1917 vec[0] = arg1; 1918 vec[1] = arg2; 1919 vec[2] = arg3; 1920 vec[3] = NULL; 1921 return vec; 1922 } 1923 IRExpr** mkIRExprVec_4 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3, 1924 IRExpr* arg4 ) { 1925 IRExpr** vec = LibVEX_Alloc_inline(5 * sizeof(IRExpr*)); 1926 vec[0] = arg1; 1927 vec[1] = arg2; 1928 vec[2] = arg3; 1929 vec[3] = arg4; 1930 vec[4] = NULL; 1931 return vec; 1932 } 1933 IRExpr** mkIRExprVec_5 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3, 1934 IRExpr* arg4, IRExpr* arg5 ) { 1935 IRExpr** vec = LibVEX_Alloc_inline(6 * sizeof(IRExpr*)); 1936 vec[0] = arg1; 1937 vec[1] = arg2; 1938 vec[2] = arg3; 1939 vec[3] = arg4; 1940 vec[4] = arg5; 1941 vec[5] = NULL; 1942 return vec; 1943 } 1944 IRExpr** mkIRExprVec_6 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3, 1945 IRExpr* arg4, IRExpr* arg5, IRExpr* arg6 ) { 1946 IRExpr** vec = LibVEX_Alloc_inline(7 * sizeof(IRExpr*)); 1947 vec[0] = arg1; 1948 vec[1] = arg2; 1949 vec[2] = arg3; 1950 vec[3] = arg4; 1951 vec[4] = arg5; 1952 vec[5] = arg6; 1953 vec[6] = NULL; 1954 return vec; 1955 } 1956 IRExpr** mkIRExprVec_7 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3, 1957 IRExpr* arg4, IRExpr* arg5, IRExpr* arg6, 1958 IRExpr* arg7 ) { 1959 IRExpr** vec = LibVEX_Alloc_inline(8 * sizeof(IRExpr*)); 1960 vec[0] = arg1; 1961 vec[1] = arg2; 1962 vec[2] = arg3; 1963 vec[3] = arg4; 1964 vec[4] = arg5; 1965 vec[5] = arg6; 1966 vec[6] = arg7; 1967 vec[7] = NULL; 1968 return vec; 1969 } 1970 IRExpr** mkIRExprVec_8 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3, 1971 IRExpr* arg4, IRExpr* arg5, IRExpr* arg6, 1972 IRExpr* arg7, IRExpr* arg8 ) { 1973 IRExpr** vec = LibVEX_Alloc_inline(9 * sizeof(IRExpr*)); 1974 vec[0] = arg1; 1975 vec[1] = arg2; 1976 vec[2] = arg3; 1977 vec[3] = arg4; 1978 vec[4] = arg5; 1979 vec[5] = arg6; 1980 vec[6] = arg7; 1981 vec[7] = arg8; 1982 vec[8] = NULL; 1983 return vec; 1984 } 1985 1986 1987 /* Constructors -- IRDirty */ 1988 1989 IRDirty* emptyIRDirty ( void ) { 1990 IRDirty* d = LibVEX_Alloc_inline(sizeof(IRDirty)); 1991 d->cee = NULL; 1992 d->guard = NULL; 1993 d->args = NULL; 1994 d->tmp = IRTemp_INVALID; 1995 d->mFx = Ifx_None; 1996 d->mAddr = NULL; 1997 d->mSize = 0; 1998 d->nFxState = 0; 1999 return d; 2000 } 2001 2002 2003 /* Constructors -- IRCAS */ 2004 2005 IRCAS* mkIRCAS ( IRTemp oldHi, IRTemp oldLo, 2006 IREndness end, IRExpr* addr, 2007 IRExpr* expdHi, IRExpr* expdLo, 2008 IRExpr* dataHi, IRExpr* dataLo ) { 2009 IRCAS* cas = LibVEX_Alloc_inline(sizeof(IRCAS)); 2010 cas->oldHi = oldHi; 2011 cas->oldLo = oldLo; 2012 cas->end = end; 2013 cas->addr = addr; 2014 cas->expdHi = expdHi; 2015 cas->expdLo = expdLo; 2016 cas->dataHi = dataHi; 2017 cas->dataLo = dataLo; 2018 return cas; 2019 } 2020 2021 2022 /* Constructors -- IRPutI */ 2023 2024 IRPutI* mkIRPutI ( IRRegArray* descr, IRExpr* ix, 2025 Int bias, IRExpr* data ) 2026 { 2027 IRPutI* puti = LibVEX_Alloc_inline(sizeof(IRPutI)); 2028 puti->descr = descr; 2029 puti->ix = ix; 2030 puti->bias = bias; 2031 puti->data = data; 2032 return puti; 2033 } 2034 2035 2036 /* Constructors -- IRStoreG and IRLoadG */ 2037 2038 IRStoreG* mkIRStoreG ( IREndness end, 2039 IRExpr* addr, IRExpr* data, IRExpr* guard ) 2040 { 2041 IRStoreG* sg = LibVEX_Alloc_inline(sizeof(IRStoreG)); 2042 sg->end = end; 2043 sg->addr = addr; 2044 sg->data = data; 2045 sg->guard = guard; 2046 return sg; 2047 } 2048 2049 IRLoadG* mkIRLoadG ( IREndness end, IRLoadGOp cvt, 2050 IRTemp dst, IRExpr* addr, IRExpr* alt, IRExpr* guard ) 2051 { 2052 IRLoadG* lg = LibVEX_Alloc_inline(sizeof(IRLoadG)); 2053 lg->end = end; 2054 lg->cvt = cvt; 2055 lg->dst = dst; 2056 lg->addr = addr; 2057 lg->alt = alt; 2058 lg->guard = guard; 2059 return lg; 2060 } 2061 2062 2063 /* Constructors -- IRStmt */ 2064 2065 IRStmt* IRStmt_NoOp ( void ) 2066 { 2067 /* Just use a single static closure. */ 2068 static IRStmt static_closure; 2069 static_closure.tag = Ist_NoOp; 2070 return &static_closure; 2071 } 2072 IRStmt* IRStmt_IMark ( Addr addr, UInt len, UChar delta ) { 2073 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2074 s->tag = Ist_IMark; 2075 s->Ist.IMark.addr = addr; 2076 s->Ist.IMark.len = len; 2077 s->Ist.IMark.delta = delta; 2078 return s; 2079 } 2080 IRStmt* IRStmt_AbiHint ( IRExpr* base, Int len, IRExpr* nia ) { 2081 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2082 s->tag = Ist_AbiHint; 2083 s->Ist.AbiHint.base = base; 2084 s->Ist.AbiHint.len = len; 2085 s->Ist.AbiHint.nia = nia; 2086 return s; 2087 } 2088 IRStmt* IRStmt_Put ( Int off, IRExpr* data ) { 2089 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2090 s->tag = Ist_Put; 2091 s->Ist.Put.offset = off; 2092 s->Ist.Put.data = data; 2093 return s; 2094 } 2095 IRStmt* IRStmt_PutI ( IRPutI* details ) { 2096 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2097 s->tag = Ist_PutI; 2098 s->Ist.PutI.details = details; 2099 return s; 2100 } 2101 IRStmt* IRStmt_WrTmp ( IRTemp tmp, IRExpr* data ) { 2102 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2103 s->tag = Ist_WrTmp; 2104 s->Ist.WrTmp.tmp = tmp; 2105 s->Ist.WrTmp.data = data; 2106 return s; 2107 } 2108 IRStmt* IRStmt_Store ( IREndness end, IRExpr* addr, IRExpr* data ) { 2109 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2110 s->tag = Ist_Store; 2111 s->Ist.Store.end = end; 2112 s->Ist.Store.addr = addr; 2113 s->Ist.Store.data = data; 2114 vassert(end == Iend_LE || end == Iend_BE); 2115 return s; 2116 } 2117 IRStmt* IRStmt_StoreG ( IREndness end, IRExpr* addr, IRExpr* data, 2118 IRExpr* guard ) { 2119 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2120 s->tag = Ist_StoreG; 2121 s->Ist.StoreG.details = mkIRStoreG(end, addr, data, guard); 2122 vassert(end == Iend_LE || end == Iend_BE); 2123 return s; 2124 } 2125 IRStmt* IRStmt_LoadG ( IREndness end, IRLoadGOp cvt, IRTemp dst, 2126 IRExpr* addr, IRExpr* alt, IRExpr* guard ) { 2127 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2128 s->tag = Ist_LoadG; 2129 s->Ist.LoadG.details = mkIRLoadG(end, cvt, dst, addr, alt, guard); 2130 return s; 2131 } 2132 IRStmt* IRStmt_CAS ( IRCAS* cas ) { 2133 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2134 s->tag = Ist_CAS; 2135 s->Ist.CAS.details = cas; 2136 return s; 2137 } 2138 IRStmt* IRStmt_LLSC ( IREndness end, 2139 IRTemp result, IRExpr* addr, IRExpr* storedata ) { 2140 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2141 s->tag = Ist_LLSC; 2142 s->Ist.LLSC.end = end; 2143 s->Ist.LLSC.result = result; 2144 s->Ist.LLSC.addr = addr; 2145 s->Ist.LLSC.storedata = storedata; 2146 return s; 2147 } 2148 IRStmt* IRStmt_Dirty ( IRDirty* d ) 2149 { 2150 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2151 s->tag = Ist_Dirty; 2152 s->Ist.Dirty.details = d; 2153 return s; 2154 } 2155 IRStmt* IRStmt_MBE ( IRMBusEvent event ) 2156 { 2157 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2158 s->tag = Ist_MBE; 2159 s->Ist.MBE.event = event; 2160 return s; 2161 } 2162 IRStmt* IRStmt_Exit ( IRExpr* guard, IRJumpKind jk, IRConst* dst, 2163 Int offsIP ) { 2164 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2165 s->tag = Ist_Exit; 2166 s->Ist.Exit.guard = guard; 2167 s->Ist.Exit.jk = jk; 2168 s->Ist.Exit.dst = dst; 2169 s->Ist.Exit.offsIP = offsIP; 2170 return s; 2171 } 2172 2173 2174 /* Constructors -- IRTypeEnv */ 2175 2176 IRTypeEnv* emptyIRTypeEnv ( void ) 2177 { 2178 IRTypeEnv* env = LibVEX_Alloc_inline(sizeof(IRTypeEnv)); 2179 env->types = LibVEX_Alloc_inline(8 * sizeof(IRType)); 2180 env->types_size = 8; 2181 env->types_used = 0; 2182 return env; 2183 } 2184 2185 2186 /* Constructors -- IRSB */ 2187 2188 IRSB* emptyIRSB ( void ) 2189 { 2190 IRSB* bb = LibVEX_Alloc_inline(sizeof(IRSB)); 2191 bb->tyenv = emptyIRTypeEnv(); 2192 bb->stmts_used = 0; 2193 bb->stmts_size = 8; 2194 bb->stmts = LibVEX_Alloc_inline(bb->stmts_size * sizeof(IRStmt*)); 2195 bb->next = NULL; 2196 bb->jumpkind = Ijk_Boring; 2197 bb->offsIP = 0; 2198 return bb; 2199 } 2200 2201 2202 /*---------------------------------------------------------------*/ 2203 /*--- (Deep) copy constructors. These make complete copies ---*/ 2204 /*--- the original, which can be modified without affecting ---*/ 2205 /*--- the original. ---*/ 2206 /*---------------------------------------------------------------*/ 2207 2208 /* Copying IR Expr vectors (for call args). */ 2209 2210 /* Shallow copy of an IRExpr vector */ 2211 2212 IRExpr** shallowCopyIRExprVec ( IRExpr** vec ) 2213 { 2214 Int i; 2215 IRExpr** newvec; 2216 for (i = 0; vec[i]; i++) 2217 ; 2218 newvec = LibVEX_Alloc_inline((i+1)*sizeof(IRExpr*)); 2219 for (i = 0; vec[i]; i++) 2220 newvec[i] = vec[i]; 2221 newvec[i] = NULL; 2222 return newvec; 2223 } 2224 2225 /* Deep copy of an IRExpr vector */ 2226 2227 IRExpr** deepCopyIRExprVec ( IRExpr *const * vec ) 2228 { 2229 Int i; 2230 IRExpr** newvec; 2231 for (i = 0; vec[i]; i++) 2232 ; 2233 newvec = LibVEX_Alloc_inline((i+1)*sizeof(IRExpr*)); 2234 for (i = 0; vec[i]; i++) 2235 newvec[i] = deepCopyIRExpr(vec[i]); 2236 newvec[i] = NULL; 2237 return newvec; 2238 } 2239 2240 /* Deep copy constructors for all heap-allocated IR types follow. */ 2241 2242 IRConst* deepCopyIRConst ( const IRConst* c ) 2243 { 2244 switch (c->tag) { 2245 case Ico_U1: return IRConst_U1(c->Ico.U1); 2246 case Ico_U8: return IRConst_U8(c->Ico.U8); 2247 case Ico_U16: return IRConst_U16(c->Ico.U16); 2248 case Ico_U32: return IRConst_U32(c->Ico.U32); 2249 case Ico_U64: return IRConst_U64(c->Ico.U64); 2250 case Ico_F32: return IRConst_F32(c->Ico.F32); 2251 case Ico_F32i: return IRConst_F32i(c->Ico.F32i); 2252 case Ico_F64: return IRConst_F64(c->Ico.F64); 2253 case Ico_F64i: return IRConst_F64i(c->Ico.F64i); 2254 case Ico_V128: return IRConst_V128(c->Ico.V128); 2255 case Ico_V256: return IRConst_V256(c->Ico.V256); 2256 default: vpanic("deepCopyIRConst"); 2257 } 2258 } 2259 2260 IRCallee* deepCopyIRCallee ( const IRCallee* ce ) 2261 { 2262 IRCallee* ce2 = mkIRCallee(ce->regparms, ce->name, ce->addr); 2263 ce2->mcx_mask = ce->mcx_mask; 2264 return ce2; 2265 } 2266 2267 IRRegArray* deepCopyIRRegArray ( const IRRegArray* d ) 2268 { 2269 return mkIRRegArray(d->base, d->elemTy, d->nElems); 2270 } 2271 2272 IRExpr* deepCopyIRExpr ( const IRExpr* e ) 2273 { 2274 switch (e->tag) { 2275 case Iex_Get: 2276 return IRExpr_Get(e->Iex.Get.offset, e->Iex.Get.ty); 2277 case Iex_GetI: 2278 return IRExpr_GetI(deepCopyIRRegArray(e->Iex.GetI.descr), 2279 deepCopyIRExpr(e->Iex.GetI.ix), 2280 e->Iex.GetI.bias); 2281 case Iex_RdTmp: 2282 return IRExpr_RdTmp(e->Iex.RdTmp.tmp); 2283 case Iex_Qop: { 2284 const IRQop* qop = e->Iex.Qop.details; 2285 2286 return IRExpr_Qop(qop->op, 2287 deepCopyIRExpr(qop->arg1), 2288 deepCopyIRExpr(qop->arg2), 2289 deepCopyIRExpr(qop->arg3), 2290 deepCopyIRExpr(qop->arg4)); 2291 } 2292 case Iex_Triop: { 2293 const IRTriop *triop = e->Iex.Triop.details; 2294 2295 return IRExpr_Triop(triop->op, 2296 deepCopyIRExpr(triop->arg1), 2297 deepCopyIRExpr(triop->arg2), 2298 deepCopyIRExpr(triop->arg3)); 2299 } 2300 case Iex_Binop: 2301 return IRExpr_Binop(e->Iex.Binop.op, 2302 deepCopyIRExpr(e->Iex.Binop.arg1), 2303 deepCopyIRExpr(e->Iex.Binop.arg2)); 2304 case Iex_Unop: 2305 return IRExpr_Unop(e->Iex.Unop.op, 2306 deepCopyIRExpr(e->Iex.Unop.arg)); 2307 case Iex_Load: 2308 return IRExpr_Load(e->Iex.Load.end, 2309 e->Iex.Load.ty, 2310 deepCopyIRExpr(e->Iex.Load.addr)); 2311 case Iex_Const: 2312 return IRExpr_Const(deepCopyIRConst(e->Iex.Const.con)); 2313 case Iex_CCall: 2314 return IRExpr_CCall(deepCopyIRCallee(e->Iex.CCall.cee), 2315 e->Iex.CCall.retty, 2316 deepCopyIRExprVec(e->Iex.CCall.args)); 2317 2318 case Iex_ITE: 2319 return IRExpr_ITE(deepCopyIRExpr(e->Iex.ITE.cond), 2320 deepCopyIRExpr(e->Iex.ITE.iftrue), 2321 deepCopyIRExpr(e->Iex.ITE.iffalse)); 2322 case Iex_VECRET: 2323 return IRExpr_VECRET(); 2324 2325 case Iex_BBPTR: 2326 return IRExpr_BBPTR(); 2327 2328 case Iex_Binder: 2329 return IRExpr_Binder(e->Iex.Binder.binder); 2330 2331 default: 2332 vpanic("deepCopyIRExpr"); 2333 } 2334 } 2335 2336 IRDirty* deepCopyIRDirty ( const IRDirty* d ) 2337 { 2338 Int i; 2339 IRDirty* d2 = emptyIRDirty(); 2340 d2->cee = deepCopyIRCallee(d->cee); 2341 d2->guard = deepCopyIRExpr(d->guard); 2342 d2->args = deepCopyIRExprVec(d->args); 2343 d2->tmp = d->tmp; 2344 d2->mFx = d->mFx; 2345 d2->mAddr = d->mAddr==NULL ? NULL : deepCopyIRExpr(d->mAddr); 2346 d2->mSize = d->mSize; 2347 d2->nFxState = d->nFxState; 2348 for (i = 0; i < d2->nFxState; i++) 2349 d2->fxState[i] = d->fxState[i]; 2350 return d2; 2351 } 2352 2353 IRCAS* deepCopyIRCAS ( const IRCAS* cas ) 2354 { 2355 return mkIRCAS( cas->oldHi, cas->oldLo, cas->end, 2356 deepCopyIRExpr(cas->addr), 2357 cas->expdHi==NULL ? NULL : deepCopyIRExpr(cas->expdHi), 2358 deepCopyIRExpr(cas->expdLo), 2359 cas->dataHi==NULL ? NULL : deepCopyIRExpr(cas->dataHi), 2360 deepCopyIRExpr(cas->dataLo) ); 2361 } 2362 2363 IRPutI* deepCopyIRPutI ( const IRPutI * puti ) 2364 { 2365 return mkIRPutI( deepCopyIRRegArray(puti->descr), 2366 deepCopyIRExpr(puti->ix), 2367 puti->bias, 2368 deepCopyIRExpr(puti->data)); 2369 } 2370 2371 IRStmt* deepCopyIRStmt ( const IRStmt* s ) 2372 { 2373 switch (s->tag) { 2374 case Ist_NoOp: 2375 return IRStmt_NoOp(); 2376 case Ist_AbiHint: 2377 return IRStmt_AbiHint(deepCopyIRExpr(s->Ist.AbiHint.base), 2378 s->Ist.AbiHint.len, 2379 deepCopyIRExpr(s->Ist.AbiHint.nia)); 2380 case Ist_IMark: 2381 return IRStmt_IMark(s->Ist.IMark.addr, 2382 s->Ist.IMark.len, 2383 s->Ist.IMark.delta); 2384 case Ist_Put: 2385 return IRStmt_Put(s->Ist.Put.offset, 2386 deepCopyIRExpr(s->Ist.Put.data)); 2387 case Ist_PutI: 2388 return IRStmt_PutI(deepCopyIRPutI(s->Ist.PutI.details)); 2389 case Ist_WrTmp: 2390 return IRStmt_WrTmp(s->Ist.WrTmp.tmp, 2391 deepCopyIRExpr(s->Ist.WrTmp.data)); 2392 case Ist_Store: 2393 return IRStmt_Store(s->Ist.Store.end, 2394 deepCopyIRExpr(s->Ist.Store.addr), 2395 deepCopyIRExpr(s->Ist.Store.data)); 2396 case Ist_StoreG: { 2397 const IRStoreG* sg = s->Ist.StoreG.details; 2398 return IRStmt_StoreG(sg->end, 2399 deepCopyIRExpr(sg->addr), 2400 deepCopyIRExpr(sg->data), 2401 deepCopyIRExpr(sg->guard)); 2402 } 2403 case Ist_LoadG: { 2404 const IRLoadG* lg = s->Ist.LoadG.details; 2405 return IRStmt_LoadG(lg->end, lg->cvt, lg->dst, 2406 deepCopyIRExpr(lg->addr), 2407 deepCopyIRExpr(lg->alt), 2408 deepCopyIRExpr(lg->guard)); 2409 } 2410 case Ist_CAS: 2411 return IRStmt_CAS(deepCopyIRCAS(s->Ist.CAS.details)); 2412 case Ist_LLSC: 2413 return IRStmt_LLSC(s->Ist.LLSC.end, 2414 s->Ist.LLSC.result, 2415 deepCopyIRExpr(s->Ist.LLSC.addr), 2416 s->Ist.LLSC.storedata 2417 ? deepCopyIRExpr(s->Ist.LLSC.storedata) 2418 : NULL); 2419 case Ist_Dirty: 2420 return IRStmt_Dirty(deepCopyIRDirty(s->Ist.Dirty.details)); 2421 case Ist_MBE: 2422 return IRStmt_MBE(s->Ist.MBE.event); 2423 case Ist_Exit: 2424 return IRStmt_Exit(deepCopyIRExpr(s->Ist.Exit.guard), 2425 s->Ist.Exit.jk, 2426 deepCopyIRConst(s->Ist.Exit.dst), 2427 s->Ist.Exit.offsIP); 2428 default: 2429 vpanic("deepCopyIRStmt"); 2430 } 2431 } 2432 2433 IRTypeEnv* deepCopyIRTypeEnv ( const IRTypeEnv* src ) 2434 { 2435 Int i; 2436 IRTypeEnv* dst = LibVEX_Alloc_inline(sizeof(IRTypeEnv)); 2437 dst->types_size = src->types_size; 2438 dst->types_used = src->types_used; 2439 dst->types = LibVEX_Alloc_inline(dst->types_size * sizeof(IRType)); 2440 for (i = 0; i < src->types_used; i++) 2441 dst->types[i] = src->types[i]; 2442 return dst; 2443 } 2444 2445 IRSB* deepCopyIRSB ( const IRSB* bb ) 2446 { 2447 Int i; 2448 IRStmt** sts2; 2449 IRSB* bb2 = deepCopyIRSBExceptStmts(bb); 2450 bb2->stmts_used = bb2->stmts_size = bb->stmts_used; 2451 sts2 = LibVEX_Alloc_inline(bb2->stmts_used * sizeof(IRStmt*)); 2452 for (i = 0; i < bb2->stmts_used; i++) 2453 sts2[i] = deepCopyIRStmt(bb->stmts[i]); 2454 bb2->stmts = sts2; 2455 return bb2; 2456 } 2457 2458 IRSB* deepCopyIRSBExceptStmts ( const IRSB* bb ) 2459 { 2460 IRSB* bb2 = emptyIRSB(); 2461 bb2->tyenv = deepCopyIRTypeEnv(bb->tyenv); 2462 bb2->next = deepCopyIRExpr(bb->next); 2463 bb2->jumpkind = bb->jumpkind; 2464 bb2->offsIP = bb->offsIP; 2465 return bb2; 2466 } 2467 2468 2469 /*---------------------------------------------------------------*/ 2470 /*--- Primop types ---*/ 2471 /*---------------------------------------------------------------*/ 2472 2473 static 2474 void typeOfPrimop ( IROp op, 2475 /*OUTs*/ 2476 IRType* t_dst, 2477 IRType* t_arg1, IRType* t_arg2, 2478 IRType* t_arg3, IRType* t_arg4 ) 2479 { 2480 # define UNARY(_ta1,_td) \ 2481 *t_dst = (_td); *t_arg1 = (_ta1); break 2482 # define BINARY(_ta1,_ta2,_td) \ 2483 *t_dst = (_td); *t_arg1 = (_ta1); *t_arg2 = (_ta2); break 2484 # define TERNARY(_ta1,_ta2,_ta3,_td) \ 2485 *t_dst = (_td); *t_arg1 = (_ta1); \ 2486 *t_arg2 = (_ta2); *t_arg3 = (_ta3); break 2487 # define QUATERNARY(_ta1,_ta2,_ta3,_ta4,_td) \ 2488 *t_dst = (_td); *t_arg1 = (_ta1); \ 2489 *t_arg2 = (_ta2); *t_arg3 = (_ta3); \ 2490 *t_arg4 = (_ta4); break 2491 # define COMPARISON(_ta) \ 2492 *t_dst = Ity_I1; *t_arg1 = *t_arg2 = (_ta); break; 2493 # define UNARY_COMPARISON(_ta) \ 2494 *t_dst = Ity_I1; *t_arg1 = (_ta); break; 2495 2496 /* Rounding mode values are always Ity_I32, encoded as per 2497 IRRoundingMode */ 2498 const IRType ity_RMode = Ity_I32; 2499 2500 *t_dst = Ity_INVALID; 2501 *t_arg1 = Ity_INVALID; 2502 *t_arg2 = Ity_INVALID; 2503 *t_arg3 = Ity_INVALID; 2504 *t_arg4 = Ity_INVALID; 2505 switch (op) { 2506 case Iop_Add8: case Iop_Sub8: case Iop_Mul8: 2507 case Iop_Or8: case Iop_And8: case Iop_Xor8: 2508 BINARY(Ity_I8,Ity_I8, Ity_I8); 2509 2510 case Iop_Add16: case Iop_Sub16: case Iop_Mul16: 2511 case Iop_Or16: case Iop_And16: case Iop_Xor16: 2512 BINARY(Ity_I16,Ity_I16, Ity_I16); 2513 2514 case Iop_CmpORD32U: 2515 case Iop_CmpORD32S: 2516 case Iop_Add32: case Iop_Sub32: case Iop_Mul32: 2517 case Iop_Or32: case Iop_And32: case Iop_Xor32: 2518 case Iop_Max32U: 2519 case Iop_QAdd32S: case Iop_QSub32S: 2520 case Iop_Add16x2: case Iop_Sub16x2: 2521 case Iop_QAdd16Sx2: case Iop_QAdd16Ux2: 2522 case Iop_QSub16Sx2: case Iop_QSub16Ux2: 2523 case Iop_HAdd16Ux2: case Iop_HAdd16Sx2: 2524 case Iop_HSub16Ux2: case Iop_HSub16Sx2: 2525 case Iop_Add8x4: case Iop_Sub8x4: 2526 case Iop_QAdd8Sx4: case Iop_QAdd8Ux4: 2527 case Iop_QSub8Sx4: case Iop_QSub8Ux4: 2528 case Iop_HAdd8Ux4: case Iop_HAdd8Sx4: 2529 case Iop_HSub8Ux4: case Iop_HSub8Sx4: 2530 case Iop_Sad8Ux4: 2531 BINARY(Ity_I32,Ity_I32, Ity_I32); 2532 2533 case Iop_Add64: case Iop_Sub64: case Iop_Mul64: 2534 case Iop_Or64: case Iop_And64: case Iop_Xor64: 2535 case Iop_CmpORD64U: 2536 case Iop_CmpORD64S: 2537 case Iop_Avg8Ux8: case Iop_Avg16Ux4: 2538 case Iop_Add8x8: case Iop_Add16x4: case Iop_Add32x2: 2539 case Iop_Add32Fx2: case Iop_Sub32Fx2: 2540 case Iop_CmpEQ8x8: case Iop_CmpEQ16x4: case Iop_CmpEQ32x2: 2541 case Iop_CmpGT8Sx8: case Iop_CmpGT16Sx4: case Iop_CmpGT32Sx2: 2542 case Iop_CmpGT8Ux8: case Iop_CmpGT16Ux4: case Iop_CmpGT32Ux2: 2543 case Iop_CmpGT32Fx2: case Iop_CmpEQ32Fx2: case Iop_CmpGE32Fx2: 2544 case Iop_InterleaveHI8x8: case Iop_InterleaveLO8x8: 2545 case Iop_InterleaveHI16x4: case Iop_InterleaveLO16x4: 2546 case Iop_InterleaveHI32x2: case Iop_InterleaveLO32x2: 2547 case Iop_CatOddLanes8x8: case Iop_CatEvenLanes8x8: 2548 case Iop_CatOddLanes16x4: case Iop_CatEvenLanes16x4: 2549 case Iop_InterleaveOddLanes8x8: case Iop_InterleaveEvenLanes8x8: 2550 case Iop_InterleaveOddLanes16x4: case Iop_InterleaveEvenLanes16x4: 2551 case Iop_Perm8x8: 2552 case Iop_Max8Ux8: case Iop_Max16Ux4: case Iop_Max32Ux2: 2553 case Iop_Max8Sx8: case Iop_Max16Sx4: case Iop_Max32Sx2: 2554 case Iop_Max32Fx2: case Iop_Min32Fx2: 2555 case Iop_PwMax32Fx2: case Iop_PwMin32Fx2: 2556 case Iop_Min8Ux8: case Iop_Min16Ux4: case Iop_Min32Ux2: 2557 case Iop_Min8Sx8: case Iop_Min16Sx4: case Iop_Min32Sx2: 2558 case Iop_PwMax8Ux8: case Iop_PwMax16Ux4: case Iop_PwMax32Ux2: 2559 case Iop_PwMax8Sx8: case Iop_PwMax16Sx4: case Iop_PwMax32Sx2: 2560 case Iop_PwMin8Ux8: case Iop_PwMin16Ux4: case Iop_PwMin32Ux2: 2561 case Iop_PwMin8Sx8: case Iop_PwMin16Sx4: case Iop_PwMin32Sx2: 2562 case Iop_Mul8x8: case Iop_Mul16x4: case Iop_Mul32x2: 2563 case Iop_Mul32Fx2: 2564 case Iop_PolynomialMul8x8: 2565 case Iop_MulHi16Sx4: case Iop_MulHi16Ux4: 2566 case Iop_QDMulHi16Sx4: case Iop_QDMulHi32Sx2: 2567 case Iop_QRDMulHi16Sx4: case Iop_QRDMulHi32Sx2: 2568 case Iop_QAdd8Sx8: case Iop_QAdd16Sx4: 2569 case Iop_QAdd32Sx2: case Iop_QAdd64Sx1: 2570 case Iop_QAdd8Ux8: case Iop_QAdd16Ux4: 2571 case Iop_QAdd32Ux2: case Iop_QAdd64Ux1: 2572 case Iop_PwAdd8x8: case Iop_PwAdd16x4: case Iop_PwAdd32x2: 2573 case Iop_PwAdd32Fx2: 2574 case Iop_QNarrowBin32Sto16Sx4: 2575 case Iop_QNarrowBin16Sto8Sx8: case Iop_QNarrowBin16Sto8Ux8: 2576 case Iop_NarrowBin16to8x8: case Iop_NarrowBin32to16x4: 2577 case Iop_Sub8x8: case Iop_Sub16x4: case Iop_Sub32x2: 2578 case Iop_QSub8Sx8: case Iop_QSub16Sx4: 2579 case Iop_QSub32Sx2: case Iop_QSub64Sx1: 2580 case Iop_QSub8Ux8: case Iop_QSub16Ux4: 2581 case Iop_QSub32Ux2: case Iop_QSub64Ux1: 2582 case Iop_Shl8x8: case Iop_Shl16x4: case Iop_Shl32x2: 2583 case Iop_Shr8x8: case Iop_Shr16x4: case Iop_Shr32x2: 2584 case Iop_Sar8x8: case Iop_Sar16x4: case Iop_Sar32x2: 2585 case Iop_Sal8x8: case Iop_Sal16x4: case Iop_Sal32x2: case Iop_Sal64x1: 2586 case Iop_QShl8x8: case Iop_QShl16x4: case Iop_QShl32x2: case Iop_QShl64x1: 2587 case Iop_QSal8x8: case Iop_QSal16x4: case Iop_QSal32x2: case Iop_QSal64x1: 2588 case Iop_RecipStep32Fx2: 2589 case Iop_RSqrtStep32Fx2: 2590 BINARY(Ity_I64,Ity_I64, Ity_I64); 2591 2592 case Iop_ShlN32x2: case Iop_ShlN16x4: case Iop_ShlN8x8: 2593 case Iop_ShrN32x2: case Iop_ShrN16x4: case Iop_ShrN8x8: 2594 case Iop_SarN32x2: case Iop_SarN16x4: case Iop_SarN8x8: 2595 case Iop_QShlNsatUU8x8: case Iop_QShlNsatUU16x4: 2596 case Iop_QShlNsatUU32x2: case Iop_QShlNsatUU64x1: 2597 case Iop_QShlNsatSU8x8: case Iop_QShlNsatSU16x4: 2598 case Iop_QShlNsatSU32x2: case Iop_QShlNsatSU64x1: 2599 case Iop_QShlNsatSS8x8: case Iop_QShlNsatSS16x4: 2600 case Iop_QShlNsatSS32x2: case Iop_QShlNsatSS64x1: 2601 BINARY(Ity_I64,Ity_I8, Ity_I64); 2602 2603 case Iop_Shl8: case Iop_Shr8: case Iop_Sar8: 2604 BINARY(Ity_I8,Ity_I8, Ity_I8); 2605 case Iop_Shl16: case Iop_Shr16: case Iop_Sar16: 2606 BINARY(Ity_I16,Ity_I8, Ity_I16); 2607 case Iop_Shl32: case Iop_Shr32: case Iop_Sar32: 2608 BINARY(Ity_I32,Ity_I8, Ity_I32); 2609 case Iop_Shl64: case Iop_Shr64: case Iop_Sar64: 2610 BINARY(Ity_I64,Ity_I8, Ity_I64); 2611 2612 case Iop_Not8: 2613 UNARY(Ity_I8, Ity_I8); 2614 case Iop_Not16: 2615 UNARY(Ity_I16, Ity_I16); 2616 case Iop_Not32: 2617 case Iop_CmpNEZ16x2: case Iop_CmpNEZ8x4: 2618 UNARY(Ity_I32, Ity_I32); 2619 2620 case Iop_Not64: 2621 case Iop_CmpNEZ32x2: case Iop_CmpNEZ16x4: case Iop_CmpNEZ8x8: 2622 case Iop_Cnt8x8: 2623 case Iop_Clz8x8: case Iop_Clz16x4: case Iop_Clz32x2: 2624 case Iop_Cls8x8: case Iop_Cls16x4: case Iop_Cls32x2: 2625 case Iop_PwAddL8Ux8: case Iop_PwAddL16Ux4: case Iop_PwAddL32Ux2: 2626 case Iop_PwAddL8Sx8: case Iop_PwAddL16Sx4: case Iop_PwAddL32Sx2: 2627 case Iop_Reverse8sIn64_x1: case Iop_Reverse16sIn64_x1: 2628 case Iop_Reverse32sIn64_x1: 2629 case Iop_Reverse8sIn32_x2: case Iop_Reverse16sIn32_x2: 2630 case Iop_Reverse8sIn16_x4: 2631 case Iop_FtoI32Sx2_RZ: case Iop_FtoI32Ux2_RZ: 2632 case Iop_I32StoFx2: case Iop_I32UtoFx2: 2633 case Iop_RecipEst32Ux2: case Iop_RecipEst32Fx2: 2634 case Iop_Abs32Fx2: 2635 case Iop_RSqrtEst32Fx2: 2636 case Iop_RSqrtEst32Ux2: 2637 case Iop_Neg32Fx2: 2638 case Iop_Abs8x8: case Iop_Abs16x4: case Iop_Abs32x2: 2639 UNARY(Ity_I64, Ity_I64); 2640 2641 case Iop_CmpEQ8: case Iop_CmpNE8: 2642 case Iop_CasCmpEQ8: case Iop_CasCmpNE8: case Iop_ExpCmpNE8: 2643 COMPARISON(Ity_I8); 2644 case Iop_CmpEQ16: case Iop_CmpNE16: 2645 case Iop_CasCmpEQ16: case Iop_CasCmpNE16: case Iop_ExpCmpNE16: 2646 COMPARISON(Ity_I16); 2647 case Iop_CmpEQ32: case Iop_CmpNE32: 2648 case Iop_CasCmpEQ32: case Iop_CasCmpNE32: case Iop_ExpCmpNE32: 2649 case Iop_CmpLT32S: case Iop_CmpLE32S: 2650 case Iop_CmpLT32U: case Iop_CmpLE32U: 2651 COMPARISON(Ity_I32); 2652 case Iop_CmpEQ64: case Iop_CmpNE64: 2653 case Iop_CasCmpEQ64: case Iop_CasCmpNE64: case Iop_ExpCmpNE64: 2654 case Iop_CmpLT64S: case Iop_CmpLE64S: 2655 case Iop_CmpLT64U: case Iop_CmpLE64U: 2656 COMPARISON(Ity_I64); 2657 2658 case Iop_CmpNEZ8: UNARY_COMPARISON(Ity_I8); 2659 case Iop_CmpNEZ16: UNARY_COMPARISON(Ity_I16); 2660 case Iop_CmpNEZ32: UNARY_COMPARISON(Ity_I32); 2661 case Iop_CmpNEZ64: UNARY_COMPARISON(Ity_I64); 2662 2663 case Iop_Left8: UNARY(Ity_I8, Ity_I8); 2664 case Iop_Left16: UNARY(Ity_I16,Ity_I16); 2665 case Iop_CmpwNEZ32: case Iop_Left32: UNARY(Ity_I32,Ity_I32); 2666 case Iop_CmpwNEZ64: case Iop_Left64: UNARY(Ity_I64,Ity_I64); 2667 2668 case Iop_GetMSBs8x8: UNARY(Ity_I64, Ity_I8); 2669 case Iop_GetMSBs8x16: UNARY(Ity_V128, Ity_I16); 2670 2671 case Iop_MullU8: case Iop_MullS8: 2672 BINARY(Ity_I8,Ity_I8, Ity_I16); 2673 case Iop_MullU16: case Iop_MullS16: 2674 BINARY(Ity_I16,Ity_I16, Ity_I32); 2675 case Iop_MullU32: case Iop_MullS32: 2676 BINARY(Ity_I32,Ity_I32, Ity_I64); 2677 case Iop_MullU64: case Iop_MullS64: 2678 BINARY(Ity_I64,Ity_I64, Ity_I128); 2679 2680 case Iop_Clz32: case Iop_Ctz32: 2681 UNARY(Ity_I32, Ity_I32); 2682 2683 case Iop_Clz64: case Iop_Ctz64: 2684 UNARY(Ity_I64, Ity_I64); 2685 2686 case Iop_DivU32: case Iop_DivS32: case Iop_DivU32E: case Iop_DivS32E: 2687 BINARY(Ity_I32,Ity_I32, Ity_I32); 2688 2689 case Iop_DivU64: case Iop_DivS64: case Iop_DivS64E: case Iop_DivU64E: 2690 BINARY(Ity_I64,Ity_I64, Ity_I64); 2691 2692 case Iop_DivModU64to32: case Iop_DivModS64to32: 2693 BINARY(Ity_I64,Ity_I32, Ity_I64); 2694 2695 case Iop_DivModU128to64: case Iop_DivModS128to64: 2696 BINARY(Ity_I128,Ity_I64, Ity_I128); 2697 2698 case Iop_DivModS64to64: 2699 BINARY(Ity_I64,Ity_I64, Ity_I128); 2700 2701 case Iop_16HIto8: case Iop_16to8: 2702 UNARY(Ity_I16, Ity_I8); 2703 case Iop_8HLto16: 2704 BINARY(Ity_I8,Ity_I8, Ity_I16); 2705 2706 case Iop_32HIto16: case Iop_32to16: 2707 UNARY(Ity_I32, Ity_I16); 2708 case Iop_16HLto32: 2709 BINARY(Ity_I16,Ity_I16, Ity_I32); 2710 2711 case Iop_64HIto32: case Iop_64to32: 2712 UNARY(Ity_I64, Ity_I32); 2713 case Iop_32HLto64: 2714 BINARY(Ity_I32,Ity_I32, Ity_I64); 2715 2716 case Iop_128HIto64: case Iop_128to64: 2717 UNARY(Ity_I128, Ity_I64); 2718 case Iop_64HLto128: 2719 BINARY(Ity_I64,Ity_I64, Ity_I128); 2720 2721 case Iop_Not1: UNARY(Ity_I1, Ity_I1); 2722 case Iop_1Uto8: UNARY(Ity_I1, Ity_I8); 2723 case Iop_1Sto8: UNARY(Ity_I1, Ity_I8); 2724 case Iop_1Sto16: UNARY(Ity_I1, Ity_I16); 2725 case Iop_1Uto32: case Iop_1Sto32: UNARY(Ity_I1, Ity_I32); 2726 case Iop_1Sto64: case Iop_1Uto64: UNARY(Ity_I1, Ity_I64); 2727 case Iop_32to1: UNARY(Ity_I32, Ity_I1); 2728 case Iop_64to1: UNARY(Ity_I64, Ity_I1); 2729 2730 case Iop_8Uto32: case Iop_8Sto32: 2731 UNARY(Ity_I8, Ity_I32); 2732 2733 case Iop_8Uto16: case Iop_8Sto16: 2734 UNARY(Ity_I8, Ity_I16); 2735 2736 case Iop_16Uto32: case Iop_16Sto32: 2737 UNARY(Ity_I16, Ity_I32); 2738 2739 case Iop_32Sto64: case Iop_32Uto64: 2740 UNARY(Ity_I32, Ity_I64); 2741 2742 case Iop_8Uto64: case Iop_8Sto64: 2743 UNARY(Ity_I8, Ity_I64); 2744 2745 case Iop_16Uto64: case Iop_16Sto64: 2746 UNARY(Ity_I16, Ity_I64); 2747 case Iop_64to16: 2748 UNARY(Ity_I64, Ity_I16); 2749 2750 case Iop_32to8: UNARY(Ity_I32, Ity_I8); 2751 case Iop_64to8: UNARY(Ity_I64, Ity_I8); 2752 2753 case Iop_AddF64: case Iop_SubF64: 2754 case Iop_MulF64: case Iop_DivF64: 2755 case Iop_AddF64r32: case Iop_SubF64r32: 2756 case Iop_MulF64r32: case Iop_DivF64r32: 2757 TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_F64); 2758 2759 case Iop_AddF32: case Iop_SubF32: 2760 case Iop_MulF32: case Iop_DivF32: 2761 TERNARY(ity_RMode,Ity_F32,Ity_F32, Ity_F32); 2762 2763 case Iop_NegF64: case Iop_AbsF64: 2764 UNARY(Ity_F64, Ity_F64); 2765 2766 case Iop_NegF32: case Iop_AbsF32: 2767 UNARY(Ity_F32, Ity_F32); 2768 2769 case Iop_SqrtF64: 2770 case Iop_RecpExpF64: 2771 BINARY(ity_RMode,Ity_F64, Ity_F64); 2772 2773 case Iop_SqrtF32: 2774 case Iop_RoundF32toInt: 2775 case Iop_RecpExpF32: 2776 BINARY(ity_RMode,Ity_F32, Ity_F32); 2777 2778 case Iop_CmpF32: 2779 BINARY(Ity_F32,Ity_F32, Ity_I32); 2780 2781 case Iop_CmpF64: 2782 BINARY(Ity_F64,Ity_F64, Ity_I32); 2783 2784 case Iop_CmpF128: 2785 BINARY(Ity_F128,Ity_F128, Ity_I32); 2786 2787 case Iop_F64toI16S: BINARY(ity_RMode,Ity_F64, Ity_I16); 2788 case Iop_F64toI32S: BINARY(ity_RMode,Ity_F64, Ity_I32); 2789 case Iop_F64toI64S: case Iop_F64toI64U: 2790 BINARY(ity_RMode,Ity_F64, Ity_I64); 2791 2792 case Iop_F64toI32U: BINARY(ity_RMode,Ity_F64, Ity_I32); 2793 2794 case Iop_I32StoF64: UNARY(Ity_I32, Ity_F64); 2795 case Iop_I64StoF64: BINARY(ity_RMode,Ity_I64, Ity_F64); 2796 case Iop_I64UtoF64: BINARY(ity_RMode,Ity_I64, Ity_F64); 2797 case Iop_I64UtoF32: BINARY(ity_RMode,Ity_I64, Ity_F32); 2798 2799 case Iop_I32UtoF64: UNARY(Ity_I32, Ity_F64); 2800 2801 case Iop_F32toI32S: BINARY(ity_RMode,Ity_F32, Ity_I32); 2802 case Iop_F32toI64S: BINARY(ity_RMode,Ity_F32, Ity_I64); 2803 case Iop_F32toI32U: BINARY(ity_RMode,Ity_F32, Ity_I32); 2804 case Iop_F32toI64U: BINARY(ity_RMode,Ity_F32, Ity_I64); 2805 2806 case Iop_I32UtoF32: BINARY(ity_RMode,Ity_I32, Ity_F32); 2807 case Iop_I32StoF32: BINARY(ity_RMode,Ity_I32, Ity_F32); 2808 case Iop_I64StoF32: BINARY(ity_RMode,Ity_I64, Ity_F32); 2809 2810 case Iop_F32toF64: UNARY(Ity_F32, Ity_F64); 2811 case Iop_F16toF64: UNARY(Ity_F16, Ity_F64); 2812 case Iop_F16toF32: UNARY(Ity_F16, Ity_F32); 2813 2814 case Iop_F64toF32: BINARY(ity_RMode,Ity_F64, Ity_F32); 2815 case Iop_F64toF16: BINARY(ity_RMode,Ity_F64, Ity_F16); 2816 case Iop_F32toF16: BINARY(ity_RMode,Ity_F32, Ity_F16); 2817 2818 case Iop_ReinterpI64asF64: UNARY(Ity_I64, Ity_F64); 2819 case Iop_ReinterpF64asI64: UNARY(Ity_F64, Ity_I64); 2820 case Iop_ReinterpI32asF32: UNARY(Ity_I32, Ity_F32); 2821 case Iop_ReinterpF32asI32: UNARY(Ity_F32, Ity_I32); 2822 2823 case Iop_AtanF64: case Iop_Yl2xF64: case Iop_Yl2xp1F64: 2824 case Iop_ScaleF64: case Iop_PRemF64: case Iop_PRem1F64: 2825 TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_F64); 2826 2827 case Iop_PRemC3210F64: case Iop_PRem1C3210F64: 2828 TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_I32); 2829 2830 case Iop_SinF64: case Iop_CosF64: case Iop_TanF64: 2831 case Iop_2xm1F64: 2832 case Iop_RoundF64toInt: BINARY(ity_RMode,Ity_F64, Ity_F64); 2833 2834 case Iop_MAddF64: case Iop_MSubF64: 2835 case Iop_MAddF64r32: case Iop_MSubF64r32: 2836 QUATERNARY(ity_RMode,Ity_F64,Ity_F64,Ity_F64, Ity_F64); 2837 2838 case Iop_RSqrtEst5GoodF64: 2839 case Iop_RoundF64toF64_NEAREST: case Iop_RoundF64toF64_NegINF: 2840 case Iop_RoundF64toF64_PosINF: case Iop_RoundF64toF64_ZERO: 2841 UNARY(Ity_F64, Ity_F64); 2842 case Iop_RoundF64toF32: 2843 BINARY(ity_RMode,Ity_F64, Ity_F64); 2844 case Iop_TruncF64asF32: 2845 UNARY(Ity_F64, Ity_F32); 2846 2847 case Iop_I32UtoFx4: 2848 case Iop_I32StoFx4: 2849 case Iop_QFtoI32Ux4_RZ: 2850 case Iop_QFtoI32Sx4_RZ: 2851 case Iop_FtoI32Ux4_RZ: 2852 case Iop_FtoI32Sx4_RZ: 2853 case Iop_RoundF32x4_RM: 2854 case Iop_RoundF32x4_RP: 2855 case Iop_RoundF32x4_RN: 2856 case Iop_RoundF32x4_RZ: 2857 case Iop_Abs64Fx2: case Iop_Abs32Fx4: 2858 case Iop_RSqrtEst32Fx4: 2859 case Iop_RSqrtEst32Ux4: 2860 UNARY(Ity_V128, Ity_V128); 2861 2862 case Iop_Sqrt64Fx2: 2863 case Iop_Sqrt32Fx4: 2864 BINARY(ity_RMode,Ity_V128, Ity_V128); 2865 2866 case Iop_64HLtoV128: 2867 BINARY(Ity_I64,Ity_I64, Ity_V128); 2868 2869 case Iop_V128to64: case Iop_V128HIto64: 2870 case Iop_NarrowUn16to8x8: 2871 case Iop_NarrowUn32to16x4: 2872 case Iop_NarrowUn64to32x2: 2873 case Iop_QNarrowUn16Uto8Ux8: 2874 case Iop_QNarrowUn32Uto16Ux4: 2875 case Iop_QNarrowUn64Uto32Ux2: 2876 case Iop_QNarrowUn16Sto8Sx8: 2877 case Iop_QNarrowUn32Sto16Sx4: 2878 case Iop_QNarrowUn64Sto32Sx2: 2879 case Iop_QNarrowUn16Sto8Ux8: 2880 case Iop_QNarrowUn32Sto16Ux4: 2881 case Iop_QNarrowUn64Sto32Ux2: 2882 case Iop_F32toF16x4: 2883 UNARY(Ity_V128, Ity_I64); 2884 2885 case Iop_Widen8Uto16x8: 2886 case Iop_Widen16Uto32x4: 2887 case Iop_Widen32Uto64x2: 2888 case Iop_Widen8Sto16x8: 2889 case Iop_Widen16Sto32x4: 2890 case Iop_Widen32Sto64x2: 2891 case Iop_F16toF32x4: 2892 UNARY(Ity_I64, Ity_V128); 2893 2894 case Iop_V128to32: UNARY(Ity_V128, Ity_I32); 2895 case Iop_32UtoV128: UNARY(Ity_I32, Ity_V128); 2896 case Iop_64UtoV128: UNARY(Ity_I64, Ity_V128); 2897 case Iop_SetV128lo32: BINARY(Ity_V128,Ity_I32, Ity_V128); 2898 case Iop_SetV128lo64: BINARY(Ity_V128,Ity_I64, Ity_V128); 2899 2900 case Iop_Dup8x16: UNARY(Ity_I8, Ity_V128); 2901 case Iop_Dup16x8: UNARY(Ity_I16, Ity_V128); 2902 case Iop_Dup32x4: UNARY(Ity_I32, Ity_V128); 2903 case Iop_Dup8x8: UNARY(Ity_I8, Ity_I64); 2904 case Iop_Dup16x4: UNARY(Ity_I16, Ity_I64); 2905 case Iop_Dup32x2: UNARY(Ity_I32, Ity_I64); 2906 2907 case Iop_CmpEQ32Fx4: case Iop_CmpLT32Fx4: 2908 case Iop_CmpEQ64Fx2: case Iop_CmpLT64Fx2: 2909 case Iop_CmpLE32Fx4: case Iop_CmpUN32Fx4: 2910 case Iop_CmpLE64Fx2: case Iop_CmpUN64Fx2: 2911 case Iop_CmpGT32Fx4: case Iop_CmpGE32Fx4: 2912 case Iop_CmpEQ32F0x4: case Iop_CmpLT32F0x4: 2913 case Iop_CmpEQ64F0x2: case Iop_CmpLT64F0x2: 2914 case Iop_CmpLE32F0x4: case Iop_CmpUN32F0x4: 2915 case Iop_CmpLE64F0x2: case Iop_CmpUN64F0x2: 2916 case Iop_Add32F0x4: 2917 case Iop_Add64F0x2: 2918 case Iop_Div32F0x4: 2919 case Iop_Div64F0x2: 2920 case Iop_Max32Fx4: case Iop_Max32F0x4: 2921 case Iop_PwMax32Fx4: case Iop_PwMin32Fx4: 2922 case Iop_Max64Fx2: case Iop_Max64F0x2: 2923 case Iop_Min32Fx4: case Iop_Min32F0x4: 2924 case Iop_Min64Fx2: case Iop_Min64F0x2: 2925 case Iop_Mul32F0x4: 2926 case Iop_Mul64F0x2: 2927 case Iop_Sub32F0x4: 2928 case Iop_Sub64F0x2: 2929 case Iop_AndV128: case Iop_OrV128: case Iop_XorV128: 2930 case Iop_Add8x16: case Iop_Add16x8: 2931 case Iop_Add32x4: case Iop_Add64x2: 2932 case Iop_QAdd8Ux16: case Iop_QAdd16Ux8: 2933 case Iop_QAdd32Ux4: case Iop_QAdd64Ux2: 2934 case Iop_QAdd8Sx16: case Iop_QAdd16Sx8: 2935 case Iop_QAdd32Sx4: case Iop_QAdd64Sx2: 2936 case Iop_QAddExtUSsatSS8x16: case Iop_QAddExtUSsatSS16x8: 2937 case Iop_QAddExtUSsatSS32x4: case Iop_QAddExtUSsatSS64x2: 2938 case Iop_QAddExtSUsatUU8x16: case Iop_QAddExtSUsatUU16x8: 2939 case Iop_QAddExtSUsatUU32x4: case Iop_QAddExtSUsatUU64x2: 2940 case Iop_PwAdd8x16: case Iop_PwAdd16x8: case Iop_PwAdd32x4: 2941 case Iop_Sub8x16: case Iop_Sub16x8: 2942 case Iop_Sub32x4: case Iop_Sub64x2: 2943 case Iop_QSub8Ux16: case Iop_QSub16Ux8: 2944 case Iop_QSub32Ux4: case Iop_QSub64Ux2: 2945 case Iop_QSub8Sx16: case Iop_QSub16Sx8: 2946 case Iop_QSub32Sx4: case Iop_QSub64Sx2: 2947 case Iop_Mul8x16: case Iop_Mul16x8: case Iop_Mul32x4: 2948 case Iop_PolynomialMul8x16: 2949 case Iop_PolynomialMulAdd8x16: case Iop_PolynomialMulAdd16x8: 2950 case Iop_PolynomialMulAdd32x4: case Iop_PolynomialMulAdd64x2: 2951 case Iop_MulHi16Ux8: case Iop_MulHi32Ux4: 2952 case Iop_MulHi16Sx8: case Iop_MulHi32Sx4: 2953 case Iop_QDMulHi16Sx8: case Iop_QDMulHi32Sx4: 2954 case Iop_QRDMulHi16Sx8: case Iop_QRDMulHi32Sx4: 2955 case Iop_MullEven8Ux16: case Iop_MullEven16Ux8: case Iop_MullEven32Ux4: 2956 case Iop_MullEven8Sx16: case Iop_MullEven16Sx8: case Iop_MullEven32Sx4: 2957 case Iop_Avg8Ux16: case Iop_Avg16Ux8: case Iop_Avg32Ux4: 2958 case Iop_Avg8Sx16: case Iop_Avg16Sx8: case Iop_Avg32Sx4: 2959 case Iop_Max8Sx16: case Iop_Max16Sx8: case Iop_Max32Sx4: 2960 case Iop_Max64Sx2: 2961 case Iop_Max8Ux16: case Iop_Max16Ux8: case Iop_Max32Ux4: 2962 case Iop_Max64Ux2: 2963 case Iop_Min8Sx16: case Iop_Min16Sx8: case Iop_Min32Sx4: 2964 case Iop_Min64Sx2: 2965 case Iop_Min8Ux16: case Iop_Min16Ux8: case Iop_Min32Ux4: 2966 case Iop_Min64Ux2: 2967 case Iop_CmpEQ8x16: case Iop_CmpEQ16x8: case Iop_CmpEQ32x4: 2968 case Iop_CmpEQ64x2: 2969 case Iop_CmpGT8Sx16: case Iop_CmpGT16Sx8: case Iop_CmpGT32Sx4: 2970 case Iop_CmpGT64Sx2: 2971 case Iop_CmpGT8Ux16: case Iop_CmpGT16Ux8: case Iop_CmpGT32Ux4: 2972 case Iop_CmpGT64Ux2: 2973 case Iop_Shl8x16: case Iop_Shl16x8: case Iop_Shl32x4: case Iop_Shl64x2: 2974 case Iop_QShl8x16: case Iop_QShl16x8: 2975 case Iop_QShl32x4: case Iop_QShl64x2: 2976 case Iop_QSal8x16: case Iop_QSal16x8: 2977 case Iop_QSal32x4: case Iop_QSal64x2: 2978 case Iop_Shr8x16: case Iop_Shr16x8: case Iop_Shr32x4: case Iop_Shr64x2: 2979 case Iop_Sar8x16: case Iop_Sar16x8: case Iop_Sar32x4: case Iop_Sar64x2: 2980 case Iop_Sal8x16: case Iop_Sal16x8: case Iop_Sal32x4: case Iop_Sal64x2: 2981 case Iop_Rol8x16: case Iop_Rol16x8: case Iop_Rol32x4:case Iop_Rol64x2: 2982 case Iop_QNarrowBin16Sto8Ux16: case Iop_QNarrowBin32Sto16Ux8: 2983 case Iop_QNarrowBin16Sto8Sx16: case Iop_QNarrowBin32Sto16Sx8: 2984 case Iop_QNarrowBin16Uto8Ux16: case Iop_QNarrowBin32Uto16Ux8: 2985 case Iop_QNarrowBin64Sto32Sx4: case Iop_QNarrowBin64Uto32Ux4: 2986 case Iop_NarrowBin16to8x16: case Iop_NarrowBin32to16x8: 2987 case Iop_NarrowBin64to32x4: 2988 case Iop_InterleaveHI8x16: case Iop_InterleaveHI16x8: 2989 case Iop_InterleaveHI32x4: case Iop_InterleaveHI64x2: 2990 case Iop_InterleaveLO8x16: case Iop_InterleaveLO16x8: 2991 case Iop_InterleaveLO32x4: case Iop_InterleaveLO64x2: 2992 case Iop_CatOddLanes8x16: case Iop_CatEvenLanes8x16: 2993 case Iop_CatOddLanes16x8: case Iop_CatEvenLanes16x8: 2994 case Iop_CatOddLanes32x4: case Iop_CatEvenLanes32x4: 2995 case Iop_InterleaveOddLanes8x16: case Iop_InterleaveEvenLanes8x16: 2996 case Iop_InterleaveOddLanes16x8: case Iop_InterleaveEvenLanes16x8: 2997 case Iop_InterleaveOddLanes32x4: case Iop_InterleaveEvenLanes32x4: 2998 case Iop_Perm8x16: case Iop_Perm32x4: 2999 case Iop_RecipStep32Fx4: case Iop_RecipStep64Fx2: 3000 case Iop_RSqrtStep32Fx4: case Iop_RSqrtStep64Fx2: 3001 case Iop_CipherV128: 3002 case Iop_CipherLV128: 3003 case Iop_NCipherV128: 3004 case Iop_NCipherLV128: 3005 case Iop_Sh8Sx16: case Iop_Sh16Sx8: 3006 case Iop_Sh32Sx4: case Iop_Sh64Sx2: 3007 case Iop_Sh8Ux16: case Iop_Sh16Ux8: 3008 case Iop_Sh32Ux4: case Iop_Sh64Ux2: 3009 case Iop_Rsh8Sx16: case Iop_Rsh16Sx8: 3010 case Iop_Rsh32Sx4: case Iop_Rsh64Sx2: 3011 case Iop_Rsh8Ux16: case Iop_Rsh16Ux8: 3012 case Iop_Rsh32Ux4: case Iop_Rsh64Ux2: 3013 BINARY(Ity_V128,Ity_V128, Ity_V128); 3014 3015 case Iop_PolynomialMull8x8: 3016 case Iop_Mull8Ux8: case Iop_Mull8Sx8: 3017 case Iop_Mull16Ux4: case Iop_Mull16Sx4: 3018 case Iop_Mull32Ux2: case Iop_Mull32Sx2: 3019 BINARY(Ity_I64, Ity_I64, Ity_V128); 3020 3021 case Iop_NotV128: 3022 case Iop_RecipEst32Fx4: case Iop_RecipEst32F0x4: 3023 case Iop_RecipEst64Fx2: case Iop_RSqrtEst64Fx2: 3024 case Iop_RecipEst32Ux4: 3025 case Iop_RSqrtEst32F0x4: 3026 case Iop_Sqrt32F0x4: 3027 case Iop_Sqrt64F0x2: 3028 case Iop_CmpNEZ8x16: case Iop_CmpNEZ16x8: 3029 case Iop_CmpNEZ32x4: case Iop_CmpNEZ64x2: 3030 case Iop_Cnt8x16: 3031 case Iop_Clz8x16: case Iop_Clz16x8: case Iop_Clz32x4: case Iop_Clz64x2: 3032 case Iop_Cls8x16: case Iop_Cls16x8: case Iop_Cls32x4: 3033 case Iop_PwAddL8Ux16: case Iop_PwAddL16Ux8: case Iop_PwAddL32Ux4: 3034 case Iop_PwAddL8Sx16: case Iop_PwAddL16Sx8: case Iop_PwAddL32Sx4: 3035 case Iop_Reverse8sIn64_x2: case Iop_Reverse16sIn64_x2: 3036 case Iop_Reverse32sIn64_x2: 3037 case Iop_Reverse8sIn32_x4: case Iop_Reverse16sIn32_x4: 3038 case Iop_Reverse8sIn16_x8: 3039 case Iop_Reverse1sIn8_x16: 3040 case Iop_Neg64Fx2: case Iop_Neg32Fx4: 3041 case Iop_Abs8x16: case Iop_Abs16x8: case Iop_Abs32x4: case Iop_Abs64x2: 3042 case Iop_CipherSV128: 3043 case Iop_PwBitMtxXpose64x2: 3044 case Iop_ZeroHI64ofV128: case Iop_ZeroHI96ofV128: 3045 case Iop_ZeroHI112ofV128: case Iop_ZeroHI120ofV128: 3046 UNARY(Ity_V128, Ity_V128); 3047 3048 case Iop_ShlV128: case Iop_ShrV128: 3049 case Iop_ShlN8x16: case Iop_ShlN16x8: 3050 case Iop_ShlN32x4: case Iop_ShlN64x2: 3051 case Iop_ShrN8x16: case Iop_ShrN16x8: 3052 case Iop_ShrN32x4: case Iop_ShrN64x2: 3053 case Iop_SarN8x16: case Iop_SarN16x8: 3054 case Iop_SarN32x4: case Iop_SarN64x2: 3055 case Iop_QShlNsatUU8x16: case Iop_QShlNsatUU16x8: 3056 case Iop_QShlNsatUU32x4: case Iop_QShlNsatUU64x2: 3057 case Iop_QShlNsatSU8x16: case Iop_QShlNsatSU16x8: 3058 case Iop_QShlNsatSU32x4: case Iop_QShlNsatSU64x2: 3059 case Iop_QShlNsatSS8x16: case Iop_QShlNsatSS16x8: 3060 case Iop_QShlNsatSS32x4: case Iop_QShlNsatSS64x2: 3061 case Iop_SHA256: case Iop_SHA512: 3062 case Iop_QandQShrNnarrow16Uto8Ux8: 3063 case Iop_QandQShrNnarrow32Uto16Ux4: 3064 case Iop_QandQShrNnarrow64Uto32Ux2: 3065 case Iop_QandQSarNnarrow16Sto8Sx8: 3066 case Iop_QandQSarNnarrow32Sto16Sx4: 3067 case Iop_QandQSarNnarrow64Sto32Sx2: 3068 case Iop_QandQSarNnarrow16Sto8Ux8: 3069 case Iop_QandQSarNnarrow32Sto16Ux4: 3070 case Iop_QandQSarNnarrow64Sto32Ux2: 3071 case Iop_QandQRShrNnarrow16Uto8Ux8: 3072 case Iop_QandQRShrNnarrow32Uto16Ux4: 3073 case Iop_QandQRShrNnarrow64Uto32Ux2: 3074 case Iop_QandQRSarNnarrow16Sto8Sx8: 3075 case Iop_QandQRSarNnarrow32Sto16Sx4: 3076 case Iop_QandQRSarNnarrow64Sto32Sx2: 3077 case Iop_QandQRSarNnarrow16Sto8Ux8: 3078 case Iop_QandQRSarNnarrow32Sto16Ux4: 3079 case Iop_QandQRSarNnarrow64Sto32Ux2: 3080 BINARY(Ity_V128,Ity_I8, Ity_V128); 3081 3082 case Iop_F32ToFixed32Ux4_RZ: 3083 case Iop_F32ToFixed32Sx4_RZ: 3084 case Iop_Fixed32UToF32x4_RN: 3085 case Iop_Fixed32SToF32x4_RN: 3086 BINARY(Ity_V128, Ity_I8, Ity_V128); 3087 3088 case Iop_F32ToFixed32Ux2_RZ: 3089 case Iop_F32ToFixed32Sx2_RZ: 3090 case Iop_Fixed32UToF32x2_RN: 3091 case Iop_Fixed32SToF32x2_RN: 3092 BINARY(Ity_I64, Ity_I8, Ity_I64); 3093 3094 case Iop_GetElem8x16: 3095 BINARY(Ity_V128, Ity_I8, Ity_I8); 3096 case Iop_GetElem16x8: 3097 BINARY(Ity_V128, Ity_I8, Ity_I16); 3098 case Iop_GetElem32x4: 3099 BINARY(Ity_V128, Ity_I8, Ity_I32); 3100 case Iop_GetElem64x2: 3101 BINARY(Ity_V128, Ity_I8, Ity_I64); 3102 case Iop_GetElem8x8: 3103 BINARY(Ity_I64, Ity_I8, Ity_I8); 3104 case Iop_GetElem16x4: 3105 BINARY(Ity_I64, Ity_I8, Ity_I16); 3106 case Iop_GetElem32x2: 3107 BINARY(Ity_I64, Ity_I8, Ity_I32); 3108 case Iop_SetElem8x8: 3109 TERNARY(Ity_I64, Ity_I8, Ity_I8, Ity_I64); 3110 case Iop_SetElem16x4: 3111 TERNARY(Ity_I64, Ity_I8, Ity_I16, Ity_I64); 3112 case Iop_SetElem32x2: 3113 TERNARY(Ity_I64, Ity_I8, Ity_I32, Ity_I64); 3114 3115 case Iop_Slice64: 3116 TERNARY(Ity_I64, Ity_I64, Ity_I8, Ity_I64); 3117 case Iop_SliceV128: 3118 TERNARY(Ity_V128, Ity_V128, Ity_I8, Ity_V128); 3119 3120 case Iop_BCDAdd: 3121 case Iop_BCDSub: 3122 TERNARY(Ity_V128,Ity_V128, Ity_I8, Ity_V128); 3123 case Iop_QDMull16Sx4: case Iop_QDMull32Sx2: 3124 BINARY(Ity_I64, Ity_I64, Ity_V128); 3125 3126 /* s390 specific */ 3127 case Iop_MAddF32: 3128 case Iop_MSubF32: 3129 QUATERNARY(ity_RMode,Ity_F32,Ity_F32,Ity_F32, Ity_F32); 3130 3131 case Iop_F64HLtoF128: 3132 BINARY(Ity_F64,Ity_F64, Ity_F128); 3133 3134 case Iop_F128HItoF64: 3135 case Iop_F128LOtoF64: 3136 UNARY(Ity_F128, Ity_F64); 3137 3138 case Iop_AddF128: 3139 case Iop_SubF128: 3140 case Iop_MulF128: 3141 case Iop_DivF128: 3142 TERNARY(ity_RMode,Ity_F128,Ity_F128, Ity_F128); 3143 3144 case Iop_Add64Fx2: case Iop_Sub64Fx2: 3145 case Iop_Mul64Fx2: case Iop_Div64Fx2: 3146 case Iop_Add32Fx4: case Iop_Sub32Fx4: 3147 case Iop_Mul32Fx4: case Iop_Div32Fx4: 3148 TERNARY(ity_RMode,Ity_V128,Ity_V128, Ity_V128); 3149 3150 case Iop_Add64Fx4: case Iop_Sub64Fx4: 3151 case Iop_Mul64Fx4: case Iop_Div64Fx4: 3152 case Iop_Add32Fx8: case Iop_Sub32Fx8: 3153 case Iop_Mul32Fx8: case Iop_Div32Fx8: 3154 TERNARY(ity_RMode,Ity_V256,Ity_V256, Ity_V256); 3155 3156 case Iop_NegF128: 3157 case Iop_AbsF128: 3158 UNARY(Ity_F128, Ity_F128); 3159 3160 case Iop_SqrtF128: 3161 BINARY(ity_RMode,Ity_F128, Ity_F128); 3162 3163 case Iop_I32StoF128: UNARY(Ity_I32, Ity_F128); 3164 case Iop_I64StoF128: UNARY(Ity_I64, Ity_F128); 3165 3166 case Iop_I32UtoF128: UNARY(Ity_I32, Ity_F128); 3167 case Iop_I64UtoF128: UNARY(Ity_I64, Ity_F128); 3168 3169 case Iop_F128toI32S: BINARY(ity_RMode,Ity_F128, Ity_I32); 3170 case Iop_F128toI64S: BINARY(ity_RMode,Ity_F128, Ity_I64); 3171 3172 case Iop_F128toI32U: BINARY(ity_RMode,Ity_F128, Ity_I32); 3173 case Iop_F128toI64U: BINARY(ity_RMode,Ity_F128, Ity_I64); 3174 3175 case Iop_F32toF128: UNARY(Ity_F32, Ity_F128); 3176 case Iop_F64toF128: UNARY(Ity_F64, Ity_F128); 3177 3178 case Iop_F128toF32: BINARY(ity_RMode,Ity_F128, Ity_F32); 3179 case Iop_F128toF64: BINARY(ity_RMode,Ity_F128, Ity_F64); 3180 3181 case Iop_D32toD64: 3182 UNARY(Ity_D32, Ity_D64); 3183 3184 case Iop_ExtractExpD64: 3185 UNARY(Ity_D64, Ity_I64); 3186 3187 case Iop_ExtractSigD64: 3188 UNARY(Ity_D64, Ity_I64); 3189 3190 case Iop_InsertExpD64: 3191 BINARY(Ity_I64,Ity_D64, Ity_D64); 3192 3193 case Iop_ExtractExpD128: 3194 UNARY(Ity_D128, Ity_I64); 3195 3196 case Iop_ExtractSigD128: 3197 UNARY(Ity_D128, Ity_I64); 3198 3199 case Iop_InsertExpD128: 3200 BINARY(Ity_I64,Ity_D128, Ity_D128); 3201 3202 case Iop_D64toD128: 3203 UNARY(Ity_D64, Ity_D128); 3204 3205 case Iop_ReinterpD64asI64: 3206 UNARY(Ity_D64, Ity_I64); 3207 3208 case Iop_ReinterpI64asD64: 3209 UNARY(Ity_I64, Ity_D64); 3210 3211 case Iop_RoundD64toInt: 3212 BINARY(ity_RMode,Ity_D64, Ity_D64); 3213 3214 case Iop_RoundD128toInt: 3215 BINARY(ity_RMode,Ity_D128, Ity_D128); 3216 3217 case Iop_I32StoD128: 3218 case Iop_I32UtoD128: 3219 UNARY(Ity_I32, Ity_D128); 3220 3221 case Iop_I64StoD128: 3222 UNARY(Ity_I64, Ity_D128); 3223 3224 case Iop_I64UtoD128: 3225 UNARY(Ity_I64, Ity_D128); 3226 3227 case Iop_DPBtoBCD: 3228 case Iop_BCDtoDPB: 3229 UNARY(Ity_I64, Ity_I64); 3230 3231 case Iop_D128HItoD64: 3232 case Iop_D128LOtoD64: 3233 UNARY(Ity_D128, Ity_D64); 3234 3235 case Iop_D128toI64S: 3236 BINARY(ity_RMode, Ity_D128, Ity_I64); 3237 3238 case Iop_D128toI64U: 3239 BINARY(ity_RMode, Ity_D128, Ity_I64); 3240 3241 case Iop_D128toI32S: 3242 case Iop_D128toI32U: 3243 BINARY(ity_RMode, Ity_D128, Ity_I32); 3244 3245 case Iop_D64HLtoD128: 3246 BINARY(Ity_D64, Ity_D64, Ity_D128); 3247 3248 case Iop_ShlD64: 3249 case Iop_ShrD64: 3250 BINARY(Ity_D64, Ity_I8, Ity_D64 ); 3251 3252 case Iop_D64toD32: 3253 BINARY(ity_RMode, Ity_D64, Ity_D32); 3254 3255 case Iop_D64toI32S: 3256 case Iop_D64toI32U: 3257 BINARY(ity_RMode, Ity_D64, Ity_I32); 3258 3259 case Iop_D64toI64S: 3260 BINARY(ity_RMode, Ity_D64, Ity_I64); 3261 3262 case Iop_D64toI64U: 3263 BINARY(ity_RMode, Ity_D64, Ity_I64); 3264 3265 case Iop_I32StoD64: 3266 case Iop_I32UtoD64: 3267 UNARY(Ity_I32, Ity_D64); 3268 3269 case Iop_I64StoD64: 3270 BINARY(ity_RMode, Ity_I64, Ity_D64); 3271 3272 case Iop_I64UtoD64: 3273 BINARY(ity_RMode, Ity_I64, Ity_D64); 3274 3275 case Iop_F32toD32: 3276 BINARY(ity_RMode, Ity_F32, Ity_D32); 3277 3278 case Iop_F32toD64: 3279 BINARY(ity_RMode, Ity_F32, Ity_D64); 3280 3281 case Iop_F32toD128: 3282 BINARY(ity_RMode, Ity_F32, Ity_D128); 3283 3284 case Iop_F64toD32: 3285 BINARY(ity_RMode, Ity_F64, Ity_D32); 3286 3287 case Iop_F64toD64: 3288 BINARY(ity_RMode, Ity_F64, Ity_D64); 3289 3290 case Iop_F64toD128: 3291 BINARY(ity_RMode, Ity_F64, Ity_D128); 3292 3293 case Iop_F128toD32: 3294 BINARY(ity_RMode, Ity_F128, Ity_D32); 3295 3296 case Iop_F128toD64: 3297 BINARY(ity_RMode, Ity_F128, Ity_D64); 3298 3299 case Iop_F128toD128: 3300 BINARY(ity_RMode, Ity_F128, Ity_D128); 3301 3302 case Iop_D32toF32: 3303 BINARY(ity_RMode, Ity_D32, Ity_F32); 3304 3305 case Iop_D32toF64: 3306 BINARY(ity_RMode, Ity_D32, Ity_F64); 3307 3308 case Iop_D32toF128: 3309 BINARY(ity_RMode, Ity_D32, Ity_F128); 3310 3311 case Iop_D64toF32: 3312 BINARY(ity_RMode, Ity_D64, Ity_F32); 3313 3314 case Iop_D64toF64: 3315 BINARY(ity_RMode, Ity_D64, Ity_F64); 3316 3317 case Iop_D64toF128: 3318 BINARY(ity_RMode, Ity_D64, Ity_F128); 3319 3320 case Iop_D128toF32: 3321 BINARY(ity_RMode, Ity_D128, Ity_F32); 3322 3323 case Iop_D128toF64: 3324 BINARY(ity_RMode, Ity_D128, Ity_F64); 3325 3326 case Iop_D128toF128: 3327 BINARY(ity_RMode, Ity_D128, Ity_F128); 3328 3329 case Iop_CmpD64: 3330 case Iop_CmpExpD64: 3331 BINARY(Ity_D64,Ity_D64, Ity_I32); 3332 3333 case Iop_CmpD128: 3334 case Iop_CmpExpD128: 3335 BINARY(Ity_D128,Ity_D128, Ity_I32); 3336 3337 case Iop_QuantizeD64: 3338 TERNARY(ity_RMode,Ity_D64,Ity_D64, Ity_D64); 3339 3340 case Iop_SignificanceRoundD64: 3341 TERNARY(ity_RMode, Ity_I8,Ity_D64, Ity_D64); 3342 3343 case Iop_QuantizeD128: 3344 TERNARY(ity_RMode,Ity_D128,Ity_D128, Ity_D128); 3345 3346 case Iop_SignificanceRoundD128: 3347 TERNARY(ity_RMode, Ity_I8,Ity_D128, Ity_D128); 3348 3349 case Iop_ShlD128: 3350 case Iop_ShrD128: 3351 BINARY(Ity_D128, Ity_I8, Ity_D128 ); 3352 3353 case Iop_AddD64: 3354 case Iop_SubD64: 3355 case Iop_MulD64: 3356 case Iop_DivD64: 3357 TERNARY( ity_RMode, Ity_D64, Ity_D64, Ity_D64 ); 3358 3359 case Iop_D128toD64: 3360 BINARY( ity_RMode, Ity_D128, Ity_D64 ); 3361 3362 case Iop_AddD128: 3363 case Iop_SubD128: 3364 case Iop_MulD128: 3365 case Iop_DivD128: 3366 TERNARY(ity_RMode,Ity_D128,Ity_D128, Ity_D128); 3367 3368 case Iop_V256to64_0: case Iop_V256to64_1: 3369 case Iop_V256to64_2: case Iop_V256to64_3: 3370 UNARY(Ity_V256, Ity_I64); 3371 3372 case Iop_64x4toV256: 3373 QUATERNARY(Ity_I64, Ity_I64, Ity_I64, Ity_I64, Ity_V256); 3374 3375 case Iop_AndV256: case Iop_OrV256: 3376 case Iop_XorV256: 3377 case Iop_Max32Fx8: case Iop_Min32Fx8: 3378 case Iop_Max64Fx4: case Iop_Min64Fx4: 3379 case Iop_Add8x32: case Iop_Add16x16: 3380 case Iop_Add32x8: case Iop_Add64x4: 3381 case Iop_Sub8x32: case Iop_Sub16x16: 3382 case Iop_Sub32x8: case Iop_Sub64x4: 3383 case Iop_Mul16x16: case Iop_Mul32x8: 3384 case Iop_MulHi16Ux16: case Iop_MulHi16Sx16: 3385 case Iop_Avg8Ux32: case Iop_Avg16Ux16: 3386 case Iop_Max8Sx32: case Iop_Max16Sx16: case Iop_Max32Sx8: 3387 case Iop_Max8Ux32: case Iop_Max16Ux16: case Iop_Max32Ux8: 3388 case Iop_Min8Sx32: case Iop_Min16Sx16: case Iop_Min32Sx8: 3389 case Iop_Min8Ux32: case Iop_Min16Ux16: case Iop_Min32Ux8: 3390 case Iop_CmpEQ8x32: case Iop_CmpEQ16x16: 3391 case Iop_CmpEQ32x8: case Iop_CmpEQ64x4: 3392 case Iop_CmpGT8Sx32: case Iop_CmpGT16Sx16: 3393 case Iop_CmpGT32Sx8: case Iop_CmpGT64Sx4: 3394 case Iop_QAdd8Ux32: case Iop_QAdd16Ux16: 3395 case Iop_QAdd8Sx32: case Iop_QAdd16Sx16: 3396 case Iop_QSub8Ux32: case Iop_QSub16Ux16: 3397 case Iop_QSub8Sx32: case Iop_QSub16Sx16: 3398 case Iop_Perm32x8: 3399 BINARY(Ity_V256,Ity_V256, Ity_V256); 3400 3401 case Iop_V256toV128_1: case Iop_V256toV128_0: 3402 UNARY(Ity_V256, Ity_V128); 3403 3404 case Iop_QandUQsh8x16: case Iop_QandUQsh16x8: 3405 case Iop_QandUQsh32x4: case Iop_QandUQsh64x2: 3406 case Iop_QandSQsh8x16: case Iop_QandSQsh16x8: 3407 case Iop_QandSQsh32x4: case Iop_QandSQsh64x2: 3408 case Iop_QandUQRsh8x16: case Iop_QandUQRsh16x8: 3409 case Iop_QandUQRsh32x4: case Iop_QandUQRsh64x2: 3410 case Iop_QandSQRsh8x16: case Iop_QandSQRsh16x8: 3411 case Iop_QandSQRsh32x4: case Iop_QandSQRsh64x2: 3412 case Iop_V128HLtoV256: 3413 BINARY(Ity_V128,Ity_V128, Ity_V256); 3414 3415 case Iop_NotV256: 3416 case Iop_RSqrtEst32Fx8: 3417 case Iop_Sqrt32Fx8: 3418 case Iop_Sqrt64Fx4: 3419 case Iop_RecipEst32Fx8: 3420 case Iop_CmpNEZ8x32: case Iop_CmpNEZ16x16: 3421 case Iop_CmpNEZ64x4: case Iop_CmpNEZ32x8: 3422 UNARY(Ity_V256, Ity_V256); 3423 3424 case Iop_ShlN16x16: case Iop_ShlN32x8: 3425 case Iop_ShlN64x4: 3426 case Iop_ShrN16x16: case Iop_ShrN32x8: 3427 case Iop_ShrN64x4: 3428 case Iop_SarN16x16: case Iop_SarN32x8: 3429 BINARY(Ity_V256,Ity_I8, Ity_V256); 3430 3431 default: 3432 ppIROp(op); 3433 vpanic("typeOfPrimop"); 3434 } 3435 # undef UNARY 3436 # undef BINARY 3437 # undef TERNARY 3438 # undef COMPARISON 3439 # undef UNARY_COMPARISON 3440 } 3441 3442 3443 /*---------------------------------------------------------------*/ 3444 /*--- Helper functions for the IR -- IR Basic Blocks ---*/ 3445 /*---------------------------------------------------------------*/ 3446 3447 void addStmtToIRSB ( IRSB* bb, IRStmt* st ) 3448 { 3449 Int i; 3450 if (bb->stmts_used == bb->stmts_size) { 3451 IRStmt** stmts2 = LibVEX_Alloc_inline(2 * bb->stmts_size * sizeof(IRStmt*)); 3452 for (i = 0; i < bb->stmts_size; i++) 3453 stmts2[i] = bb->stmts[i]; 3454 bb->stmts = stmts2; 3455 bb->stmts_size *= 2; 3456 } 3457 vassert(bb->stmts_used < bb->stmts_size); 3458 bb->stmts[bb->stmts_used] = st; 3459 bb->stmts_used++; 3460 } 3461 3462 3463 /*---------------------------------------------------------------*/ 3464 /*--- Helper functions for the IR -- IR Type Environments ---*/ 3465 /*---------------------------------------------------------------*/ 3466 3467 /* Allocate a new IRTemp, given its type. */ 3468 3469 IRTemp newIRTemp ( IRTypeEnv* env, IRType ty ) 3470 { 3471 vassert(env); 3472 vassert(env->types_used >= 0); 3473 vassert(env->types_size >= 0); 3474 vassert(env->types_used <= env->types_size); 3475 if (env->types_used < env->types_size) { 3476 env->types[env->types_used] = ty; 3477 return env->types_used++; 3478 } else { 3479 Int i; 3480 Int new_size = env->types_size==0 ? 8 : 2*env->types_size; 3481 IRType* new_types 3482 = LibVEX_Alloc_inline(new_size * sizeof(IRType)); 3483 for (i = 0; i < env->types_used; i++) 3484 new_types[i] = env->types[i]; 3485 env->types = new_types; 3486 env->types_size = new_size; 3487 return newIRTemp(env, ty); 3488 } 3489 } 3490 3491 3492 /*---------------------------------------------------------------*/ 3493 /*--- Helper functions for the IR -- finding types of exprs ---*/ 3494 /*---------------------------------------------------------------*/ 3495 3496 inline 3497 IRType typeOfIRTemp ( const IRTypeEnv* env, IRTemp tmp ) 3498 { 3499 vassert(tmp >= 0); 3500 vassert(tmp < env->types_used); 3501 return env->types[tmp]; 3502 } 3503 3504 IRType typeOfIRConst ( const IRConst* con ) 3505 { 3506 switch (con->tag) { 3507 case Ico_U1: return Ity_I1; 3508 case Ico_U8: return Ity_I8; 3509 case Ico_U16: return Ity_I16; 3510 case Ico_U32: return Ity_I32; 3511 case Ico_U64: return Ity_I64; 3512 case Ico_F32: return Ity_F32; 3513 case Ico_F32i: return Ity_F32; 3514 case Ico_F64: return Ity_F64; 3515 case Ico_F64i: return Ity_F64; 3516 case Ico_V128: return Ity_V128; 3517 case Ico_V256: return Ity_V256; 3518 default: vpanic("typeOfIRConst"); 3519 } 3520 } 3521 3522 void typeOfIRLoadGOp ( IRLoadGOp cvt, 3523 /*OUT*/IRType* t_res, /*OUT*/IRType* t_arg ) 3524 { 3525 switch (cvt) { 3526 case ILGop_Ident64: 3527 *t_res = Ity_I64; *t_arg = Ity_I64; break; 3528 case ILGop_Ident32: 3529 *t_res = Ity_I32; *t_arg = Ity_I32; break; 3530 case ILGop_16Uto32: case ILGop_16Sto32: 3531 *t_res = Ity_I32; *t_arg = Ity_I16; break; 3532 case ILGop_8Uto32: case ILGop_8Sto32: 3533 *t_res = Ity_I32; *t_arg = Ity_I8; break; 3534 default: 3535 vpanic("typeOfIRLoadGOp"); 3536 } 3537 } 3538 3539 IRType typeOfIRExpr ( const IRTypeEnv* tyenv, const IRExpr* e ) 3540 { 3541 IRType t_dst, t_arg1, t_arg2, t_arg3, t_arg4; 3542 start: 3543 switch (e->tag) { 3544 case Iex_Load: 3545 return e->Iex.Load.ty; 3546 case Iex_Get: 3547 return e->Iex.Get.ty; 3548 case Iex_GetI: 3549 return e->Iex.GetI.descr->elemTy; 3550 case Iex_RdTmp: 3551 return typeOfIRTemp(tyenv, e->Iex.RdTmp.tmp); 3552 case Iex_Const: 3553 return typeOfIRConst(e->Iex.Const.con); 3554 case Iex_Qop: 3555 typeOfPrimop(e->Iex.Qop.details->op, 3556 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 3557 return t_dst; 3558 case Iex_Triop: 3559 typeOfPrimop(e->Iex.Triop.details->op, 3560 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 3561 return t_dst; 3562 case Iex_Binop: 3563 typeOfPrimop(e->Iex.Binop.op, 3564 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 3565 return t_dst; 3566 case Iex_Unop: 3567 typeOfPrimop(e->Iex.Unop.op, 3568 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 3569 return t_dst; 3570 case Iex_CCall: 3571 return e->Iex.CCall.retty; 3572 case Iex_ITE: 3573 e = e->Iex.ITE.iffalse; 3574 goto start; 3575 /* return typeOfIRExpr(tyenv, e->Iex.ITE.iffalse); */ 3576 case Iex_Binder: 3577 vpanic("typeOfIRExpr: Binder is not a valid expression"); 3578 case Iex_VECRET: 3579 vpanic("typeOfIRExpr: VECRET is not a valid expression"); 3580 case Iex_BBPTR: 3581 vpanic("typeOfIRExpr: BBPTR is not a valid expression"); 3582 default: 3583 ppIRExpr(e); 3584 vpanic("typeOfIRExpr"); 3585 } 3586 } 3587 3588 /* Is this any value actually in the enumeration 'IRType' ? */ 3589 Bool isPlausibleIRType ( IRType ty ) 3590 { 3591 switch (ty) { 3592 case Ity_INVALID: case Ity_I1: 3593 case Ity_I8: case Ity_I16: case Ity_I32: 3594 case Ity_I64: case Ity_I128: 3595 case Ity_F16: case Ity_F32: case Ity_F64: case Ity_F128: 3596 case Ity_D32: case Ity_D64: case Ity_D128: 3597 case Ity_V128: case Ity_V256: 3598 return True; 3599 default: 3600 return False; 3601 } 3602 } 3603 3604 3605 /*---------------------------------------------------------------*/ 3606 /*--- Sanity checking -- FLATNESS ---*/ 3607 /*---------------------------------------------------------------*/ 3608 3609 /* Check that the canonical flatness constraints hold on an 3610 IRStmt. The only place where any expression is allowed to be 3611 non-atomic is the RHS of IRStmt_Tmp. */ 3612 3613 /* Relies on: 3614 inline static Bool isAtom ( IRExpr* e ) { 3615 return e->tag == Iex_RdTmp || e->tag == Iex_Const; 3616 } 3617 */ 3618 3619 static inline Bool isIRAtom_or_VECRET_or_BBPTR ( const IRExpr* e ) 3620 { 3621 if (isIRAtom(e)) { 3622 return True; 3623 } 3624 3625 return UNLIKELY(is_IRExpr_VECRET_or_BBPTR(e)); 3626 } 3627 3628 Bool isFlatIRStmt ( const IRStmt* st ) 3629 { 3630 Int i; 3631 const IRExpr* e; 3632 const IRQop* qop; 3633 const IRTriop* triop; 3634 3635 switch (st->tag) { 3636 case Ist_AbiHint: 3637 return isIRAtom(st->Ist.AbiHint.base) 3638 && isIRAtom(st->Ist.AbiHint.nia); 3639 case Ist_Put: 3640 return isIRAtom(st->Ist.Put.data); 3641 case Ist_PutI: { 3642 const IRPutI *puti = st->Ist.PutI.details; 3643 return toBool( isIRAtom(puti->ix) 3644 && isIRAtom(puti->data) ); 3645 } 3646 case Ist_WrTmp: 3647 /* This is the only interesting case. The RHS can be any 3648 expression, *but* all its subexpressions *must* be 3649 atoms. */ 3650 e = st->Ist.WrTmp.data; 3651 switch (e->tag) { 3652 case Iex_Binder: return True; 3653 case Iex_Get: return True; 3654 case Iex_GetI: return isIRAtom(e->Iex.GetI.ix); 3655 case Iex_RdTmp: return True; 3656 case Iex_Qop: qop = e->Iex.Qop.details; 3657 return toBool( 3658 isIRAtom(qop->arg1) 3659 && isIRAtom(qop->arg2) 3660 && isIRAtom(qop->arg3) 3661 && isIRAtom(qop->arg4)); 3662 case Iex_Triop: triop = e->Iex.Triop.details; 3663 return toBool( 3664 isIRAtom(triop->arg1) 3665 && isIRAtom(triop->arg2) 3666 && isIRAtom(triop->arg3)); 3667 case Iex_Binop: return toBool( 3668 isIRAtom(e->Iex.Binop.arg1) 3669 && isIRAtom(e->Iex.Binop.arg2)); 3670 case Iex_Unop: return isIRAtom(e->Iex.Unop.arg); 3671 case Iex_Load: return isIRAtom(e->Iex.Load.addr); 3672 case Iex_Const: return True; 3673 case Iex_CCall: for (i = 0; e->Iex.CCall.args[i]; i++) 3674 if (!isIRAtom(e->Iex.CCall.args[i])) 3675 return False; 3676 return True; 3677 case Iex_ITE: return toBool ( 3678 isIRAtom(e->Iex.ITE.cond) 3679 && isIRAtom(e->Iex.ITE.iftrue) 3680 && isIRAtom(e->Iex.ITE.iffalse)); 3681 default: vpanic("isFlatIRStmt(e)"); 3682 } 3683 /*notreached*/ 3684 vassert(0); 3685 case Ist_Store: 3686 return toBool( isIRAtom(st->Ist.Store.addr) 3687 && isIRAtom(st->Ist.Store.data) ); 3688 case Ist_StoreG: { 3689 const IRStoreG* sg = st->Ist.StoreG.details; 3690 return toBool( isIRAtom(sg->addr) 3691 && isIRAtom(sg->data) && isIRAtom(sg->guard) ); 3692 } 3693 case Ist_LoadG: { 3694 const IRLoadG* lg = st->Ist.LoadG.details; 3695 return toBool( isIRAtom(lg->addr) 3696 && isIRAtom(lg->alt) && isIRAtom(lg->guard) ); 3697 } 3698 case Ist_CAS: { 3699 const IRCAS* cas = st->Ist.CAS.details; 3700 return toBool( isIRAtom(cas->addr) 3701 && (cas->expdHi ? isIRAtom(cas->expdHi) : True) 3702 && isIRAtom(cas->expdLo) 3703 && (cas->dataHi ? isIRAtom(cas->dataHi) : True) 3704 && isIRAtom(cas->dataLo) ); 3705 } 3706 case Ist_LLSC: 3707 return toBool( isIRAtom(st->Ist.LLSC.addr) 3708 && (st->Ist.LLSC.storedata 3709 ? isIRAtom(st->Ist.LLSC.storedata) : True) ); 3710 case Ist_Dirty: { 3711 const IRDirty* di = st->Ist.Dirty.details; 3712 if (!isIRAtom(di->guard)) 3713 return False; 3714 for (i = 0; di->args[i]; i++) 3715 if (!isIRAtom_or_VECRET_or_BBPTR(di->args[i])) 3716 return False; 3717 if (di->mAddr && !isIRAtom(di->mAddr)) 3718 return False; 3719 return True; 3720 } 3721 case Ist_NoOp: 3722 case Ist_IMark: 3723 case Ist_MBE: 3724 return True; 3725 case Ist_Exit: 3726 return isIRAtom(st->Ist.Exit.guard); 3727 default: 3728 vpanic("isFlatIRStmt(st)"); 3729 } 3730 } 3731 3732 3733 /*---------------------------------------------------------------*/ 3734 /*--- Sanity checking ---*/ 3735 /*---------------------------------------------------------------*/ 3736 3737 /* Checks: 3738 3739 Everything is type-consistent. No ill-typed anything. 3740 The target address at the end of the BB is a 32- or 64- 3741 bit expression, depending on the guest's word size. 3742 3743 Each temp is assigned only once, before its uses. 3744 */ 3745 3746 static inline Int countArgs ( IRExpr** args ) 3747 { 3748 Int i; 3749 for (i = 0; args[i]; i++) 3750 ; 3751 return i; 3752 } 3753 3754 static 3755 __attribute((noreturn)) 3756 void sanityCheckFail ( const IRSB* bb, const IRStmt* stmt, const HChar* what ) 3757 { 3758 vex_printf("\nIR SANITY CHECK FAILURE\n\n"); 3759 ppIRSB(bb); 3760 if (stmt) { 3761 vex_printf("\nIN STATEMENT:\n\n"); 3762 ppIRStmt(stmt); 3763 } 3764 vex_printf("\n\nERROR = %s\n\n", what ); 3765 vpanic("sanityCheckFail: exiting due to bad IR"); 3766 } 3767 3768 static Bool saneIRRegArray ( const IRRegArray* arr ) 3769 { 3770 if (arr->base < 0 || arr->base > 10000 /* somewhat arbitrary */) 3771 return False; 3772 if (arr->elemTy == Ity_I1) 3773 return False; 3774 if (arr->nElems <= 0 || arr->nElems > 500 /* somewhat arbitrary */) 3775 return False; 3776 return True; 3777 } 3778 3779 static Bool saneIRCallee ( const IRCallee* cee ) 3780 { 3781 if (cee->name == NULL) 3782 return False; 3783 if (cee->addr == 0) 3784 return False; 3785 if (cee->regparms < 0 || cee->regparms > 3) 3786 return False; 3787 return True; 3788 } 3789 3790 static Bool saneIRConst ( const IRConst* con ) 3791 { 3792 switch (con->tag) { 3793 case Ico_U1: 3794 return toBool( con->Ico.U1 == True || con->Ico.U1 == False ); 3795 default: 3796 /* Is there anything we can meaningfully check? I don't 3797 think so. */ 3798 return True; 3799 } 3800 } 3801 3802 /* Traverse a Stmt/Expr, inspecting IRTemp uses. Report any out of 3803 range ones. Report any which are read and for which the current 3804 def_count is zero. */ 3805 3806 static 3807 void useBeforeDef_Temp ( const IRSB* bb, const IRStmt* stmt, IRTemp tmp, 3808 Int* def_counts ) 3809 { 3810 if (tmp < 0 || tmp >= bb->tyenv->types_used) 3811 sanityCheckFail(bb,stmt, "out of range Temp in IRExpr"); 3812 if (def_counts[tmp] < 1) 3813 sanityCheckFail(bb,stmt, "IRTemp use before def in IRExpr"); 3814 } 3815 3816 static 3817 void useBeforeDef_Expr ( const IRSB* bb, const IRStmt* stmt, 3818 const IRExpr* expr, Int* def_counts ) 3819 { 3820 Int i; 3821 switch (expr->tag) { 3822 case Iex_Get: 3823 break; 3824 case Iex_GetI: 3825 useBeforeDef_Expr(bb,stmt,expr->Iex.GetI.ix,def_counts); 3826 break; 3827 case Iex_RdTmp: 3828 useBeforeDef_Temp(bb,stmt,expr->Iex.RdTmp.tmp,def_counts); 3829 break; 3830 case Iex_Qop: { 3831 const IRQop* qop = expr->Iex.Qop.details; 3832 useBeforeDef_Expr(bb,stmt,qop->arg1,def_counts); 3833 useBeforeDef_Expr(bb,stmt,qop->arg2,def_counts); 3834 useBeforeDef_Expr(bb,stmt,qop->arg3,def_counts); 3835 useBeforeDef_Expr(bb,stmt,qop->arg4,def_counts); 3836 break; 3837 } 3838 case Iex_Triop: { 3839 const IRTriop* triop = expr->Iex.Triop.details; 3840 useBeforeDef_Expr(bb,stmt,triop->arg1,def_counts); 3841 useBeforeDef_Expr(bb,stmt,triop->arg2,def_counts); 3842 useBeforeDef_Expr(bb,stmt,triop->arg3,def_counts); 3843 break; 3844 } 3845 case Iex_Binop: 3846 useBeforeDef_Expr(bb,stmt,expr->Iex.Binop.arg1,def_counts); 3847 useBeforeDef_Expr(bb,stmt,expr->Iex.Binop.arg2,def_counts); 3848 break; 3849 case Iex_Unop: 3850 useBeforeDef_Expr(bb,stmt,expr->Iex.Unop.arg,def_counts); 3851 break; 3852 case Iex_Load: 3853 useBeforeDef_Expr(bb,stmt,expr->Iex.Load.addr,def_counts); 3854 break; 3855 case Iex_Const: 3856 break; 3857 case Iex_CCall: 3858 for (i = 0; expr->Iex.CCall.args[i]; i++) { 3859 const IRExpr* arg = expr->Iex.CCall.args[i]; 3860 if (UNLIKELY(is_IRExpr_VECRET_or_BBPTR(arg))) { 3861 /* These aren't allowed in CCall lists. Let's detect 3862 and throw them out here, though, rather than 3863 segfaulting a bit later on. */ 3864 sanityCheckFail(bb,stmt, "IRExprP__* value in CCall arg list"); 3865 } else { 3866 useBeforeDef_Expr(bb,stmt,arg,def_counts); 3867 } 3868 } 3869 break; 3870 case Iex_ITE: 3871 useBeforeDef_Expr(bb,stmt,expr->Iex.ITE.cond,def_counts); 3872 useBeforeDef_Expr(bb,stmt,expr->Iex.ITE.iftrue,def_counts); 3873 useBeforeDef_Expr(bb,stmt,expr->Iex.ITE.iffalse,def_counts); 3874 break; 3875 default: 3876 vpanic("useBeforeDef_Expr"); 3877 } 3878 } 3879 3880 static 3881 void useBeforeDef_Stmt ( const IRSB* bb, const IRStmt* stmt, Int* def_counts ) 3882 { 3883 Int i; 3884 const IRDirty* d; 3885 const IRCAS* cas; 3886 const IRPutI* puti; 3887 const IRLoadG* lg; 3888 const IRStoreG* sg; 3889 switch (stmt->tag) { 3890 case Ist_IMark: 3891 break; 3892 case Ist_AbiHint: 3893 useBeforeDef_Expr(bb,stmt,stmt->Ist.AbiHint.base,def_counts); 3894 useBeforeDef_Expr(bb,stmt,stmt->Ist.AbiHint.nia,def_counts); 3895 break; 3896 case Ist_Put: 3897 useBeforeDef_Expr(bb,stmt,stmt->Ist.Put.data,def_counts); 3898 break; 3899 case Ist_PutI: 3900 puti = stmt->Ist.PutI.details; 3901 useBeforeDef_Expr(bb,stmt,puti->ix,def_counts); 3902 useBeforeDef_Expr(bb,stmt,puti->data,def_counts); 3903 break; 3904 case Ist_WrTmp: 3905 useBeforeDef_Expr(bb,stmt,stmt->Ist.WrTmp.data,def_counts); 3906 break; 3907 case Ist_Store: 3908 useBeforeDef_Expr(bb,stmt,stmt->Ist.Store.addr,def_counts); 3909 useBeforeDef_Expr(bb,stmt,stmt->Ist.Store.data,def_counts); 3910 break; 3911 case Ist_StoreG: 3912 sg = stmt->Ist.StoreG.details; 3913 useBeforeDef_Expr(bb,stmt,sg->addr,def_counts); 3914 useBeforeDef_Expr(bb,stmt,sg->data,def_counts); 3915 useBeforeDef_Expr(bb,stmt,sg->guard,def_counts); 3916 break; 3917 case Ist_LoadG: 3918 lg = stmt->Ist.LoadG.details; 3919 useBeforeDef_Expr(bb,stmt,lg->addr,def_counts); 3920 useBeforeDef_Expr(bb,stmt,lg->alt,def_counts); 3921 useBeforeDef_Expr(bb,stmt,lg->guard,def_counts); 3922 break; 3923 case Ist_CAS: 3924 cas = stmt->Ist.CAS.details; 3925 useBeforeDef_Expr(bb,stmt,cas->addr,def_counts); 3926 if (cas->expdHi) 3927 useBeforeDef_Expr(bb,stmt,cas->expdHi,def_counts); 3928 useBeforeDef_Expr(bb,stmt,cas->expdLo,def_counts); 3929 if (cas->dataHi) 3930 useBeforeDef_Expr(bb,stmt,cas->dataHi,def_counts); 3931 useBeforeDef_Expr(bb,stmt,cas->dataLo,def_counts); 3932 break; 3933 case Ist_LLSC: 3934 useBeforeDef_Expr(bb,stmt,stmt->Ist.LLSC.addr,def_counts); 3935 if (stmt->Ist.LLSC.storedata != NULL) 3936 useBeforeDef_Expr(bb,stmt,stmt->Ist.LLSC.storedata,def_counts); 3937 break; 3938 case Ist_Dirty: 3939 d = stmt->Ist.Dirty.details; 3940 for (i = 0; d->args[i] != NULL; i++) { 3941 IRExpr* arg = d->args[i]; 3942 if (UNLIKELY(is_IRExpr_VECRET_or_BBPTR(arg))) { 3943 /* This is ensured by isFlatIRStmt */ 3944 ; 3945 } else { 3946 useBeforeDef_Expr(bb,stmt,arg,def_counts); 3947 } 3948 } 3949 if (d->mFx != Ifx_None) 3950 useBeforeDef_Expr(bb,stmt,d->mAddr,def_counts); 3951 break; 3952 case Ist_NoOp: 3953 case Ist_MBE: 3954 break; 3955 case Ist_Exit: 3956 useBeforeDef_Expr(bb,stmt,stmt->Ist.Exit.guard,def_counts); 3957 break; 3958 default: 3959 vpanic("useBeforeDef_Stmt"); 3960 } 3961 } 3962 3963 static 3964 void tcExpr ( const IRSB* bb, const IRStmt* stmt, const IRExpr* expr, 3965 IRType gWordTy ) 3966 { 3967 Int i; 3968 IRType t_dst, t_arg1, t_arg2, t_arg3, t_arg4; 3969 const IRTypeEnv* tyenv = bb->tyenv; 3970 switch (expr->tag) { 3971 case Iex_Get: 3972 case Iex_RdTmp: 3973 break; 3974 case Iex_GetI: 3975 tcExpr(bb,stmt, expr->Iex.GetI.ix, gWordTy ); 3976 if (typeOfIRExpr(tyenv,expr->Iex.GetI.ix) != Ity_I32) 3977 sanityCheckFail(bb,stmt,"IRExpr.GetI.ix: not :: Ity_I32"); 3978 if (!saneIRRegArray(expr->Iex.GetI.descr)) 3979 sanityCheckFail(bb,stmt,"IRExpr.GetI.descr: invalid descr"); 3980 break; 3981 case Iex_Qop: { 3982 IRType ttarg1, ttarg2, ttarg3, ttarg4; 3983 const IRQop* qop = expr->Iex.Qop.details; 3984 tcExpr(bb,stmt, qop->arg1, gWordTy ); 3985 tcExpr(bb,stmt, qop->arg2, gWordTy ); 3986 tcExpr(bb,stmt, qop->arg3, gWordTy ); 3987 tcExpr(bb,stmt, qop->arg4, gWordTy ); 3988 typeOfPrimop(qop->op, 3989 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 3990 if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID 3991 || t_arg3 == Ity_INVALID || t_arg4 == Ity_INVALID) { 3992 vex_printf(" op name: " ); 3993 ppIROp(qop->op); 3994 vex_printf("\n"); 3995 sanityCheckFail(bb,stmt, 3996 "Iex.Qop: wrong arity op\n" 3997 "... name of op precedes BB printout\n"); 3998 } 3999 ttarg1 = typeOfIRExpr(tyenv, qop->arg1); 4000 ttarg2 = typeOfIRExpr(tyenv, qop->arg2); 4001 ttarg3 = typeOfIRExpr(tyenv, qop->arg3); 4002 ttarg4 = typeOfIRExpr(tyenv, qop->arg4); 4003 if (t_arg1 != ttarg1 || t_arg2 != ttarg2 4004 || t_arg3 != ttarg3 || t_arg4 != ttarg4) { 4005 vex_printf(" op name: "); 4006 ppIROp(qop->op); 4007 vex_printf("\n"); 4008 vex_printf(" op type is ("); 4009 ppIRType(t_arg1); 4010 vex_printf(","); 4011 ppIRType(t_arg2); 4012 vex_printf(","); 4013 ppIRType(t_arg3); 4014 vex_printf(","); 4015 ppIRType(t_arg4); 4016 vex_printf(") -> "); 4017 ppIRType (t_dst); 4018 vex_printf("\narg tys are ("); 4019 ppIRType(ttarg1); 4020 vex_printf(","); 4021 ppIRType(ttarg2); 4022 vex_printf(","); 4023 ppIRType(ttarg3); 4024 vex_printf(","); 4025 ppIRType(ttarg4); 4026 vex_printf(")\n"); 4027 sanityCheckFail(bb,stmt, 4028 "Iex.Qop: arg tys don't match op tys\n" 4029 "... additional details precede BB printout\n"); 4030 } 4031 break; 4032 } 4033 case Iex_Triop: { 4034 IRType ttarg1, ttarg2, ttarg3; 4035 const IRTriop *triop = expr->Iex.Triop.details; 4036 tcExpr(bb,stmt, triop->arg1, gWordTy ); 4037 tcExpr(bb,stmt, triop->arg2, gWordTy ); 4038 tcExpr(bb,stmt, triop->arg3, gWordTy ); 4039 typeOfPrimop(triop->op, 4040 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 4041 if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID 4042 || t_arg3 == Ity_INVALID || t_arg4 != Ity_INVALID) { 4043 vex_printf(" op name: " ); 4044 ppIROp(triop->op); 4045 vex_printf("\n"); 4046 sanityCheckFail(bb,stmt, 4047 "Iex.Triop: wrong arity op\n" 4048 "... name of op precedes BB printout\n"); 4049 } 4050 ttarg1 = typeOfIRExpr(tyenv, triop->arg1); 4051 ttarg2 = typeOfIRExpr(tyenv, triop->arg2); 4052 ttarg3 = typeOfIRExpr(tyenv, triop->arg3); 4053 if (t_arg1 != ttarg1 || t_arg2 != ttarg2 || t_arg3 != ttarg3) { 4054 vex_printf(" op name: "); 4055 ppIROp(triop->op); 4056 vex_printf("\n"); 4057 vex_printf(" op type is ("); 4058 ppIRType(t_arg1); 4059 vex_printf(","); 4060 ppIRType(t_arg2); 4061 vex_printf(","); 4062 ppIRType(t_arg3); 4063 vex_printf(") -> "); 4064 ppIRType (t_dst); 4065 vex_printf("\narg tys are ("); 4066 ppIRType(ttarg1); 4067 vex_printf(","); 4068 ppIRType(ttarg2); 4069 vex_printf(","); 4070 ppIRType(ttarg3); 4071 vex_printf(")\n"); 4072 sanityCheckFail(bb,stmt, 4073 "Iex.Triop: arg tys don't match op tys\n" 4074 "... additional details precede BB printout\n"); 4075 } 4076 break; 4077 } 4078 case Iex_Binop: { 4079 IRType ttarg1, ttarg2; 4080 tcExpr(bb,stmt, expr->Iex.Binop.arg1, gWordTy ); 4081 tcExpr(bb,stmt, expr->Iex.Binop.arg2, gWordTy ); 4082 typeOfPrimop(expr->Iex.Binop.op, 4083 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 4084 if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID 4085 || t_arg3 != Ity_INVALID || t_arg4 != Ity_INVALID) { 4086 vex_printf(" op name: " ); 4087 ppIROp(expr->Iex.Binop.op); 4088 vex_printf("\n"); 4089 sanityCheckFail(bb,stmt, 4090 "Iex.Binop: wrong arity op\n" 4091 "... name of op precedes BB printout\n"); 4092 } 4093 ttarg1 = typeOfIRExpr(tyenv, expr->Iex.Binop.arg1); 4094 ttarg2 = typeOfIRExpr(tyenv, expr->Iex.Binop.arg2); 4095 if (t_arg1 != ttarg1 || t_arg2 != ttarg2) { 4096 vex_printf(" op name: "); 4097 ppIROp(expr->Iex.Binop.op); 4098 vex_printf("\n"); 4099 vex_printf(" op type is ("); 4100 ppIRType(t_arg1); 4101 vex_printf(","); 4102 ppIRType(t_arg2); 4103 vex_printf(") -> "); 4104 ppIRType (t_dst); 4105 vex_printf("\narg tys are ("); 4106 ppIRType(ttarg1); 4107 vex_printf(","); 4108 ppIRType(ttarg2); 4109 vex_printf(")\n"); 4110 sanityCheckFail(bb,stmt, 4111 "Iex.Binop: arg tys don't match op tys\n" 4112 "... additional details precede BB printout\n"); 4113 } 4114 break; 4115 } 4116 case Iex_Unop: 4117 tcExpr(bb,stmt, expr->Iex.Unop.arg, gWordTy ); 4118 typeOfPrimop(expr->Iex.Unop.op, 4119 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 4120 if (t_arg1 == Ity_INVALID || t_arg2 != Ity_INVALID 4121 || t_arg3 != Ity_INVALID || t_arg4 != Ity_INVALID) 4122 sanityCheckFail(bb,stmt,"Iex.Unop: wrong arity op"); 4123 if (t_arg1 != typeOfIRExpr(tyenv, expr->Iex.Unop.arg)) 4124 sanityCheckFail(bb,stmt,"Iex.Unop: arg ty doesn't match op ty"); 4125 break; 4126 case Iex_Load: 4127 tcExpr(bb,stmt, expr->Iex.Load.addr, gWordTy); 4128 if (typeOfIRExpr(tyenv, expr->Iex.Load.addr) != gWordTy) 4129 sanityCheckFail(bb,stmt,"Iex.Load.addr: not :: guest word type"); 4130 if (expr->Iex.Load.end != Iend_LE && expr->Iex.Load.end != Iend_BE) 4131 sanityCheckFail(bb,stmt,"Iex.Load.end: bogus endianness"); 4132 break; 4133 case Iex_CCall: 4134 if (!saneIRCallee(expr->Iex.CCall.cee)) 4135 sanityCheckFail(bb,stmt,"Iex.CCall.cee: bad IRCallee"); 4136 if (expr->Iex.CCall.cee->regparms > countArgs(expr->Iex.CCall.args)) 4137 sanityCheckFail(bb,stmt,"Iex.CCall.cee: #regparms > #args"); 4138 for (i = 0; expr->Iex.CCall.args[i]; i++) { 4139 if (i >= 32) 4140 sanityCheckFail(bb,stmt,"Iex.CCall: > 32 args"); 4141 IRExpr* arg = expr->Iex.CCall.args[i]; 4142 if (UNLIKELY(is_IRExpr_VECRET_or_BBPTR(arg))) 4143 sanityCheckFail(bb,stmt,"Iex.CCall.args: is VECRET/BBPTR"); 4144 tcExpr(bb,stmt, arg, gWordTy); 4145 } 4146 if (expr->Iex.CCall.retty == Ity_I1) 4147 sanityCheckFail(bb,stmt,"Iex.CCall.retty: cannot return :: Ity_I1"); 4148 for (i = 0; expr->Iex.CCall.args[i]; i++) 4149 if (typeOfIRExpr(tyenv, expr->Iex.CCall.args[i]) == Ity_I1) 4150 sanityCheckFail(bb,stmt,"Iex.CCall.arg: arg :: Ity_I1"); 4151 break; 4152 case Iex_Const: 4153 if (!saneIRConst(expr->Iex.Const.con)) 4154 sanityCheckFail(bb,stmt,"Iex.Const.con: invalid const"); 4155 break; 4156 case Iex_ITE: 4157 tcExpr(bb,stmt, expr->Iex.ITE.cond, gWordTy); 4158 tcExpr(bb,stmt, expr->Iex.ITE.iftrue, gWordTy); 4159 tcExpr(bb,stmt, expr->Iex.ITE.iffalse, gWordTy); 4160 if (typeOfIRExpr(tyenv, expr->Iex.ITE.cond) != Ity_I1) 4161 sanityCheckFail(bb,stmt,"Iex.ITE.cond: cond :: Ity_I1"); 4162 if (typeOfIRExpr(tyenv, expr->Iex.ITE.iftrue) 4163 != typeOfIRExpr(tyenv, expr->Iex.ITE.iffalse)) 4164 sanityCheckFail(bb,stmt,"Iex.ITE: iftrue/iffalse mismatch"); 4165 break; 4166 default: 4167 vpanic("tcExpr"); 4168 } 4169 } 4170 4171 4172 static 4173 void tcStmt ( const IRSB* bb, const IRStmt* stmt, IRType gWordTy ) 4174 { 4175 Int i; 4176 IRType tyExpd, tyData; 4177 const IRTypeEnv* tyenv = bb->tyenv; 4178 switch (stmt->tag) { 4179 case Ist_IMark: 4180 /* Somewhat heuristic, but rule out totally implausible 4181 instruction sizes and deltas. */ 4182 if (stmt->Ist.IMark.len > 24) 4183 sanityCheckFail(bb,stmt,"IRStmt.IMark.len: implausible"); 4184 if (stmt->Ist.IMark.delta > 1) 4185 sanityCheckFail(bb,stmt,"IRStmt.IMark.delta: implausible"); 4186 break; 4187 case Ist_AbiHint: 4188 if (typeOfIRExpr(tyenv, stmt->Ist.AbiHint.base) != gWordTy) 4189 sanityCheckFail(bb,stmt,"IRStmt.AbiHint.base: " 4190 "not :: guest word type"); 4191 if (typeOfIRExpr(tyenv, stmt->Ist.AbiHint.nia) != gWordTy) 4192 sanityCheckFail(bb,stmt,"IRStmt.AbiHint.nia: " 4193 "not :: guest word type"); 4194 break; 4195 case Ist_Put: 4196 tcExpr( bb, stmt, stmt->Ist.Put.data, gWordTy ); 4197 if (typeOfIRExpr(tyenv,stmt->Ist.Put.data) == Ity_I1) 4198 sanityCheckFail(bb,stmt,"IRStmt.Put.data: cannot Put :: Ity_I1"); 4199 break; 4200 case Ist_PutI:{ 4201 const IRPutI* puti = stmt->Ist.PutI.details; 4202 tcExpr( bb, stmt, puti->data, gWordTy ); 4203 tcExpr( bb, stmt, puti->ix, gWordTy ); 4204 if (typeOfIRExpr(tyenv,puti->data) == Ity_I1) 4205 sanityCheckFail(bb,stmt,"IRStmt.PutI.data: cannot PutI :: Ity_I1"); 4206 if (typeOfIRExpr(tyenv,puti->data) 4207 != puti->descr->elemTy) 4208 sanityCheckFail(bb,stmt,"IRStmt.PutI.data: data ty != elem ty"); 4209 if (typeOfIRExpr(tyenv,puti->ix) != Ity_I32) 4210 sanityCheckFail(bb,stmt,"IRStmt.PutI.ix: not :: Ity_I32"); 4211 if (!saneIRRegArray(puti->descr)) 4212 sanityCheckFail(bb,stmt,"IRStmt.PutI.descr: invalid descr"); 4213 break; 4214 } 4215 case Ist_WrTmp: 4216 tcExpr( bb, stmt, stmt->Ist.WrTmp.data, gWordTy ); 4217 if (typeOfIRTemp(tyenv, stmt->Ist.WrTmp.tmp) 4218 != typeOfIRExpr(tyenv, stmt->Ist.WrTmp.data)) 4219 sanityCheckFail(bb,stmt, 4220 "IRStmt.Put.Tmp: tmp and expr do not match"); 4221 break; 4222 case Ist_Store: 4223 tcExpr( bb, stmt, stmt->Ist.Store.addr, gWordTy ); 4224 tcExpr( bb, stmt, stmt->Ist.Store.data, gWordTy ); 4225 if (typeOfIRExpr(tyenv, stmt->Ist.Store.addr) != gWordTy) 4226 sanityCheckFail(bb,stmt, 4227 "IRStmt.Store.addr: not :: guest word type"); 4228 if (typeOfIRExpr(tyenv, stmt->Ist.Store.data) == Ity_I1) 4229 sanityCheckFail(bb,stmt, 4230 "IRStmt.Store.data: cannot Store :: Ity_I1"); 4231 if (stmt->Ist.Store.end != Iend_LE && stmt->Ist.Store.end != Iend_BE) 4232 sanityCheckFail(bb,stmt,"Ist.Store.end: bogus endianness"); 4233 break; 4234 case Ist_StoreG: { 4235 const IRStoreG* sg = stmt->Ist.StoreG.details; 4236 tcExpr( bb, stmt, sg->addr, gWordTy ); 4237 tcExpr( bb, stmt, sg->data, gWordTy ); 4238 tcExpr( bb, stmt, sg->guard, gWordTy ); 4239 if (typeOfIRExpr(tyenv, sg->addr) != gWordTy) 4240 sanityCheckFail(bb,stmt,"IRStmtG...addr: not :: guest word type"); 4241 if (typeOfIRExpr(tyenv, sg->data) == Ity_I1) 4242 sanityCheckFail(bb,stmt,"IRStmtG...data: cannot Store :: Ity_I1"); 4243 if (typeOfIRExpr(tyenv, sg->guard) != Ity_I1) 4244 sanityCheckFail(bb,stmt,"IRStmtG...guard: not :: Ity_I1"); 4245 if (sg->end != Iend_LE && sg->end != Iend_BE) 4246 sanityCheckFail(bb,stmt,"IRStmtG...end: bogus endianness"); 4247 break; 4248 } 4249 case Ist_LoadG: { 4250 const IRLoadG* lg = stmt->Ist.LoadG.details; 4251 tcExpr( bb, stmt, lg->addr, gWordTy ); 4252 tcExpr( bb, stmt, lg->alt, gWordTy ); 4253 tcExpr( bb, stmt, lg->guard, gWordTy ); 4254 if (typeOfIRExpr(tyenv, lg->guard) != Ity_I1) 4255 sanityCheckFail(bb,stmt,"IRStmt.LoadG.guard: not :: Ity_I1"); 4256 if (typeOfIRExpr(tyenv, lg->addr) != gWordTy) 4257 sanityCheckFail(bb,stmt,"IRStmt.LoadG.addr: not " 4258 ":: guest word type"); 4259 if (typeOfIRExpr(tyenv, lg->alt) != typeOfIRTemp(tyenv, lg->dst)) 4260 sanityCheckFail(bb,stmt,"IRStmt.LoadG: dst/alt type mismatch"); 4261 IRTemp cvtRes = Ity_INVALID, cvtArg = Ity_INVALID; 4262 typeOfIRLoadGOp(lg->cvt, &cvtRes, &cvtArg); 4263 if (cvtRes != typeOfIRTemp(tyenv, lg->dst)) 4264 sanityCheckFail(bb,stmt,"IRStmt.LoadG: dst/loaded type mismatch"); 4265 break; 4266 } 4267 case Ist_CAS: { 4268 const IRCAS* cas = stmt->Ist.CAS.details; 4269 /* make sure it's definitely either a CAS or a DCAS */ 4270 if (cas->oldHi == IRTemp_INVALID 4271 && cas->expdHi == NULL && cas->dataHi == NULL) { 4272 /* fine; it's a single cas */ 4273 } 4274 else 4275 if (cas->oldHi != IRTemp_INVALID 4276 && cas->expdHi != NULL && cas->dataHi != NULL) { 4277 /* fine; it's a double cas */ 4278 } 4279 else { 4280 /* it's some el-mutanto hybrid */ 4281 goto bad_cas; 4282 } 4283 /* check the address type */ 4284 tcExpr( bb, stmt, cas->addr, gWordTy ); 4285 if (typeOfIRExpr(tyenv, cas->addr) != gWordTy) goto bad_cas; 4286 /* check types on the {old,expd,data}Lo components agree */ 4287 tyExpd = typeOfIRExpr(tyenv, cas->expdLo); 4288 tyData = typeOfIRExpr(tyenv, cas->dataLo); 4289 if (tyExpd != tyData) goto bad_cas; 4290 if (tyExpd != typeOfIRTemp(tyenv, cas->oldLo)) 4291 goto bad_cas; 4292 /* check the base element type is sane */ 4293 if (tyExpd == Ity_I8 || tyExpd == Ity_I16 || tyExpd == Ity_I32 4294 || (gWordTy == Ity_I64 && tyExpd == Ity_I64)) { 4295 /* fine */ 4296 } else { 4297 goto bad_cas; 4298 } 4299 /* If it's a DCAS, check types on the {old,expd,data}Hi 4300 components too */ 4301 if (cas->oldHi != IRTemp_INVALID) { 4302 tyExpd = typeOfIRExpr(tyenv, cas->expdHi); 4303 tyData = typeOfIRExpr(tyenv, cas->dataHi); 4304 if (tyExpd != tyData) goto bad_cas; 4305 if (tyExpd != typeOfIRTemp(tyenv, cas->oldHi)) 4306 goto bad_cas; 4307 /* and finally check that oldLo and oldHi have the same 4308 type. This forces equivalence amongst all 6 types. */ 4309 if (typeOfIRTemp(tyenv, cas->oldHi) 4310 != typeOfIRTemp(tyenv, cas->oldLo)) 4311 goto bad_cas; 4312 } 4313 break; 4314 bad_cas: 4315 sanityCheckFail(bb,stmt,"IRStmt.CAS: ill-formed"); 4316 break; 4317 } 4318 case Ist_LLSC: { 4319 IRType tyRes; 4320 if (typeOfIRExpr(tyenv, stmt->Ist.LLSC.addr) != gWordTy) 4321 sanityCheckFail(bb,stmt,"IRStmt.LLSC.addr: not :: guest word type"); 4322 if (stmt->Ist.LLSC.end != Iend_LE && stmt->Ist.LLSC.end != Iend_BE) 4323 sanityCheckFail(bb,stmt,"Ist.LLSC.end: bogus endianness"); 4324 tyRes = typeOfIRTemp(tyenv, stmt->Ist.LLSC.result); 4325 if (stmt->Ist.LLSC.storedata == NULL) { 4326 /* it's a LL */ 4327 if (tyRes != Ity_I64 && tyRes != Ity_I32 4328 && tyRes != Ity_I16 && tyRes != Ity_I8) 4329 sanityCheckFail(bb,stmt,"Ist.LLSC(LL).result :: bogus"); 4330 } else { 4331 /* it's a SC */ 4332 if (tyRes != Ity_I1) 4333 sanityCheckFail(bb,stmt,"Ist.LLSC(SC).result: not :: Ity_I1"); 4334 tyData = typeOfIRExpr(tyenv, stmt->Ist.LLSC.storedata); 4335 if (tyData != Ity_I64 && tyData != Ity_I32 4336 && tyData != Ity_I16 && tyData != Ity_I8) 4337 sanityCheckFail(bb,stmt, 4338 "Ist.LLSC(SC).result :: storedata bogus"); 4339 } 4340 break; 4341 } 4342 case Ist_Dirty: { 4343 /* Mostly check for various kinds of ill-formed dirty calls. */ 4344 const IRDirty* d = stmt->Ist.Dirty.details; 4345 if (d->cee == NULL) goto bad_dirty; 4346 if (!saneIRCallee(d->cee)) goto bad_dirty; 4347 if (d->cee->regparms > countArgs(d->args)) goto bad_dirty; 4348 if (d->mFx == Ifx_None) { 4349 if (d->mAddr != NULL || d->mSize != 0) 4350 goto bad_dirty; 4351 } else { 4352 if (d->mAddr == NULL || d->mSize == 0) 4353 goto bad_dirty; 4354 } 4355 if (d->nFxState < 0 || d->nFxState > VEX_N_FXSTATE) 4356 goto bad_dirty; 4357 for (i = 0; i < d->nFxState; i++) { 4358 if (d->fxState[i].fx == Ifx_None) goto bad_dirty; 4359 if (d->fxState[i].size <= 0) goto bad_dirty; 4360 if (d->fxState[i].nRepeats == 0) { 4361 if (d->fxState[i].repeatLen != 0) goto bad_dirty; 4362 } else { 4363 if (d->fxState[i].repeatLen <= d->fxState[i].size) 4364 goto bad_dirty; 4365 /* the % is safe because of the .size check above */ 4366 if ((d->fxState[i].repeatLen % d->fxState[i].size) != 0) 4367 goto bad_dirty; 4368 } 4369 } 4370 /* check guard */ 4371 if (d->guard == NULL) goto bad_dirty; 4372 tcExpr( bb, stmt, d->guard, gWordTy ); 4373 if (typeOfIRExpr(tyenv, d->guard) != Ity_I1) 4374 sanityCheckFail(bb,stmt,"IRStmt.Dirty.guard not :: Ity_I1"); 4375 /* check types, minimally */ 4376 IRType retTy = Ity_INVALID; 4377 if (d->tmp != IRTemp_INVALID) { 4378 retTy = typeOfIRTemp(tyenv, d->tmp); 4379 if (retTy == Ity_I1) 4380 sanityCheckFail(bb,stmt,"IRStmt.Dirty.dst :: Ity_I1"); 4381 } 4382 UInt nVECRETs = 0, nBBPTRs = 0; 4383 for (i = 0; d->args[i] != NULL; i++) { 4384 if (i >= 32) 4385 sanityCheckFail(bb,stmt,"IRStmt.Dirty: > 32 args"); 4386 const IRExpr* arg = d->args[i]; 4387 if (UNLIKELY(arg->tag == Iex_VECRET)) { 4388 nVECRETs++; 4389 } else if (UNLIKELY(arg->tag == Iex_BBPTR)) { 4390 nBBPTRs++; 4391 } else { 4392 if (typeOfIRExpr(tyenv, arg) == Ity_I1) 4393 sanityCheckFail(bb,stmt,"IRStmt.Dirty.arg[i] :: Ity_I1"); 4394 } 4395 if (nBBPTRs > 1) { 4396 sanityCheckFail(bb,stmt,"IRStmt.Dirty.args: > 1 BBPTR arg"); 4397 } 4398 if (nVECRETs == 1) { 4399 /* Fn must return V128 or V256. */ 4400 if (retTy != Ity_V128 && retTy != Ity_V256) 4401 sanityCheckFail(bb,stmt, 4402 "IRStmt.Dirty.args: VECRET present, " 4403 "but fn does not return V128 or V256"); 4404 } else if (nVECRETs == 0) { 4405 /* Fn must not return V128 or V256 */ 4406 if (retTy == Ity_V128 || retTy == Ity_V256) 4407 sanityCheckFail(bb,stmt, 4408 "IRStmt.Dirty.args: VECRET not present, " 4409 "but fn returns V128 or V256"); 4410 } else { 4411 sanityCheckFail(bb,stmt, 4412 "IRStmt.Dirty.args: > 1 VECRET present"); 4413 } 4414 } 4415 if (nBBPTRs > 1) { 4416 sanityCheckFail(bb,stmt, 4417 "IRStmt.Dirty.args: > 1 BBPTR present"); 4418 } 4419 /* If you ask for the baseblock pointer, you have to make 4420 some declaration about access to the guest state too. */ 4421 if (d->nFxState == 0 && nBBPTRs != 0) { 4422 sanityCheckFail(bb,stmt, 4423 "IRStmt.Dirty.args: BBPTR requested, " 4424 "but no fxState declared"); 4425 } 4426 break; 4427 bad_dirty: 4428 sanityCheckFail(bb,stmt,"IRStmt.Dirty: ill-formed"); 4429 break; 4430 } 4431 case Ist_NoOp: 4432 break; 4433 case Ist_MBE: 4434 switch (stmt->Ist.MBE.event) { 4435 case Imbe_Fence: case Imbe_CancelReservation: 4436 break; 4437 default: sanityCheckFail(bb,stmt,"IRStmt.MBE.event: unknown"); 4438 break; 4439 } 4440 break; 4441 case Ist_Exit: 4442 tcExpr( bb, stmt, stmt->Ist.Exit.guard, gWordTy ); 4443 if (typeOfIRExpr(tyenv,stmt->Ist.Exit.guard) != Ity_I1) 4444 sanityCheckFail(bb,stmt,"IRStmt.Exit.guard: not :: Ity_I1"); 4445 if (!saneIRConst(stmt->Ist.Exit.dst)) 4446 sanityCheckFail(bb,stmt,"IRStmt.Exit.dst: bad dst"); 4447 if (typeOfIRConst(stmt->Ist.Exit.dst) != gWordTy) 4448 sanityCheckFail(bb,stmt,"IRStmt.Exit.dst: not :: guest word type"); 4449 /* because it would intersect with host_EvC_* */ 4450 if (stmt->Ist.Exit.offsIP < 16) 4451 sanityCheckFail(bb,stmt,"IRStmt.Exit.offsIP: too low"); 4452 break; 4453 default: 4454 vpanic("tcStmt"); 4455 } 4456 } 4457 4458 void sanityCheckIRSB ( const IRSB* bb, const HChar* caller, 4459 Bool require_flat, IRType guest_word_size ) 4460 { 4461 Int i; 4462 Int n_temps = bb->tyenv->types_used; 4463 Int* def_counts = LibVEX_Alloc_inline(n_temps * sizeof(Int)); 4464 4465 if (0) 4466 vex_printf("sanityCheck: %s\n", caller); 4467 4468 vassert(guest_word_size == Ity_I32 4469 || guest_word_size == Ity_I64); 4470 4471 if (bb->stmts_used < 0 || bb->stmts_size < 8 4472 || bb->stmts_used > bb->stmts_size) 4473 /* this BB is so strange we can't even print it */ 4474 vpanic("sanityCheckIRSB: stmts array limits wierd"); 4475 4476 /* Ensure each temp has a plausible type. */ 4477 for (i = 0; i < n_temps; i++) { 4478 IRType ty = typeOfIRTemp(bb->tyenv,(IRTemp)i); 4479 if (!isPlausibleIRType(ty)) { 4480 vex_printf("Temp t%d declared with implausible type 0x%x\n", 4481 i, (UInt)ty); 4482 sanityCheckFail(bb,NULL,"Temp declared with implausible type"); 4483 } 4484 } 4485 4486 const IRStmt* stmt; 4487 4488 /* Check for flatness, if required. */ 4489 if (require_flat) { 4490 for (i = 0; i < bb->stmts_used; i++) { 4491 stmt = bb->stmts[i]; 4492 if (!stmt) 4493 sanityCheckFail(bb, stmt, "IRStmt: is NULL"); 4494 if (!isFlatIRStmt(stmt)) 4495 sanityCheckFail(bb, stmt, "IRStmt: is not flat"); 4496 } 4497 if (!isIRAtom(bb->next)) 4498 sanityCheckFail(bb, NULL, "bb->next is not an atom"); 4499 } 4500 4501 /* Count the defs of each temp. Only one def is allowed. 4502 Also, check that each used temp has already been defd. */ 4503 4504 for (i = 0; i < n_temps; i++) 4505 def_counts[i] = 0; 4506 4507 for (i = 0; i < bb->stmts_used; i++) { 4508 stmt = bb->stmts[i]; 4509 /* Check any temps used by this statement. */ 4510 useBeforeDef_Stmt(bb,stmt,def_counts); 4511 4512 /* Now make note of any temps defd by this statement. */ 4513 switch (stmt->tag) { 4514 case Ist_WrTmp: 4515 if (stmt->Ist.WrTmp.tmp < 0 || stmt->Ist.WrTmp.tmp >= n_temps) 4516 sanityCheckFail(bb, stmt, 4517 "IRStmt.Tmp: destination tmp is out of range"); 4518 def_counts[stmt->Ist.WrTmp.tmp]++; 4519 if (def_counts[stmt->Ist.WrTmp.tmp] > 1) 4520 sanityCheckFail(bb, stmt, 4521 "IRStmt.Tmp: destination tmp is assigned more than once"); 4522 break; 4523 case Ist_LoadG: { 4524 const IRLoadG* lg = stmt->Ist.LoadG.details; 4525 if (lg->dst < 0 || lg->dst >= n_temps) 4526 sanityCheckFail(bb, stmt, 4527 "IRStmt.LoadG: destination tmp is out of range"); 4528 def_counts[lg->dst]++; 4529 if (def_counts[lg->dst] > 1) 4530 sanityCheckFail(bb, stmt, 4531 "IRStmt.LoadG: destination tmp is assigned more than once"); 4532 break; 4533 } 4534 case Ist_Dirty: { 4535 const IRDirty* d = stmt->Ist.Dirty.details; 4536 if (d->tmp != IRTemp_INVALID) { 4537 if (d->tmp < 0 || d->tmp >= n_temps) 4538 sanityCheckFail(bb, stmt, 4539 "IRStmt.Dirty: destination tmp is out of range"); 4540 def_counts[d->tmp]++; 4541 if (def_counts[d->tmp] > 1) 4542 sanityCheckFail(bb, stmt, 4543 "IRStmt.Dirty: destination tmp is assigned more than once"); 4544 } 4545 break; 4546 } 4547 case Ist_CAS: { 4548 const IRCAS* cas = stmt->Ist.CAS.details; 4549 if (cas->oldHi != IRTemp_INVALID) { 4550 if (cas->oldHi < 0 || cas->oldHi >= n_temps) 4551 sanityCheckFail(bb, stmt, 4552 "IRStmt.CAS: destination tmpHi is out of range"); 4553 def_counts[cas->oldHi]++; 4554 if (def_counts[cas->oldHi] > 1) 4555 sanityCheckFail(bb, stmt, 4556 "IRStmt.CAS: destination tmpHi is assigned more than once"); 4557 } 4558 if (cas->oldLo < 0 || cas->oldLo >= n_temps) 4559 sanityCheckFail(bb, stmt, 4560 "IRStmt.CAS: destination tmpLo is out of range"); 4561 def_counts[cas->oldLo]++; 4562 if (def_counts[cas->oldLo] > 1) 4563 sanityCheckFail(bb, stmt, 4564 "IRStmt.CAS: destination tmpLo is assigned more than once"); 4565 break; 4566 } 4567 case Ist_LLSC: 4568 if (stmt->Ist.LLSC.result < 0 || stmt->Ist.LLSC.result >= n_temps) 4569 sanityCheckFail(bb, stmt, 4570 "IRStmt.LLSC: destination tmp is out of range"); 4571 def_counts[stmt->Ist.LLSC.result]++; 4572 if (def_counts[stmt->Ist.LLSC.result] > 1) 4573 sanityCheckFail(bb, stmt, 4574 "IRStmt.LLSC: destination tmp is assigned more than once"); 4575 break; 4576 default: 4577 /* explicitly handle the rest, so as to keep gcc quiet */ 4578 break; 4579 } 4580 } 4581 4582 /* Typecheck everything. */ 4583 for (i = 0; i < bb->stmts_used; i++) 4584 if (bb->stmts[i]) 4585 tcStmt( bb, bb->stmts[i], guest_word_size ); 4586 if (typeOfIRExpr(bb->tyenv,bb->next) != guest_word_size) 4587 sanityCheckFail(bb, NULL, "bb->next field has wrong type"); 4588 /* because it would intersect with host_EvC_* */ 4589 if (bb->offsIP < 16) 4590 sanityCheckFail(bb, NULL, "bb->offsIP: too low"); 4591 } 4592 4593 /*---------------------------------------------------------------*/ 4594 /*--- Misc helper functions ---*/ 4595 /*---------------------------------------------------------------*/ 4596 4597 Bool eqIRConst ( const IRConst* c1, const IRConst* c2 ) 4598 { 4599 if (c1->tag != c2->tag) 4600 return False; 4601 4602 switch (c1->tag) { 4603 case Ico_U1: return toBool( (1 & c1->Ico.U1) == (1 & c2->Ico.U1) ); 4604 case Ico_U8: return toBool( c1->Ico.U8 == c2->Ico.U8 ); 4605 case Ico_U16: return toBool( c1->Ico.U16 == c2->Ico.U16 ); 4606 case Ico_U32: return toBool( c1->Ico.U32 == c2->Ico.U32 ); 4607 case Ico_U64: return toBool( c1->Ico.U64 == c2->Ico.U64 ); 4608 case Ico_F32: return toBool( c1->Ico.F32 == c2->Ico.F32 ); 4609 case Ico_F32i: return toBool( c1->Ico.F32i == c2->Ico.F32i ); 4610 case Ico_F64: return toBool( c1->Ico.F64 == c2->Ico.F64 ); 4611 case Ico_F64i: return toBool( c1->Ico.F64i == c2->Ico.F64i ); 4612 case Ico_V128: return toBool( c1->Ico.V128 == c2->Ico.V128 ); 4613 case Ico_V256: return toBool( c1->Ico.V256 == c2->Ico.V256 ); 4614 default: vpanic("eqIRConst"); 4615 } 4616 } 4617 4618 Bool eqIRRegArray ( const IRRegArray* descr1, const IRRegArray* descr2 ) 4619 { 4620 return toBool( descr1->base == descr2->base 4621 && descr1->elemTy == descr2->elemTy 4622 && descr1->nElems == descr2->nElems ); 4623 } 4624 4625 Int sizeofIRType ( IRType ty ) 4626 { 4627 switch (ty) { 4628 case Ity_I8: return 1; 4629 case Ity_I16: return 2; 4630 case Ity_I32: return 4; 4631 case Ity_I64: return 8; 4632 case Ity_I128: return 16; 4633 case Ity_F16: return 2; 4634 case Ity_F32: return 4; 4635 case Ity_F64: return 8; 4636 case Ity_F128: return 16; 4637 case Ity_D32: return 4; 4638 case Ity_D64: return 8; 4639 case Ity_D128: return 16; 4640 case Ity_V128: return 16; 4641 case Ity_V256: return 32; 4642 default: vex_printf("\n"); ppIRType(ty); vex_printf("\n"); 4643 vpanic("sizeofIRType"); 4644 } 4645 } 4646 4647 IRType integerIRTypeOfSize ( Int szB ) 4648 { 4649 switch (szB) { 4650 case 8: return Ity_I64; 4651 case 4: return Ity_I32; 4652 case 2: return Ity_I16; 4653 case 1: return Ity_I8; 4654 default: vpanic("integerIRTypeOfSize"); 4655 } 4656 } 4657 4658 IRExpr* mkIRExpr_HWord ( HWord hw ) 4659 { 4660 vassert(sizeof(void*) == sizeof(HWord)); 4661 if (sizeof(HWord) == 4) 4662 return IRExpr_Const(IRConst_U32((UInt)hw)); 4663 if (sizeof(HWord) == 8) 4664 return IRExpr_Const(IRConst_U64((ULong)hw)); 4665 vpanic("mkIRExpr_HWord"); 4666 } 4667 4668 IRDirty* unsafeIRDirty_0_N ( Int regparms, const HChar* name, void* addr, 4669 IRExpr** args ) 4670 { 4671 IRDirty* d = emptyIRDirty(); 4672 d->cee = mkIRCallee ( regparms, name, addr ); 4673 d->guard = IRExpr_Const(IRConst_U1(True)); 4674 d->args = args; 4675 return d; 4676 } 4677 4678 IRDirty* unsafeIRDirty_1_N ( IRTemp dst, 4679 Int regparms, const HChar* name, void* addr, 4680 IRExpr** args ) 4681 { 4682 IRDirty* d = emptyIRDirty(); 4683 d->cee = mkIRCallee ( regparms, name, addr ); 4684 d->guard = IRExpr_Const(IRConst_U1(True)); 4685 d->args = args; 4686 d->tmp = dst; 4687 return d; 4688 } 4689 4690 IRExpr* mkIRExprCCall ( IRType retty, 4691 Int regparms, const HChar* name, void* addr, 4692 IRExpr** args ) 4693 { 4694 return IRExpr_CCall ( mkIRCallee ( regparms, name, addr ), 4695 retty, args ); 4696 } 4697 4698 Bool eqIRAtom ( const IRExpr* a1, const IRExpr* a2 ) 4699 { 4700 vassert(isIRAtom(a1)); 4701 vassert(isIRAtom(a2)); 4702 if (a1->tag == Iex_RdTmp && a2->tag == Iex_RdTmp) 4703 return toBool(a1->Iex.RdTmp.tmp == a2->Iex.RdTmp.tmp); 4704 if (a1->tag == Iex_Const && a2->tag == Iex_Const) 4705 return eqIRConst(a1->Iex.Const.con, a2->Iex.Const.con); 4706 return False; 4707 } 4708 4709 /*---------------------------------------------------------------*/ 4710 /*--- end ir_defs.c ---*/ 4711 /*---------------------------------------------------------------*/ 4712
