| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
| pred_lt4_1_neon.s | 80 VQADD.S32 D30, D30, D31
82 VPADD.S32 D30, D30, D30
84 VMOV.S32 r12, D30[0]
|
| Dot_p_neon.s | 107 VQADD.S32 D30, D30, D31
108 VPADD.S32 D30, D30, D30
109 VMOV.S32 r12, D30[0]
|
| /external/libhevc/common/arm/ |
| ihevc_sao_band_offset_chroma.s | 123 VLD1.8 D30,[r7] @pi1_sao_offset_u load
126 VDUP.8 D29,D30[1] @vdup_n_u8(pi1_sao_offset_u[1])
129 VDUP.8 D28,D30[2] @vdup_n_u8(pi1_sao_offset_u[2])
132 VDUP.8 D27,D30[3] @vdup_n_u8(pi1_sao_offset_u[3])
136 VDUP.8 D26,D30[4] @vdup_n_u8(pi1_sao_offset_u[4])
141 VMOV.I8 D30,#16 @vdup_n_u8(16)
157 VCLE.U8 D13,D4,D30 @vcle_u8(band_table.val[3], vdup_n_u8(16))
166 VCLE.U8 D14,D3,D30 @vcle_u8(band_table.val[2], vdup_n_u8(16))
176 VCLE.U8 D15,D2,D30 @vcle_u8(band_table.val[1], vdup_n_u8(16))
186 VCLE.U8 D16,D1,D30 @vcle_u8(band_table.val[0], vdup_n_u8(16)
[all...] |
| ihevc_sao_band_offset_luma.s | 117 VLD1.8 D30,[r6] @pi1_sao_offset load
120 VDUP.8 D29,D30[1] @vdup_n_u8(pi1_sao_offset[1])
123 VDUP.8 D28,D30[2] @vdup_n_u8(pi1_sao_offset[2])
126 VDUP.8 D27,D30[3] @vdup_n_u8(pi1_sao_offset[3])
129 VDUP.8 D26,D30[4] @vdup_n_u8(pi1_sao_offset[4])
|
| ihevc_sao_edge_offset_class1.s | 130 VLD1.8 D30,[r12]! @vld1q_u8(pu1_src[(ht - 1) * src_strd])
148 VLD1.8 D30,[r6]! @II pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
212 VMOVN.I16 D30,Q13 @II vmovn_s16(pi2_tmp_cur_row.val[0])
248 VMOVN.I16 D30,Q13 @vmovn_s16(pi2_tmp_cur_row.val[0])
274 VLD1.8 D30,[r12] @vld1_u8(pu1_src[(ht - 1) * src_strd])
275 VST1.8 {D30},[r3] @vst1_u8(pu1_src_top[col])
290 VLD1.8 D30,[r6]! @II pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
331 VMOVN.I16 D30,Q13 @II vmovn_s16(pi2_tmp_cur_row.val[0])
334 VST1.8 {D30},[r10],r1 @II vst1q_u8(pu1_src_cpy, pu1_cur_row)
360 VMOVN.I16 D30,Q13 @vmovn_s16(pi2_tmp_cur_row.val[0]
[all...] |
| ihevc_sao_edge_offset_class1_chroma.s | 135 VLD1.8 D30,[r12]! @vld1q_u8(pu1_src[(ht - 1) * src_strd])
153 VLD1.8 D30,[r6]! @II pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
225 VMOVN.I16 D30,Q13 @II vmovn_s16(pi2_tmp_cur_row.val[0])
266 VMOVN.I16 D30,Q13 @vmovn_s16(pi2_tmp_cur_row.val[0])
292 VLD1.8 D30,[r12] @vld1_u8(pu1_src[(ht - 1) * src_strd])
293 VST1.8 {D30},[r3] @vst1_u8(pu1_src_top[col])
308 VLD1.8 D30,[r6]! @II pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
362 VMOVN.I16 D30,Q13 @II vmovn_s16(pi2_tmp_cur_row.val[0])
365 VST1.8 {D30},[r10],r1 @II vst1q_u8(pu1_src_cpy, pu1_cur_row)
396 VMOVN.I16 D30,Q13 @vmovn_s16(pi2_tmp_cur_row.val[0]
[all...] |
| ihevc_sao_edge_offset_class0_chroma.s | 156 VLD1.8 D30,[r12]! @II Iteration pu1_cur_row = vld1q_u8(pu1_src_cpy)
245 VMOVL.U8 Q14,D30 @II pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u8(vget_low_u8(pu1_cur_row)))
319 VLD1.8 D30,[r12]! @II pu1_cur_row = vld1q_u8(pu1_src_cpy)
384 VMOVL.U8 Q12,D30 @II pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u8(vget_low_u8(pu1_cur_row)))
|
| ihevc_sao_edge_offset_class2_chroma.s | 401 VLD1.8 D30,[r2] @edge_idx_tbl = vld1_s8(gi1_table_edge_idx)
410 VTBL.8 D18,{D30},D18 @I vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
413 VTBL.8 D19,{D30},D19 @I vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
447 VLD1.8 D30,[r11]! @III pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
614 VLD1.8 D30,[r2] @edge_idx_tbl = vld1_s8(gi1_table_edge_idx)
[all...] |
| ihevc_sao_edge_offset_class0.s | 227 VTBL.8 D30,{D11},D28 @II offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx))
235 VADDW.S8 Q0,Q0,D30 @II pi2_tmp_cur_row.val[0] = vaddw_s8(pi2_tmp_cur_row.val[0], offset)
|
| ihevc_sao_edge_offset_class2.s | 340 VLD1.8 D30,[r11]! @III pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
[all...] |
| /external/libhevc/decoder/arm/ |
| ihevcd_fmt_conv_420sp_to_rgba8888.s | 166 VLD2.8 {D30,D31},[R0]! @//D0 - Y0,Y2,Y4,Y6,Y8,Y10,Y12,Y14 row 1
218 VADDW.U8 Q7,Q4,D30 @//Q7 - HAS Y + B
219 VADDW.U8 Q8,Q5,D30 @//Q8 - HAS Y + R
220 VADDW.U8 Q9,Q6,D30 @//Q9 - HAS Y + G
269 VLD2.8 {D30,D31},[R0]! @//D0 - Y0,Y2,Y4,Y6,Y8,Y10,Y12,Y14 row 1
349 VADDW.U8 Q7,Q4,D30 @//Q7 - HAS Y + B
350 VADDW.U8 Q8,Q5,D30 @//Q8 - HAS Y + R
351 VADDW.U8 Q9,Q6,D30 @//Q9 - HAS Y + G
|
| /external/llvm/test/MC/MachO/ |
| x86_32-symbols.s | 95 D30:
941 // CHECK: ('_string', 'D30')
|
| x86_64-symbols.s | 95 D30:
376 // CHECK-NEXT: Name: D30 (142)
|
| /frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV7/ |
| Radix4FFT_v7.s | 59 VLD2.I32 {D28, D29, D30, D31}, [r6]! @ cosx = csptr[0]@ sinx = csptr[1]@
82 VLD2.I32 {D28, D29, D30, D31}, [r6]!
94 VLD2.I32 {D28, D29, D30, D31}, [r6]!
|
| /art/runtime/arch/arm64/ |
| registers_arm64.h | 145 D30 = 30,
|
| context_arm64.cc | 119 fprs_[D30] = nullptr;
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
| omxVCM4P10_FilterDeblockingLuma_VerEdge_I_s.s | 80 dRown2 DN D30.U8
88 ;// dP_1n DN D30.U8
102 dRow2n DN D30.U8
177 dP_1n DN D30.U8
200 dP_1n DN D30.U8
|
| armVCM4P10_DeblockingLuma_unsafe_s.s | 95 dP_1n DN D30.U8
118 dP_1n DN D30.U8
131 ;// Outputs - Pixels - P0-P1: D29-D30, Q0-Q1: D24-D25
|
| omxVCM4P10_FilterDeblockingLuma_HorEdge_I_s.s | 131 dP_1n DN D30.U8
154 dP_1n DN D30.U8
|
| /art/compiler/utils/arm/ |
| constants_arm.h | 91 D30 = 30,
|
| managed_register_arm_test.cc | 205 reg = ArmManagedRegister::FromDRegister(D30);
212 EXPECT_EQ(D30, reg.AsDRegister());
390 ArmManagedRegister reg_D30 = ArmManagedRegister::FromDRegister(D30);
400 EXPECT_TRUE(reg_D30.Equals(ArmManagedRegister::FromDRegister(D30)));
403 ArmManagedRegister reg_D31 = ArmManagedRegister::FromDRegister(D30);
413 EXPECT_TRUE(!reg_D31.Equals(ArmManagedRegister::FromDRegister(D30)));
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64PBQPRegAlloc.cpp | 128 case AArch64::D30:
|
| /external/valgrind/memcheck/ |
| mc_machine.c | [all...] |
| /external/llvm/lib/Target/Sparc/Disassembler/ |
| SparcDisassembler.cpp | 94 SP::D14, SP::D30, SP::D15, SP::D31 };
|
| /external/llvm/lib/Target/AArch64/Utils/ |
| AArch64BaseInfo.h | 141 case AArch64::D30: return AArch64::B30;
181 case AArch64::B30: return AArch64::D30;
[all...] |
