| /external/llvm/lib/MC/ |
| MCSubtargetInfo.cpp | 25 FeatureBits = Features.getFeatureBits(CPU, ProcDesc, ProcFeatures);
67 FeatureBits ^= FB;
68 return FeatureBits;
75 FeatureBits = Features.ToggleFeature(FeatureBits, FS, ProcFeatures);
76 return FeatureBits;
|
| /external/llvm/include/llvm/MC/ |
| MCSubtargetInfo.h | 45 uint64_t FeatureBits; // Feature bits for current CPU + FS
71 return FeatureBits;
76 void setFeatureBits(uint64_t FeatureBits_) { FeatureBits = FeatureBits_; }
|
| /external/deqp/modules/glshared/ |
| glsRandomUniformBlockCase.hpp | 43 enum FeatureBits
|
| /external/llvm/lib/Target/AArch64/Utils/ |
| AArch64BaseInfo.cpp | 21 StringRef AArch64NamedImmMapper::toString(uint32_t Value, uint64_t FeatureBits,
24 if (Mappings[i].isValueEqual(Value, FeatureBits)) {
34 uint32_t AArch64NamedImmMapper::fromString(StringRef Name, uint64_t FeatureBits,
38 if (Mappings[i].isNameEqual(LowerCaseName, FeatureBits)) {
807 AArch64SysReg::SysRegMapper::fromString(StringRef Name, uint64_t FeatureBits,
813 if (SysRegMappings[i].isNameEqual(NameLower, FeatureBits)) {
822 if (InstMappings[i].isNameEqual(NameLower, FeatureBits)) {
851 AArch64SysReg::SysRegMapper::toString(uint32_t Bits, uint64_t FeatureBits) const {
854 if (SysRegMappings[i].isValueEqual(Bits, FeatureBits)) {
862 if (InstMappings[i].isValueEqual(Bits, FeatureBits)) {
[all...] |
| AArch64BaseInfo.h | 285 bool isNameEqual(std::string Other, uint64_t FeatureBits=~0ULL) const {
286 if (AvailableForFeatures && !(AvailableForFeatures & FeatureBits))
290 bool isValueEqual(uint32_t Other, uint64_t FeatureBits=~0ULL) const {
291 if (AvailableForFeatures && !(AvailableForFeatures & FeatureBits))
301 StringRef toString(uint32_t Value, uint64_t FeatureBits, bool &Valid) const;
302 uint32_t fromString(StringRef Name, uint64_t FeatureBits, bool &Valid) const;
[all...] |
| /external/llvm/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.cpp | 798 uint64_t FeatureBits = STI.getFeatureBits();
800 if (FeatureBits & ARM::FeatureMClass) {
805 if (Opcode == ARM::t2MSR_M && (FeatureBits & ARM::FeatureDSPThumb2)) {
837 if (Opcode == ARM::t2MSR_M && (FeatureBits & ARM::HasV7Ops)) {
[all...] |
| /external/llvm/lib/Target/ARM/Disassembler/ |
| ARMDisassembler.cpp | [all...] |
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/ |
| winternl.h | 716 ULONG FeatureBits;
[all...] |
| /external/llvm/lib/Target/Mips/AsmParser/ |
| MipsAsmParser.cpp | 289 // Selects a new architecture by updating the FeatureBits with the necessary
312 uint64_t FeatureBits = STI.getFeatureBits();
313 FeatureBits &= ~MipsAssemblerOptions::AllArchRelatedMask;
314 STI.setFeatureBits(FeatureBits);
[all...] |
| /external/deqp/modules/gles31/functional/ |
| es31fSSBOLayoutTests.cpp | 48 enum FeatureBits
[all...] |
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/ddk/ |
| wdm.h | [all...] |
