| /external/llvm/include/llvm/Analysis/ |
| TargetTransformInfo.h | 306 bool HasBaseReg, int64_t Scale) const;
322 bool HasBaseReg, int64_t Scale) const;
541 int64_t BaseOffset, bool HasBaseReg,
546 int64_t BaseOffset, bool HasBaseReg,
651 bool HasBaseReg, int64_t Scale) override {
652 return Impl.isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
662 bool HasBaseReg, int64_t Scale) override {
663 return Impl.getScalingFactorCost(Ty, BaseGV, BaseOffset, HasBaseReg, Scale);
[all...] |
| TargetTransformInfoImpl.h | 210 bool HasBaseReg, int64_t Scale) {
221 bool HasBaseReg, int64_t Scale) {
223 if (isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, Scale))
|
| /external/llvm/lib/Analysis/ |
| TargetTransformInfo.cpp | 102 bool HasBaseReg,
104 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
120 bool HasBaseReg,
122 return TTIImpl->getScalingFactorCost(Ty, BaseGV, BaseOffset, HasBaseReg,
|
| /external/llvm/include/llvm/CodeGen/ |
| BasicTTIImpl.h | 128 bool HasBaseReg, int64_t Scale) {
132 AM.HasBaseReg = HasBaseReg;
138 bool HasBaseReg, int64_t Scale) {
142 AM.HasBaseReg = HasBaseReg;
|
| /external/llvm/lib/Target/X86/ |
| X86AsmPrinter.cpp | 243 bool HasBaseReg = BaseReg.getReg() != 0;
244 if (HasBaseReg && Modifier && !strcmp(Modifier, "no-rip") &&
246 HasBaseReg = false;
249 bool HasParenPart = IndexReg.getReg() || HasBaseReg;
273 if (HasBaseReg)
|
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| LoopStrengthReduce.cpp | 234 bool HasBaseReg;
261 : BaseGV(nullptr), BaseOffset(0), HasBaseReg(false), Scale(0),
354 HasBaseReg = true;
360 HasBaseReg = true;
468 if (HasBaseReg && BaseRegs.empty()) {
470 OS << "**error: HasBaseReg**";
471 } else if (!HasBaseReg && !BaseRegs.empty()) {
473 OS << "**error: !HasBaseReg**";
[all...] |
| StraightLineStrengthReduce.cpp | 238 bool HasBaseReg = false;
244 HasBaseReg = true;
267 BaseOffset, HasBaseReg, Scale);
|
| /external/llvm/lib/CodeGen/ |
| CodeGenPrepare.cpp | [all...] |
| TargetLoweringBase.cpp | [all...] |
| /external/llvm/include/llvm/Target/ |
| TargetLowering.h | [all...] |
| /external/llvm/lib/Target/R600/ |
| SIISelLowering.cpp | 278 case 0: // "r+i" or just "i", depending on HasBaseReg.
281 if (AM.HasBaseReg && AM.BaseOffs) // "r+r+i" is not allowed.
286 if (AM.HasBaseReg || AM.BaseOffs) // 2*r+r or 2*r+i is not allowed.
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
