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    Searched refs:IsLive (Results 1 - 13 of 13) sorted by null

  /art/compiler/optimizing/
primitive_type_propagation.cc 43 DCHECK(phi->IsLive());
91 if (phi->IsLive()) {
103 if (phi->IsLive()) {
120 DCHECK(instruction->IsLive());
127 if (phi != nullptr && phi->IsLive() && phi->GetType() != instruction->GetType()) {
ssa_builder.cc 59 DCHECK(phi->IsLive());
114 DCHECK(phi->IsLive());
144 if (instruction->IsLive() && UpdateType(instruction)) {
151 DCHECK(instruction->IsLive());
218 if (next->IsLive()) {
nodes.h     [all...]
  /art/compiler/dex/quick/
ralloc_util.cc 149 info->IsTemp(), info->InUse(), info->IsWide(), info->Partner().GetReg(), info->IsLive(),
463 if ((info->SReg() == s_reg) && info->IsLive()) {
562 bool Mir2Lir::IsLive(RegStorage reg) {
567 DCHECK_EQ(p_lo->IsLive(), p_hi->IsLive());
568 res = p_lo->IsLive() || p_hi->IsLive();
571 res = p->IsLive();
733 if ((info1->IsLive() && info1->IsDirty()) || (info2->IsLive() && info2->IsDirty()))
    [all...]
gen_loadstore.cc 153 if (IsLive(rl_src.reg) ||
238 if (IsLive(rl_src.reg) ||
mir_to_lir-inl.h 32 DCHECK(!(p->IsLive() && p->IsDirty())) << "Live & dirty temp in clobber";
mir_to_lir.h 341 bool IsLive() { return (master_->liveness_ & storage_mask_) == storage_mask_; }
370 int SReg() { return (!IsTemp() || IsLive()) ? s_reg_ : INVALID_SREG; }
732 virtual bool IsLive(RegStorage reg);
    [all...]
codegen_util.cc     [all...]
  /external/llvm/lib/CodeGen/
AggressiveAntiDepBreaker.h 108 bool IsLive(unsigned Reg);
AggressiveAntiDepBreaker.cpp 106 bool AggressiveAntiDepState::IsLive(unsigned Reg)
205 if (State->IsLive(Reg)) {
304 if (TRI->isSuperRegister(Reg, *AI) && State->IsLive(*AI)) {
309 if (!State->IsLive(Reg)) {
321 if (!State->IsLive(SubregReg)) {
379 if (State->IsLive(AliasReg)) {
415 if (TRI->isSuperRegister(Reg, *AI) && State->IsLive(*AI))
668 if (State->IsLive(NewReg) || (KillIndices[Reg] > DefIndices[NewReg])) {
675 if (State->IsLive(AliasReg) ||
774 if (!State->IsLive(Reg)
    [all...]
  /external/llvm/lib/Target/SystemZ/
SystemZFrameLowering.cpp 115 bool IsLive = MBB.isLiveIn(GPR64) || MBB.isLiveIn(GPR32);
116 if (!IsLive || !IsImplicit) {
117 MIB.addReg(GPR64, getImplRegState(IsImplicit) | getKillRegState(!IsLive));
118 if (!IsLive)
  /art/runtime/gc/
heap.cc     [all...]
  /art/compiler/dex/quick/x86/
int_x86.cc     [all...]

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