| /external/valgrind/none/tests/mips64/ |
| logical_instructions.c | 6 AND=0, ANDI, LUI, NOR,
40 case LUI:
44 TEST6("lui $t0, 0xffff", 0xffff, t0);
45 TEST6("lui $a0, 0x0", 0x0, a0);
46 TEST6("lui $t9, 0xff", 0xff, t9);
47 TEST6("lui $v0, 0xfff", 0xfff, v0);
48 TEST6("lui $s0, 0x2", 0x2, s0);
|
| /external/v8/src/mips/ |
| constants-mips.cc | 304 case LUI:
|
| assembler-mips-inl.h | 149 // For an instruction like LUI/ORI where the target bits are mixed into the
356 bool patched_return = ((instr0 & kOpcodeMask) == LUI &&
|
| assembler-mips.cc | 205 // specially coded on MIPS means that it is a lui/ori instruction, and that is
575 return opcode == LUI;
1766 void Assembler::lui(Register rd, int32_t j) { function in class:v8::Assembler
[all...] |
| constants-mips.h | 331 LUI = ((1 << 3) + 7) << kOpcodeShift, // LUI/AUI family.
|
| simulator-mips.cc | [all...] |
| macro-assembler-mips.cc | 1004 lui(rd, (j.imm32_ >> kLuiShift) & kImm16Mask);
1006 lui(rd, (j.imm32_ >> kLuiShift) & kImm16Mask);
1015 lui(rd, (j.imm32_ >> kLuiShift) & kImm16Mask);
[all...] |
| /external/v8/src/mips64/ |
| constants-mips64.cc | 322 case LUI:
|
| assembler-mips64-inl.h | 141 // For an instruction like LUI/ORI where the target bits are mixed into the
347 Instr instr0 = Assembler::instr_at(pc_); // lui.
353 bool patched_return = ((instr0 & kOpcodeMask) == LUI &&
|
| assembler-mips64.cc | 183 // specially coded on MIPS means that it is a lui/ori instruction, and that is
547 return opcode == LUI;
1903 void Assembler::lui(Register rd, int32_t j) { function in class:v8::Assembler
[all...] |
| constants-mips64.h | 296 LUI = ((1 << 3) + 7) << kOpcodeShift, // LUI/AUI family.
|
| simulator-mips64.cc | [all...] |
| macro-assembler-mips64.cc | 1114 lui(rd, (j.imm64_ >> kLuiShift) & kImm16Mask);
1116 lui(rd, (j.imm64_ >> kLuiShift) & kImm16Mask);
1120 lui(rd, (j.imm64_ >> 48) & kImm16Mask);
1129 lui(rd, (j.imm64_ >> 32) & kImm16Mask);
1136 lui(rd, (j.imm64_ >> 32) & kImm16Mask);
1141 lui(rd, (j.imm64_ >> 48) & kImm16Mask);
[all...] |
| /external/pcre/dist/sljit/ |
| sljitNativeMIPS_64.c | 44 FAIL_IF(push_inst(compiler, LUI | TA(dst_ar) | IMM(imm >> 16), dst_ar));
79 FAIL_IF(push_inst(compiler, LUI | TA(dst_ar) | IMM(uimm >> 48), dst_ar));
441 FAIL_IF(push_inst(compiler, LUI | T(dst) | IMM(init_value >> 48), DR(dst)));
|
| sljitNativeMIPS_32.c | 37 FAIL_IF(push_inst(compiler, LUI | TA(dst_ar) | IMM(imm >> 16), dst_ar));
346 FAIL_IF(push_inst(compiler, LUI | T(dst) | IMM(init_value >> 16), DR(dst)));
|
| sljitNativeMIPS_common.c | 145 #define LUI (HI(15))
[all...] |
| /external/llvm/lib/IR/ |
| LegacyPassManager.cpp | 551 for (DenseMap<Pass *, Pass *>::iterator LUI = LastUser.begin(),
552 LUE = LastUser.end(); LUI != LUE; ++LUI) {
553 if (LUI->second == AP)
556 LastUser[LUI->first] = P;
[all...] |
| /system/core/libpixelflinger/codeflinger/ |
| MIPSAssembler.cpp | 385 mMips->LUI(tmpReg, (amode.value >> 16));
499 mMips->LUI(Rd, (amode.value >> 16));
531 mMips->LUI(Rd, (amode.value >> 16));
[all...] |
| MIPSAssembler.h | 342 void LUI(int Rt, int16_t offset);
|
