| /external/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfo.h | 130 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
154 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
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| HexagonInstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.h | 185 unsigned NumCycles, unsigned ExtraPredCycles,
197 unsigned NumCycles,
|
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.h | 227 unsigned NumCycles, unsigned ExtraPredCycles,
235 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
237 return NumCycles == 1;
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| ARMBaseInstrInfo.cpp | [all...] |
| /external/llvm/include/llvm/Target/ |
| TargetInstrInfo.h | 466 /// instructions with accumulated instruction latency of "NumCycles"
471 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
499 isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZInstrInfo.h | 161 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
|
| SystemZInstrInfo.cpp | 516 unsigned NumCycles, unsigned ExtraPredCycles,
519 return NumCycles == 1;
[all...] |
| /external/llvm/lib/CodeGen/ |
| IfConversion.cpp | 686 unsigned NumCycles = SchedModel.computeInstrLatency(&*I, false);
687 if (NumCycles > 1)
688 BBI.ExtraCost += NumCycles-1;
[all...] |
| /external/lzma/CPP/7zip/UI/Common/ |
| Bench.cpp | 875 static bool CrcBig(const void *data, UInt32 size, UInt32 numCycles, UInt32 crcBase)
877 for (UInt32 i = 0; i < numCycles; i++)
889 UInt32 NumCycles;
902 p->Res = CrcBig(p->Data, p->Size, p->NumCycles, p->Crc);
983 UInt32 numCycles = (kCrcBlockSize) / ((bufferSize >> 2) + 1) + 1;
997 info.NumCycles = numCycles;
1018 if (!CrcBig(buf, bufferSize, numCycles, crc))
1025 UInt64 size = (UInt64)numCycles * totalSize;
|
