/external/llvm/lib/Target/Hexagon/Disassembler/ |
HexagonDisassembler.cpp | 50 static DecodeStatus DecodeModRegsRegisterClass(MCInst &Inst, unsigned RegNo, 52 static DecodeStatus DecodeCtrRegsRegisterClass(MCInst &Inst, unsigned RegNo, 54 static DecodeStatus DecodeCtrRegs64RegisterClass(MCInst &Inst, unsigned RegNo, 69 static DecodeStatus DecodeRegisterClass(MCInst &Inst, unsigned RegNo, 71 if (RegNo < Size) { 72 Inst.addOperand(MCOperand::CreateReg(Table[RegNo])); 79 static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo, 82 if (RegNo > 31) 85 unsigned Register = IntRegDecoderTable[RegNo]; 90 static DecodeStatus DecodeCtrRegsRegisterClass(MCInst &Inst, unsigned RegNo, [all...] |
/external/llvm/include/llvm/CodeGen/ |
MachineRegisterInfo.h | 80 MachineOperand *&getRegUseDefListHead(unsigned RegNo) { 81 if (TargetRegisterInfo::isVirtualRegister(RegNo)) 82 return VRegInfo[RegNo].second; 83 return PhysRegUseDefLists[RegNo]; 86 MachineOperand *getRegUseDefListHead(unsigned RegNo) const { 87 if (TargetRegisterInfo::isVirtualRegister(RegNo)) 88 return VRegInfo[RegNo].second; 89 return PhysRegUseDefLists[RegNo]; 243 reg_iterator reg_begin(unsigned RegNo) const { 244 return reg_iterator(getRegUseDefListHead(RegNo)); [all...] |
StackMaps.h | 147 unsigned short RegNo; 150 LiveOutReg() : Reg(0), RegNo(0), Size(0) {} 151 LiveOutReg(unsigned short Reg, unsigned short RegNo, unsigned short Size) 152 : Reg(Reg), RegNo(RegNo), Size(Size) {} 157 bool operator< (const LiveOutReg &LO) const { return RegNo < LO.RegNo; }
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/art/compiler/utils/arm64/ |
managed_register_arm64.cc | 45 return (IsGPRegister() == other.IsGPRegister()) && (RegNo() == other.RegNo()); 48 int Arm64ManagedRegister::RegNo() const { 67 int low = RegNo(); 79 int high = RegNo();
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/external/llvm/lib/Target/Mips/Disassembler/ |
MipsDisassembler.cpp | 66 unsigned RegNo, 71 unsigned RegNo, 76 unsigned RegNo, 81 unsigned RegNo, 86 unsigned RegNo, 91 unsigned RegNo, 101 unsigned RegNo, 106 unsigned RegNo, 111 unsigned RegNo, 116 unsigned RegNo, [all...] |
/external/llvm/lib/Target/NVPTX/ |
NVPTXRegisterInfo.h | 52 const char *getName(unsigned RegNo) const { 54 O << "reg" << RegNo;
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/external/llvm/lib/Target/X86/AsmParser/ |
X86AsmInstrumentation.h | 38 void SetInitialFrameRegister(unsigned RegNo) { 39 InitialFrameReg = RegNo;
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/external/llvm/lib/Target/XCore/InstPrinter/ |
XCoreInstPrinter.h | 32 static const char *getRegisterName(unsigned RegNo); 34 void printRegName(raw_ostream &OS, unsigned RegNo) const override;
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XCoreInstPrinter.cpp | 28 void XCoreInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { 29 OS << StringRef(getRegisterName(RegNo)).lower();
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/external/llvm/lib/Target/SystemZ/Disassembler/ |
SystemZDisassembler.cpp | 49 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, 51 assert(RegNo < 16 && "Invalid register"); 52 RegNo = Regs[RegNo]; 53 if (RegNo == 0) 55 Inst.addOperand(MCOperand::CreateReg(RegNo)); 59 static DecodeStatus DecodeGR32BitRegisterClass(MCInst &Inst, uint64_t RegNo, 62 return decodeRegisterClass(Inst, RegNo, SystemZMC::GR32Regs); 65 static DecodeStatus DecodeGRH32BitRegisterClass(MCInst &Inst, uint64_t RegNo, 68 return decodeRegisterClass(Inst, RegNo, SystemZMC::GRH32Regs) [all...] |
/external/llvm/lib/Target/X86/MCTargetDesc/ |
X86BaseInfo.h | 722 inline bool isX86_64ExtendedReg(unsigned RegNo) { 723 if ((RegNo > X86::XMM7 && RegNo <= X86::XMM15) || 724 (RegNo > X86::XMM23 && RegNo <= X86::XMM31) || 725 (RegNo > X86::YMM7 && RegNo <= X86::YMM15) || 726 (RegNo > X86::YMM23 && RegNo <= X86::YMM31) || 727 (RegNo > X86::ZMM7 && RegNo <= X86::ZMM15) | [all...] |
/external/llvm/lib/CodeGen/AsmPrinter/ |
DbgValueHistoryCalculator.cpp | 78 // \brief Claim that @Var is not described by @RegNo anymore. 79 static void dropRegDescribedVar(RegDescribedVarsMap &RegVars, unsigned RegNo, 81 const auto &I = RegVars.find(RegNo); 82 assert(RegNo != 0U && I != RegVars.end()); 92 // \brief Claim that @Var is now described by @RegNo. 93 static void addRegDescribedVar(RegDescribedVarsMap &RegVars, unsigned RegNo, 95 assert(RegNo != 0U); 96 auto &VarSet = RegVars[RegNo]; 115 // @RegNo by inserting @ClobberingInstr to their history. 116 static void clobberRegisterUses(RegDescribedVarsMap &RegVars, unsigned RegNo, [all...] |
/external/llvm/lib/Target/PowerPC/Disassembler/ |
PPCDisassembler.cpp | 179 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, 181 assert(RegNo < N && "Invalid register number"); 182 Inst.addOperand(MCOperand::CreateReg(Regs[RegNo])); 186 static DecodeStatus DecodeCRRCRegisterClass(MCInst &Inst, uint64_t RegNo, 189 return decodeRegisterClass(Inst, RegNo, CRRegs); 192 static DecodeStatus DecodeCRRC0RegisterClass(MCInst &Inst, uint64_t RegNo, 195 return decodeRegisterClass(Inst, RegNo, CRRegs); 198 static DecodeStatus DecodeCRBITRCRegisterClass(MCInst &Inst, uint64_t RegNo, 201 return decodeRegisterClass(Inst, RegNo, CRBITRegs); 204 static DecodeStatus DecodeF4RCRegisterClass(MCInst &Inst, uint64_t RegNo, [all...] |
/external/llvm/lib/Target/BPF/InstPrinter/ |
BPFInstPrinter.h | 38 static const char *getRegisterName(unsigned RegNo);
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/external/mesa3d/src/gallium/drivers/radeon/InstPrinter/ |
AMDGPUInstPrinter.h | 19 static const char *getRegisterName(unsigned RegNo); 21 // virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
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/external/llvm/include/llvm/MC/ |
MCRegisterInfo.h | 323 const MCRegisterDesc &operator[](unsigned RegNo) const { 324 assert(RegNo < NumRegs && 326 return Desc[RegNo]; 331 const MCRegisterDesc &get(unsigned RegNo) const { 332 return operator[](RegNo); 336 /// for physical register RegNo. Return zero if the sub-register does not 348 unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const; 362 const char *getName(unsigned RegNo) const { 363 return RegStrings + get(RegNo).Name; 417 /// \brief Returns the encoding for RegNo [all...] |
MCTargetAsmParser.h | 125 virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, 129 virtual void SetFrameRegister(unsigned RegNo) {} 175 virtual bool OmitRegisterFromClobberLists(unsigned RegNo) { return false; }
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/external/llvm/lib/Target/Mips/ |
MipsTargetStreamer.h | 38 virtual void emitDirectiveSetAtWithArg(unsigned RegNo); 77 virtual void emitDirectiveCpLoad(unsigned RegNo); 78 virtual void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset, 154 void emitDirectiveSetAtWithArg(unsigned RegNo) override; 193 void emitDirectiveCpLoad(unsigned RegNo) override; 194 void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset, 239 void emitDirectiveCpLoad(unsigned RegNo) override; 240 void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
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/external/llvm/lib/Target/NVPTX/InstPrinter/ |
NVPTXInstPrinter.h | 30 void printRegName(raw_ostream &OS, unsigned RegNo) const override; 36 static const char *getRegisterName(unsigned RegNo);
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/external/llvm/lib/Target/Sparc/InstPrinter/ |
SparcInstPrinter.h | 30 void printRegName(raw_ostream &OS, unsigned RegNo) const override; 45 static const char *getRegisterName(unsigned RegNo);
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/external/llvm/lib/Target/Sparc/Disassembler/ |
SparcDisassembler.cpp | 110 unsigned RegNo, 113 if (RegNo > 31) 115 unsigned Reg = IntRegDecoderTable[RegNo]; 121 unsigned RegNo, 124 if (RegNo > 31) 126 unsigned Reg = IntRegDecoderTable[RegNo]; 133 unsigned RegNo, 136 if (RegNo > 31) 138 unsigned Reg = FPRegDecoderTable[RegNo]; 145 unsigned RegNo, [all...] |
/external/llvm/lib/Target/AArch64/InstPrinter/ |
AArch64InstPrinter.h | 33 void printRegName(raw_ostream &OS, unsigned RegNo) const override; 44 virtual StringRef getRegName(unsigned RegNo) const { 45 return getRegisterName(RegNo); 47 static const char *getRegisterName(unsigned RegNo, 174 StringRef getRegName(unsigned RegNo) const override { 175 return getRegisterName(RegNo); 177 static const char *getRegisterName(unsigned RegNo,
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/external/llvm/lib/Target/PowerPC/InstPrinter/ |
PPCInstPrinter.cpp | 36 void PPCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { 37 const char *RegName = getRegisterName(RegNo); 312 unsigned RegNo; 315 case PPC::CR0: RegNo = 0; break; 316 case PPC::CR1: RegNo = 1; break; 317 case PPC::CR2: RegNo = 2; break; 318 case PPC::CR3: RegNo = 3; break; 319 case PPC::CR4: RegNo = 4; break; 320 case PPC::CR5: RegNo = 5; break; 321 case PPC::CR6: RegNo = 6; break [all...] |
/external/llvm/lib/Target/Sparc/AsmParser/ |
SparcAsmParser.cpp | 53 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override; 72 // returns true if Tok is matched to a register and returns register in RegNo. 73 bool matchRegisterName(const AsmToken &Tok, unsigned &RegNo, 426 ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) 431 RegNo = 0; 436 if (matchRegisterName(Tok, RegNo, regKind)) { 604 unsigned RegNo, RegKind; 605 if (!matchRegisterName(Parser.getTok(), RegNo, RegKind)) 610 Operands.push_back(SparcOperand::CreateReg(RegNo, RegKind, S, E)); 654 unsigned RegNo; [all...] |
/external/llvm/lib/Target/AArch64/Disassembler/ |
AArch64Disassembler.cpp | 34 unsigned RegNo, uint64_t Address, 37 unsigned RegNo, 40 static DecodeStatus DecodeFPR64RegisterClass(llvm::MCInst &Inst, unsigned RegNo, 43 static DecodeStatus DecodeFPR32RegisterClass(llvm::MCInst &Inst, unsigned RegNo, 46 static DecodeStatus DecodeFPR16RegisterClass(llvm::MCInst &Inst, unsigned RegNo, 49 static DecodeStatus DecodeFPR8RegisterClass(llvm::MCInst &Inst, unsigned RegNo, 52 static DecodeStatus DecodeGPR64RegisterClass(llvm::MCInst &Inst, unsigned RegNo, 56 unsigned RegNo, uint64_t Address, 58 static DecodeStatus DecodeGPR32RegisterClass(llvm::MCInst &Inst, unsigned RegNo, 62 unsigned RegNo, uint64_t Address [all...] |