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Searched
refs:RegOp
(Results
1 - 14
of
14
) sorted by null
/external/llvm/lib/Target/BPF/InstPrinter/
BPFInstPrinter.cpp
66
const MCOperand &
RegOp
= MI->getOperand(OpNo);
75
assert(
RegOp
.isReg() && "Register operand not a register");
76
O << '(' << getRegisterName(
RegOp
.getReg()) << ')';
/external/llvm/lib/Target/Mips/
MipsAsmPrinter.cpp
493
unsigned
RegOp
= OpNum;
499
RegOp
= (Subtarget->isLittle()) ? OpNum + 1 : OpNum;
502
RegOp
= (Subtarget->isLittle()) ? OpNum : OpNum + 1;
505
RegOp
= OpNum + 1;
507
if (
RegOp
>= MI->getNumOperands())
509
const MachineOperand &MO = MI->getOperand(
RegOp
);
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...]
/external/llvm/lib/Target/Mips/AsmParser/
MipsAsmParser.cpp
[
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...]
/external/llvm/lib/Target/R600/AsmParser/
AMDGPUAsmParser.cpp
79
struct
RegOp
{
88
RegOp
Reg;
643
AMDGPUOperand &
RegOp
= ((AMDGPUOperand&)*Operands[PrevRegIdx]);
644
RegOp
.setModifiers(0);
653
AMDGPUOperand &
RegOp
= ((AMDGPUOperand&)*Operands[Operands.size() - 1]);
654
RegOp
.setModifiers(Modifiers);
[
all
...]
/external/llvm/lib/CodeGen/AsmPrinter/
DwarfCompileUnit.cpp
493
const MachineOperand
RegOp
= DVInsn->getOperand(0);
496
MachineLocation Location(
RegOp
.getReg(),
499
} else if (
RegOp
.getReg())
500
addVariableAddress(DV, *VariableDie, MachineLocation(
RegOp
.getReg()));
/external/llvm/lib/Target/X86/AsmParser/
X86Operand.h
41
struct
RegOp
{
61
struct
RegOp
Reg;
/external/llvm/lib/Target/X86/
X86InstrInfo.h
165
unsigned
RegOp
, unsigned MemOp, unsigned Flags);
X86InstrInfo.cpp
71
// Do not insert the reverse map (MemOp ->
RegOp
) into the table.
75
// Do not insert the forward map (
RegOp
-> MemOp) into the table.
84
// Used for
RegOp
->MemOp conversion.
95
uint16_t
RegOp
;
273
unsigned
RegOp
= MemoryFoldTable2Addr[i].
RegOp
;
277
RegOp
, MemOp,
428
unsigned
RegOp
= MemoryFoldTable0[i].
RegOp
;
432
RegOp
, MemOp, TB_INDEX_0 | Flags)
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...]
X86MCInstLower.cpp
351
unsigned
RegOp
= IsStore ? 0 : 5;
353
assert(Inst.getNumOperands() == 6 && Inst.getOperand(
RegOp
).isReg() &&
363
unsigned Reg = Inst.getOperand(
RegOp
).getReg();
[
all
...]
/external/llvm/lib/Target/Sparc/AsmParser/
SparcAsmParser.cpp
157
struct
RegOp
{
174
struct
RegOp
Reg;
/external/llvm/lib/Target/SystemZ/AsmParser/
SystemZAsmParser.cpp
82
struct
RegOp
{
109
RegOp
Reg;
/external/llvm/lib/Target/ARM/
ARMAsmPrinter.cpp
349
unsigned
RegOp
= ExtraCode[0] == 'Q' ? OpNum : OpNum + 1;
350
if (
RegOp
>= MI->getNumOperands())
352
const MachineOperand &MO = MI->getOperand(
RegOp
);
[
all
...]
/external/llvm/lib/Target/AArch64/AsmParser/
AArch64AsmParser.cpp
172
struct
RegOp
{
241
struct
RegOp
Reg;
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...]
/external/llvm/lib/Target/ARM/AsmParser/
ARMAsmParser.cpp
464
struct
RegOp
{
548
struct
RegOp
Reg;
[
all
...]
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