/prebuilts/gcc/darwin-x86/x86/x86_64-linux-android-4.9/lib/gcc/x86_64-linux-android/4.9/include/ |
arm_neon.h | 417 //Vector add: vadd -> Vr[i]:=Va[i]+Vb[i], Vr, Va, Vb have equal lane sizes. 436 //Vector long add: vaddl -> Vr[i]:=Va[i]+Vb[i], Va, Vb have equal lane sizes, result is a 128 bit vector of lanes that are twice the width. 525 //multiply lane 1214 uint8x16_t vld1q_lane_u8(__transfersize(1) uint8_t const * ptr, uint8x16_t vec, __constrange(0,15) int lane); \/\/VLD1.8 {d0[0]}, [r0] variable 1215 uint16x8_t vld1q_lane_u16(__transfersize(1) uint16_t const * ptr, uint16x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 1216 uint32x4_t vld1q_lane_u32(__transfersize(1) uint32_t const * ptr, uint32x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 1217 uint64x2_t vld1q_lane_u64(__transfersize(1) uint64_t const * ptr, uint64x2_t vec, __constrange(0,1) int lane); \/\/ VLD1.64 {d0}, [r0] variable 1218 int8x16_t vld1q_lane_s8(__transfersize(1) int8_t const * ptr, int8x16_t vec, __constrange(0,15) int lane); \/\/VLD1.8 {d0[0]}, [r0] variable 1219 int16x8_t vld1q_lane_s16(__transfersize(1) int16_t const * ptr, int16x8_t vec, __constrange(0,7) int lane); \/\/VLD1.16 {d0[0]}, [r0] variable 1220 int32x4_t vld1q_lane_s32(__transfersize(1) int32_t const * ptr, int32x4_t vec, __constrange(0,3) int lane); \/\/VLD1.32 {d0[0]}, [r0] variable 1221 float16x8_t vld1q_lane_f16(__transfersize(1) __fp16 const * ptr, float16x8_t vec, __constrange(0,7) int lane); \/\/VLD1.16 {d0[0]}, [r0] variable 1222 float32x4_t vld1q_lane_f32(__transfersize(1) float32_t const * ptr, float32x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 1223 int64x2_t vld1q_lane_s64(__transfersize(1) int64_t const * ptr, int64x2_t vec, __constrange(0,1) int lane); \/\/VLD1.64 {d0}, [r0] variable 1224 poly8x16_t vld1q_lane_p8(__transfersize(1) poly8_t const * ptr, poly8x16_t vec, __constrange(0,15) int lane); \/\/VLD1.8 {d0[0]}, [r0] variable 1225 poly16x8_t vld1q_lane_p16(__transfersize(1) poly16_t const * ptr, poly16x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 1226 uint8x8_t vld1_lane_u8(__transfersize(1) uint8_t const * ptr, uint8x8_t vec, __constrange(0,7) int lane); \/\/VLD1.8 {d0[0]}, [r0] variable 1227 uint16x4_t vld1_lane_u16(__transfersize(1) uint16_t const * ptr, uint16x4_t vec, __constrange(0,3) int lane); \/\/VLD1.16 {d0[0]}, [r0] variable 1228 uint32x2_t vld1_lane_u32(__transfersize(1) uint32_t const * ptr, uint32x2_t vec, __constrange(0,1) int lane); \/\/VLD1.32 {d0[0]}, [r0] variable 1229 uint64x1_t vld1_lane_u64(__transfersize(1) uint64_t const * ptr, uint64x1_t vec, __constrange(0,0) int lane); \/\/VLD1.64 {d0}, [r0] variable 1230 int8x8_t vld1_lane_s8(__transfersize(1) int8_t const * ptr, int8x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.8{d0[0]}, [r0] variable 1231 int16x4_t vld1_lane_s16(__transfersize(1) int16_t const * ptr, int16x4_t vec, __constrange(0,3) int lane); \/\/VLD1.16 {d0[0]}, [r0] variable 1232 int32x2_t vld1_lane_s32(__transfersize(1) int32_t const * ptr, int32x2_t vec, __constrange(0,1) int lane); \/\/VLD1.32 {d0[0]}, [r0] variable 1233 float16x4_t vld1q_lane_f16(__transfersize(1) __fp16 const * ptr, float16x4_t vec, __constrange(0,3) int lane); \/\/VLD1.16 {d0[0]}, [r0] variable 1234 float32x2_t vld1_lane_f32(__transfersize(1) float32_t const * ptr, float32x2_t vec, __constrange(0,1) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 1235 int64x1_t vld1_lane_s64(__transfersize(1) int64_t const * ptr, int64x1_t vec, __constrange(0,0) int lane); \/\/VLD1.64 {d0}, [r0] variable 1236 poly8x8_t vld1_lane_p8(__transfersize(1) poly8_t const * ptr, poly8x8_t vec, __constrange(0,7) int lane); \/\/VLD1.8 {d0[0]}, [r0] variable 1237 poly16x4_t vld1_lane_p16(__transfersize(1) poly16_t const * ptr, poly16x4_t vec, __constrange(0,3) int lane); \/\/VLD1.16 {d0[0]}, [r0] variable 1397 uint16x8x2_t vld2q_lane_u16_ptr(__transfersize(2) uint16_t const * ptr, uint16x8x2_t * src, __constrange(0,7) int lane); \/\/ VLD2.16 {d0[0], d2[0]}, [r0] variable 1398 uint32x4x2_t vld2q_lane_u32_ptr(__transfersize(2) uint32_t const * ptr, uint32x4x2_t * src, __constrange(0,3) int lane); \/\/ VLD2.32 {d0[0], d2[0]}, [r0] variable 1399 int16x8x2_t vld2q_lane_s16_ptr(__transfersize(2) int16_t const * ptr, int16x8x2_t * src, __constrange(0,7) int lane); \/\/ VLD2.16 {d0[0], d2[0]}, [r0] variable 1400 int32x4x2_t vld2q_lane_s32_ptr(__transfersize(2) int32_t const * ptr, int32x4x2_t * src, __constrange(0,3) int lane); \/\/ VLD2.32 {d0[0], d2[0]}, [r0] variable 1401 float16x8x2_t vld2q_lane_f16_ptr(__transfersize(2) __fp16 const * ptr, float16x8x2_t * src, __constrange(0,7) int lane); \/\/ VLD2.16 {d0[0], d2[0]}, [r0] variable 1402 float32x4x2_t vld2q_lane_f32_ptr(__transfersize(2) float32_t const * ptr, float32x4x2_t * src, __constrange(0,3) int lane); \/\/ VLD2.32 {d0[0], d2[0]}, [r0] variable 1403 poly16x8x2_t vld2q_lane_p16_ptr(__transfersize(2) poly16_t const * ptr, poly16x8x2_t * src, __constrange(0,7) int lane); \/\/ VLD2.16 {d0[0], d2[0]}, [r0] variable 1404 uint8x8x2_t vld2_lane_u8_ptr(__transfersize(2) uint8_t const * ptr, uint8x8x2_t * src, __constrange(0,7) int lane); \/\/VLD2.8 {d0[0], d1[0]}, [r0] variable 1405 uint16x4x2_t vld2_lane_u16_ptr(__transfersize(2) uint16_t const * ptr, uint16x4x2_t * src, __constrange(0,3) int lane); \/\/ VLD2.16 {d0[0], d1[0]}, [r0] variable 1406 uint32x2x2_t vld2_lane_u32_ptr(__transfersize(2) uint32_t const * ptr, uint32x2x2_t * src, __constrange(0,1) int lane); \/\/ VLD2.32 {d0[0], d1[0]}, [r0] variable 1407 int8x8x2_t vld2_lane_s8_ptr(__transfersize(2) int8_t const * ptr, int8x8x2_t * src, __constrange(0,7) int lane); \/\/VLD2.8 {d0[0], d1[0]}, [r0] variable 1408 int16x4x2_t vld2_lane_s16_ptr(__transfersize(2) int16_t const * ptr, int16x4x2_t * src, __constrange(0,3) int lane); \/\/VLD2.16 {d0[0], d1[0]}, [r0] variable 1409 int32x2x2_t vld2_lane_s32_ptr(__transfersize(2) int32_t const * ptr, int32x2x2_t * src, __constrange(0,1) int lane); \/\/VLD2.32 {d0[0], d1[0]}, [r0] variable 1411 float32x2x2_t vld2_lane_f32_ptr(__transfersize(2) float32_t const * ptr, float32x2x2_t * src, __constrange(0,1) int lane); \/\/ VLD2.32 {d0[0], d1[0]}, [r0] variable 1412 poly8x8x2_t vld2_lane_p8_ptr(__transfersize(2) poly8_t const * ptr, poly8x8x2_t * src, __constrange(0,7) int lane); \/\/VLD2.8 {d0[0], d1[0]}, [r0] variable 1413 poly16x4x2_t vld2_lane_p16_ptr(__transfersize(2) poly16_t const * ptr, poly16x4x2_t * src, __constrange(0,3) int lane); \/\/ VLD2.16 {d0[0], d1[0]}, [r0] variable 1414 uint16x8x3_t vld3q_lane_u16_ptr(__transfersize(3) uint16_t const * ptr, uint16x8x3_t * src, __constrange(0,7) int lane); \/\/ VLD3.16 {d0[0], d2[0], d4[0]}, [r0] variable 1415 uint32x4x3_t vld3q_lane_u32_ptr(__transfersize(3) uint32_t const * ptr, uint32x4x3_t * src, __constrange(0,3) int lane); \/\/ VLD3.32 {d0[0], d2[0], d4[0]}, [r0] variable 1416 int16x8x3_t vld3q_lane_s16_ptr(__transfersize(3) int16_t const * ptr, int16x8x3_t * src, __constrange(0,7) int lane); \/\/ VLD3.16 {d0[0], d2[0], d4[0]}, [r0] variable 1417 int32x4x3_t vld3q_lane_s32_ptr(__transfersize(3) int32_t const * ptr, int32x4x3_t * src, __constrange(0,3) int lane); \/\/ VLD3.32 {d0[0], d2[0], d4[0]}, [r0] variable 1418 float16x8x3_t vld3q_lane_f16_ptr(__transfersize(3) __fp16 const * ptr, float16x8x3_t * src, __constrange(0,7) int lane); \/\/ VLD3.16 {d0[0], d2[0], d4[0]}, [r0] variable 1419 float32x4x3_t vld3q_lane_f32_ptr(__transfersize(3) float32_t const * ptr, float32x4x3_t * src, __constrange(0,3) int lane); \/\/ VLD3.32 {d0[0], d2[0], d4[0]}, [r0] variable 1420 poly16x8x3_t vld3q_lane_p16_ptr(__transfersize(3) poly16_t const * ptr, poly16x8x3_t * src, __constrange(0,7) int lane); \/\/ VLD3.16 {d0[0], d2[0], d4[0]}, [r0] variable 1421 uint8x8x3_t vld3_lane_u8_ptr(__transfersize(3) uint8_t const * ptr, uint8x8x3_t * src, __constrange(0,7) int lane); \/\/VLD3.8 {d0[0], d1[0], d2[0]}, [r0] variable 1422 uint16x4x3_t vld3_lane_u16_ptr(__transfersize(3) uint16_t const * ptr, uint16x4x3_t * src, __constrange(0,3) int lane); \/\/ VLD3.16 {d0[0], d1[0], d2[0]}, [r0] variable 1423 uint32x2x3_t vld3_lane_u32_ptr(__transfersize(3) uint32_t const * ptr, uint32x2x3_t * src, __constrange(0,1) int lane); \/\/ VLD3.32 {d0[0], d1[0], d2[0]}, [r0] variable 1424 int8x8x3_t vld3_lane_s8_ptr(__transfersize(3) int8_t const * ptr, int8x8x3_t * src, __constrange(0,7) int lane); \/\/VLD3.8 {d0[0], d1[0], d2[0]}, [r0] variable 1425 int16x4x3_t vld3_lane_s16_ptr(__transfersize(3) int16_t const * ptr, int16x4x3_t * src, __constrange(0,3) int lane); \/\/VLD3.16 {d0[0], d1[0], d2[0]}, [r0] variable 1426 int32x2x3_t vld3_lane_s32_ptr(__transfersize(3) int32_t const * ptr, int32x2x3_t * src, __constrange(0,1) int lane); \/\/VLD3.32 {d0[0], d1[0], d2[0]}, [r0] variable 1427 float16x4x3_t vld3_lane_f16_ptr(__transfersize(3) __fp16 const * ptr, float16x4x3_t * src, __constrange(0,3) int lane); \/\/ VLD3.16 {d0[0], d1[0], d2[0]}, [r0] variable 1428 float32x2x3_t vld3_lane_f32_ptr(__transfersize(3) float32_t const * ptr, float32x2x3_t * src, __constrange(0,1) int lane); \/\/ VLD3.32 {d0[0], d1[0], d2[0]}, [r0] variable 1429 poly8x8x3_t vld3_lane_p8_ptr(__transfersize(3) poly8_t const * ptr, poly8x8x3_t * src, __constrange(0,7) int lane); \/\/VLD3.8 {d0[0], d1[0], d2[0]}, [r0] variable 1430 poly16x4x3_t vld3_lane_p16_ptr(__transfersize(3) poly16_t const * ptr, poly16x4x3_t * src, __constrange(0,3) int lane); \/\/ VLD3.16 {d0[0], d1[0], d2[0]}, [r0] variable 1431 uint16x8x4_t vld4q_lane_u16_ptr(__transfersize(4) uint16_t const * ptr, uint16x8x4_t * src, __constrange(0,7) int lane); \/\/ VLD4.16 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1432 uint32x4x4_t vld4q_lane_u32_ptr(__transfersize(4) uint32_t const * ptr, uint32x4x4_t * src, __constrange(0,3) int lane); \/\/ VLD4.32 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1433 int16x8x4_t vld4q_lane_s16_ptr(__transfersize(4) int16_t const * ptr, int16x8x4_t * src, __constrange(0,7) int lane); \/\/ VLD4.16 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1434 int32x4x4_t vld4q_lane_s32_ptr(__transfersize(4) int32_t const * ptr, int32x4x4_t * src, __constrange(0,3) int lane); \/\/ VLD4.32 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1435 float16x8x4_t vld4q_lane_f16_ptr(__transfersize(4) __fp16 const * ptr, float16x8x4_t * src, __constrange(0,7) int lane); \/\/ VLD4.16 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1436 float32x4x4_t vld4q_lane_f32_ptr(__transfersize(4) float32_t const * ptr, float32x4x4_t * src, __constrange(0,3) int lane); \/\/ VLD4.32 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1437 poly16x8x4_t vld4q_lane_p16_ptr(__transfersize(4) poly16_t const * ptr, poly16x8x4_t * src, __constrange(0,7) int lane); \/\/ VLD4.16 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1438 uint8x8x4_t vld4_lane_u8_ptr(__transfersize(4) uint8_t const * ptr, uint8x8x4_t * src, __constrange(0,7) int lane); \/\/VLD4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1439 uint16x4x4_t vld4_lane_u16_ptr(__transfersize(4) uint16_t const * ptr, uint16x4x4_t * src, __constrange(0,3) int lane); \/\/ VLD4.16 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1440 uint32x2x4_t vld4_lane_u32_ptr(__transfersize(4) uint32_t const * ptr, uint32x2x4_t * src, __constrange(0,1) int lane); \/\/ VLD4.32 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1441 int8x8x4_t vld4_lane_s8_ptr(__transfersize(4) int8_t const * ptr, int8x8x4_t * src, __constrange(0,7) int lane); \/\/VLD4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1442 int16x4x4_t vld4_lane_s16_ptr(__transfersize(4) int16_t const * ptr, int16x4x4_t * src, __constrange(0,3) int lane); \/\/VLD4.16 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1443 int32x2x4_t vld4_lane_s32_ptr(__transfersize(4) int32_t const * ptr, int32x2x4_t * src, __constrange(0,1) int lane); \/\/VLD4.32 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1444 float16x4x4_t vld4_lane_f16_ptr(__transfersize(4) __fp16 const * ptr, float16x4x4_t * src, __constrange(0,3) int lane); \/\/ VLD4.16 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1445 float32x2x4_t vld4_lane_f32_ptr(__transfersize(4) float32_t const * ptr, float32x2x4_t * src, __constrange(0,1) int lane); \/\/ VLD4.32 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1446 poly8x8x4_t vld4_lane_p8_ptr(__transfersize(4) poly8_t const * ptr, poly8x8x4_t * src, __constrange(0,7) int lane); \/\/VLD4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1447 poly16x4x4_t vld4_lane_p16_ptr(__transfersize(4) poly16_t const * ptr, poly16x4x4_t * src, __constrange(0,3) int lane); \/\/ VLD4.16 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1516 void vst2q_lane_u16_ptr(__transfersize(2) uint16_t * ptr, uint16x8x2_t * val, __constrange(0,7) int lane); \/\/ VST2.16{d0[0], d2[0]}, [r0] variable 1517 void vst2q_lane_u32_ptr(__transfersize(2) uint32_t * ptr, uint32x4x2_t * val, __constrange(0,3) int lane); \/\/ VST2.32{d0[0], d2[0]}, [r0] variable 1518 void vst2q_lane_s16_ptr(__transfersize(2) int16_t * ptr, int16x8x2_t * val, __constrange(0,7) int lane); \/\/ VST2.16{d0[0], d2[0]}, [r0] variable 1519 void vst2q_lane_s32_ptr(__transfersize(2) int32_t * ptr, int32x4x2_t * val, __constrange(0,3) int lane); \/\/ VST2.32{d0[0], d2[0]}, [r0] variable 1520 void vst2q_lane_f16_ptr(__transfersize(2) __fp16 * ptr, float16x8x2_t * val, __constrange(0,7) int lane); \/\/ VST2.16{d0[0], d2[0]}, [r0] variable 1521 void vst2q_lane_f32_ptr(__transfersize(2) float32_t * ptr, float32x4x2_t * val, __constrange(0,3) int lane); \/\/VST2.32 {d0[0], d2[0]}, [r0] variable 1522 void vst2q_lane_p16_ptr(__transfersize(2) poly16_t * ptr, poly16x8x2_t * val, __constrange(0,7) int lane); \/\/ VST2.16{d0[0], d2[0]}, [r0] variable 1523 void vst2_lane_u8_ptr(__transfersize(2) uint8_t * ptr, uint8x8x2_t * val, __constrange(0,7) int lane); \/\/ VST2.8{d0[0], d1[0]}, [r0] variable 1524 void vst2_lane_u16_ptr(__transfersize(2) uint16_t * ptr, uint16x4x2_t * val, __constrange(0,3) int lane); \/\/ VST2.16{d0[0], d1[0]}, [r0] variable 1525 void vst2_lane_u32_ptr(__transfersize(2) uint32_t * ptr, uint32x2x2_t * val, __constrange(0,1) int lane); \/\/ VST2.32{d0[0], d1[0]}, [r0] variable 1526 void vst2_lane_s8_ptr(__transfersize(2) int8_t * ptr, int8x8x2_t * val, __constrange(0,7) int lane); \/\/ VST2.8 {d0[0],d1[0]}, [r0] variable 1527 void vst2_lane_s16_ptr(__transfersize(2) int16_t * ptr, int16x4x2_t * val, __constrange(0,3) int lane); \/\/ VST2.16{d0[0], d1[0]}, [r0] variable 1528 void vst2_lane_s32_ptr(__transfersize(2) int32_t * ptr, int32x2x2_t * val, __constrange(0,1) int lane); \/\/ VST2.32{d0[0], d1[0]}, [r0] variable 1529 void vst2_lane_f16_ptr(__transfersize(2) __fp16 * ptr, float16x4x2_t * val, __constrange(0,3) int lane); \/\/ VST2.16{d0[0], d1[0]}, [r0] variable 1530 void vst2_lane_f32_ptr(__transfersize(2) float32_t * ptr, float32x2x2_t * val, __constrange(0,1) int lane); \/\/ VST2.32{d0[0], d1[0]}, [r0] variable 1531 void vst2_lane_p8_ptr(__transfersize(2) poly8_t * ptr, poly8x8x2_t * val, __constrange(0,7) int lane); \/\/ VST2.8{d0[0], d1[0]}, [r0] variable 1532 void vst2_lane_p16_ptr(__transfersize(2) poly16_t * ptr, poly16x4x2_t * val, __constrange(0,3) int lane); \/\/ VST2.16{d0[0], d1[0]}, [r0] variable 1533 void vst3q_lane_u16_ptr(__transfersize(3) uint16_t * ptr, uint16x8x3_t * val, __constrange(0,7) int lane); \/\/ VST3.16{d0[0], d2[0], d4[0]}, [r0] variable 1534 void vst3q_lane_u32_ptr(__transfersize(3) uint32_t * ptr, uint32x4x3_t * val, __constrange(0,3) int lane); \/\/ VST3.32{d0[0], d2[0], d4[0]}, [r0] variable 1535 void vst3q_lane_s16_ptr(__transfersize(3) int16_t * ptr, int16x8x3_t * val, __constrange(0,7) int lane); \/\/ VST3.16{d0[0], d2[0], d4[0]}, [r0] variable 1536 void vst3q_lane_s32_ptr(__transfersize(3) int32_t * ptr, int32x4x3_t * val, __constrange(0,3) int lane); \/\/ VST3.32{d0[0], d2[0], d4[0]}, [r0] variable 1537 void vst3q_lane_f16_ptr(__transfersize(3) __fp16 * ptr, float16x8x3_t * val, __constrange(0,7) int lane); \/\/ VST3.16{d0[0], d2[0], d4[0]}, [r0] variable 1538 void vst3q_lane_f32_ptr(__transfersize(3) float32_t * ptr, float32x4x3_t * val, __constrange(0,3) int lane); \/\/VST3.32 {d0[0], d2[0], d4[0]}, [r0] variable 1539 void vst3q_lane_p16_ptr(__transfersize(3) poly16_t * ptr, poly16x8x3_t * val, __constrange(0,7) int lane); \/\/ VST3.16{d0[0], d2[0], d4[0]}, [r0] variable 1540 void vst3_lane_u8_ptr(__transfersize(3) uint8_t * ptr, uint8x8x3_t * val, __constrange(0,7) int lane); \/\/ VST3.8{d0[0], d1[0], d2[0]}, [r0] variable 1541 void vst3_lane_u16_ptr(__transfersize(3) uint16_t * ptr, uint16x4x3_t * val, __constrange(0,3) int lane); \/\/ VST3.16{d0[0], d1[0], d2[0]}, [r0] variable 1542 void vst3_lane_u32_ptr(__transfersize(3) uint32_t * ptr, uint32x2x3_t * val, __constrange(0,1) int lane); \/\/ VST3.32{d0[0], d1[0], d2[0]}, [r0] variable 1543 void vst3_lane_s8_ptr(__transfersize(3) int8_t * ptr, int8x8x3_t * val, __constrange(0,7) int lane); \/\/ VST3.8 {d0[0],d1[0], d2[0]}, [r0] variable 1544 void vst3_lane_s16_ptr(__transfersize(3) int16_t * ptr, int16x4x3_t * val, __constrange(0,3) int lane); \/\/ VST3.16{d0[0], d1[0], d2[0]}, [r0] variable 1545 void vst3_lane_s32_ptr(__transfersize(3) int32_t * ptr, int32x2x3_t * val, __constrange(0,1) int lane); \/\/ VST3.32{d0[0], d1[0], d2[0]}, [r0] variable 1546 void vst3_lane_f16_ptr(__transfersize(3) __fp16 * ptr, float16x4x3_t * val, __constrange(0,3) int lane); \/\/ VST3.16{d0[0], d1[0], d2[0]}, [r0] variable 1547 void vst3_lane_f32_ptr(__transfersize(3) float32_t * ptr, float32x2x3_t * val, __constrange(0,1) int lane); \/\/ VST3.32{d0[0], d1[0], d2[0]}, [r0] variable 1548 void vst3_lane_p8_ptr(__transfersize(3) poly8_t * ptr, poly8x8x3_t * val, __constrange(0,7) int lane); \/\/ VST3.8{d0[0], d1[0], d2[0]}, [r0] variable 1549 void vst3_lane_p16_ptr(__transfersize(3) poly16_t * ptr, poly16x4x3_t * val, __constrange(0,3) int lane); \/\/ VST3.16{d0[0], d1[0], d2[0]}, [r0] variable 1550 void vst4q_lane_u16_ptr(__transfersize(4) uint16_t * ptr, uint16x8x4_t * val, __constrange(0,7) int lane); \/\/ VST4.16{d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1551 void vst4q_lane_u32_ptr(__transfersize(4) uint32_t * ptr, uint32x4x4_t * val, __constrange(0,3) int lane); \/\/ VST4.32{d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1552 void vst4q_lane_s16_ptr(__transfersize(4) int16_t * ptr, int16x8x4_t * val, __constrange(0,7) int lane); \/\/ VST4.16{d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1553 void vst4q_lane_s32_ptr(__transfersize(4) int32_t * ptr, int32x4x4_t * val, __constrange(0,3) int lane); \/\/ VST4.32{d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1554 void vst4q_lane_f16_ptr(__transfersize(4) __fp16 * ptr, float16x8x4_t * val, __constrange(0,7) int lane); \/\/ VST4.16{d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1555 void vst4q_lane_f32_ptr(__transfersize(4) float32_t * ptr, float32x4x4_t * val, __constrange(0,3) int lane); \/\/VST4.32 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1556 void vst4q_lane_p16_ptr(__transfersize(4) poly16_t * ptr, poly16x8x4_t * val, __constrange(0,7) int lane); \/\/ VST4.16{d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1557 void vst4_lane_u8_ptr(__transfersize(4) uint8_t * ptr, uint8x8x4_t * val, __constrange(0,7) int lane); \/\/ VST4.8{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1558 void vst4_lane_u16_ptr(__transfersize(4) uint16_t * ptr, uint16x4x4_t * val, __constrange(0,3) int lane); \/\/ VST4.16{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1559 void vst4_lane_u32_ptr(__transfersize(4) uint32_t * ptr, uint32x2x4_t * val, __constrange(0,1) int lane); \/\/ VST4.32{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1560 void vst4_lane_s8_ptr(__transfersize(4) int8_t * ptr, int8x8x4_t * val, __constrange(0,7) int lane); \/\/ VST4.8 {d0[0],d1[0], d2[0], d3[0]}, [r0] variable 1561 void vst4_lane_s16_ptr(__transfersize(4) int16_t * ptr, int16x4x4_t * val, __constrange(0,3) int lane); \/\/ VST4.16{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1562 void vst4_lane_s32_ptr(__transfersize(4) int32_t * ptr, int32x2x4_t * val, __constrange(0,1) int lane); \/\/ VST4.32{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1563 void vst4_lane_f16_ptr(__transfersize(4) __fp16 * ptr, float16x4x4_t * val, __constrange(0,3) int lane); \/\/ VST4.16{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1564 void vst4_lane_f32_ptr(__transfersize(4) float32_t * ptr, float32x2x4_t * val, __constrange(0,1) int lane); \/\/ VST4.32{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1565 void vst4_lane_p8_ptr(__transfersize(4) poly8_t * ptr, poly8x8x4_t * val, __constrange(0,7) int lane); \/\/ VST4.8{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1566 void vst4_lane_p16_ptr(__transfersize(4) poly16_t * ptr, poly16x4x4_t * val, __constrange(0,3) int lane); \/\/ VST4.16{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 9283 uint8x16_t vld1q_lane_u8(__transfersize(1) uint8_t const * ptr, uint8x16_t vec, __constrange(0,15) int lane); \/\/ VLD1.8 {d0[0]}, [r0] variable 9286 uint16x8_t vld1q_lane_u16(__transfersize(1) uint16_t const * ptr, uint16x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 9289 uint32x4_t vld1q_lane_u32(__transfersize(1) uint32_t const * ptr, uint32x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 9292 uint64x2_t vld1q_lane_u64(__transfersize(1) uint64_t const * ptr, uint64x2_t vec, __constrange(0,1) int lane); \/\/ VLD1.64 {d0}, [r0] variable 9296 int8x16_t vld1q_lane_s8(__transfersize(1) int8_t const * ptr, int8x16_t vec, __constrange(0,15) int lane); \/\/ VLD1.8 {d0[0]}, [r0] variable 9299 int16x8_t vld1q_lane_s16(__transfersize(1) int16_t const * ptr, int16x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 9302 int32x4_t vld1q_lane_s32(__transfersize(1) int32_t const * ptr, int32x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 9305 float16x8_t vld1q_lane_f16(__transfersize(1) __fp16 const * ptr, float16x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 9308 float32x4_t vld1q_lane_f32(__transfersize(1) float32_t const * ptr, float32x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 9317 int64x2_t vld1q_lane_s64(__transfersize(1) int64_t const * ptr, int64x2_t vec, __constrange(0,1) int lane); \/\/ VLD1.64 {d0}, [r0] variable 9320 poly8x16_t vld1q_lane_p8(__transfersize(1) poly8_t const * ptr, poly8x16_t vec, __constrange(0,15) int lane); \/\/ VLD1.8 {d0[0]}, [r0] variable 9323 poly16x8_t vld1q_lane_p16(__transfersize(1) poly16_t const * ptr, poly16x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 9326 uint8x8_t vld1_lane_u8(__transfersize(1) uint8_t const * ptr, uint8x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.8 {d0[0]}, [r0] variable 9335 uint16x4_t vld1_lane_u16(__transfersize(1) uint16_t const * ptr, uint16x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 9344 uint32x2_t vld1_lane_u32(__transfersize(1) uint32_t const * ptr, uint32x2_t vec, __constrange(0,1) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 9353 uint64x1_t vld1_lane_u64(__transfersize(1) uint64_t const * ptr, uint64x1_t vec, __constrange(0,0) int lane); \/\/ VLD1.64 {d0}, [r0] variable 9362 int8x8_t vld1_lane_s8(__transfersize(1) int8_t const * ptr, int8x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.8 {d0[0]}, [r0] variable 9365 int16x4_t vld1_lane_s16(__transfersize(1) int16_t const * ptr, int16x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 9368 int32x2_t vld1_lane_s32(__transfersize(1) int32_t const * ptr, int32x2_t vec, __constrange(0,1) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 9371 float16x4_t vld1_lane_f16(__transfersize(1) __fp16 const * ptr, float16x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 9374 float32x2_t vld1_lane_f32(__transfersize(1) float32_t const * ptr, float32x2_t vec, __constrange(0,1) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 9383 int64x1_t vld1_lane_s64(__transfersize(1) int64_t const * ptr, int64x1_t vec, __constrange(0,0) int lane); \/\/ VLD1.64 {d0}, [r0] variable 9386 poly8x8_t vld1_lane_p8(__transfersize(1) poly8_t const * ptr, poly8x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.8 {d0[0]}, [r0] variable 9389 poly16x4_t vld1_lane_p16(__transfersize(1) poly16_t const * ptr, poly16x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 9630 void vst1q_lane_u8(__transfersize(1) uint8_t * ptr, uint8x16_t val, __constrange(0,15) int lane); \/\/ VST1.8 {d0[0]}, [r0] variable 9633 void vst1q_lane_u16(__transfersize(1) uint16_t * ptr, uint16x8_t val, __constrange(0,7) int lane); \/\/ VST1.16 {d0[0]}, [r0] variable 9636 void vst1q_lane_u32(__transfersize(1) uint32_t * ptr, uint32x4_t val, __constrange(0,3) int lane); \/\/ VST1.32 {d0[0]}, [r0] variable 9639 void vst1q_lane_u64(__transfersize(1) uint64_t * ptr, uint64x2_t val, __constrange(0,1) int lane); \/\/ VST1.64 {d0}, [r0] variable 9642 void vst1q_lane_s8(__transfersize(1) int8_t * ptr, int8x16_t val, __constrange(0,15) int lane); \/\/ VST1.8 {d0[0]}, [r0] variable 9645 void vst1q_lane_s16(__transfersize(1) int16_t * ptr, int16x8_t val, __constrange(0,7) int lane); \/\/ VST1.16 {d0[0]}, [r0] variable 9648 void vst1q_lane_s32(__transfersize(1) int32_t * ptr, int32x4_t val, __constrange(0,3) int lane); \/\/ VST1.32 {d0[0]}, [r0] variable 9651 void vst1q_lane_s64(__transfersize(1) int64_t * ptr, int64x2_t val, __constrange(0,1) int lane); \/\/ VST1.64 {d0}, [r0] variable 9654 void vst1q_lane_f16(__transfersize(1) __fp16 * ptr, float16x8_t val, __constrange(0,7) int lane); \/\/ VST1.16 {d0[0]}, [r0] variable 9657 void vst1q_lane_f32(__transfersize(1) float32_t * ptr, float32x4_t val, __constrange(0,3) int lane); \/\/ VST1.32 {d0[0]}, [r0] variable 9665 void vst1q_lane_p8(__transfersize(1) poly8_t * ptr, poly8x16_t val, __constrange(0,15) int lane); \/\/ VST1.8 {d0[0]}, [r0] variable 9668 void vst1q_lane_p16(__transfersize(1) poly16_t * ptr, poly16x8_t val, __constrange(0,7) int lane); \/\/ VST1.16 {d0[0]}, [r0] variable 9671 void vst1_lane_u8(__transfersize(1) uint8_t * ptr, uint8x8_t val, __constrange(0,7) int lane); \/\/ VST1.8 {d0[0]}, [r0] variable 9677 void vst1_lane_u16(__transfersize(1) uint16_t * ptr, uint16x4_t val, __constrange(0,3) int lane); \/\/ VST1.16 {d0[0]}, [r0] variable 9683 void vst1_lane_u32(__transfersize(1) uint32_t * ptr, uint32x2_t val, __constrange(0,1) int lane); \/\/ VST1.32 {d0[0]}, [r0] variable 9689 void vst1_lane_u64(__transfersize(1) uint64_t * ptr, uint64x1_t val, __constrange(0,0) int lane); \/\/ VST1.64 {d0}, [r0] variable 9695 void vst1_lane_s8(__transfersize(1) int8_t * ptr, int8x8_t val, __constrange(0,7) int lane); \/\/ VST1.8 {d0[0]}, [r0] variable 9698 void vst1_lane_s16(__transfersize(1) int16_t * ptr, int16x4_t val, __constrange(0,3) int lane); \/\/ VST1.16 {d0[0]}, [r0] variable 9701 void vst1_lane_s32(__transfersize(1) int32_t * ptr, int32x2_t val, __constrange(0,1) int lane); \/\/ VST1.32 {d0[0]}, [r0] variable 9705 void vst1_lane_s64(__transfersize(1) int64_t * ptr, int64x1_t val, __constrange(0,0) int lane); \/\/ VST1.64 {d0}, [r0] variable 9709 void vst1_lane_f16(__transfersize(1) __fp16 * ptr, float16x4_t val, __constrange(0,3) int lane); \/\/ VST1.16 {d0[0]}, [r0] variable 9712 void vst1_lane_f32(__transfersize(1) float32_t * ptr, float32x2_t val, __constrange(0,1) int lane); \/\/ VST1.32 {d0[0]}, [r0] variable 9718 void vst1_lane_p8(__transfersize(1) poly8_t * ptr, poly8x8_t val, __constrange(0,7) int lane); \/\/ VST1.8 {d0[0]}, [r0] variable 9721 void vst1_lane_p16(__transfersize(1) poly16_t * ptr, poly16x4_t val, __constrange(0,3) int lane); \/\/ VST1.16 {d0[0]}, [r0] variable 10738 int8x8x2_t vld2_lane_s8_ptr(__transfersize(2) int8_t const * ptr, int8x8x2_t * src, __constrange(0,7) int lane); \/\/ VLD2.8 {d0[0], d1[0]}, [r0] variable 10742 int16x4x2_t vld2_lane_s16_ptr(__transfersize(2) int16_t const * ptr, int16x4x2_t * src, __constrange(0,3) int lane); \/\/ VLD2.16 {d0[0], d1[0]}, [r0] variable 10746 int32x2x2_t vld2_lane_s32_ptr(__transfersize(2) int32_t const * ptr, int32x2x2_t * src, __constrange(0,1) int lane); \/\/ VLD2.32 {d0[0], d1[0]}, [r0] variable 10752 float32x2x2_t vld2_lane_f32_ptr(__transfersize(2) float32_t const * ptr, float32x2x2_t * src,__constrange(0,1) int lane); \/\/ VLD2.32 {d0[0], d1[0]}, [r0] variable 10763 poly8x8x2_t vld2_lane_p8_ptr(__transfersize(2) poly8_t const * ptr, poly8x8x2_t * src, __constrange(0,7) int lane); \/\/ VLD2.8 {d0[0], d1[0]}, [r0] variable 10767 poly16x4x2_t vld2_lane_p16_ptr(__transfersize(2) poly16_t const * ptr, poly16x4x2_t * src, __constrange(0,3) int lane); \/\/ VLD2.16 {d0[0], d1[0]}, [r0] variable 10819 float16x8x3_t vld3q_lane_f16_ptr(__transfersize(3) __fp16 const * ptr, float16x8x3_t * src, __constrange(0,7) int lane); \/\/ VLD3.16 {d0[0], d2[0], d4[0]}, [r0] variable 10835 poly16x8x3_t vld3q_lane_p16_ptr(__transfersize(3) poly16_t const * ptr, poly16x8x3_t * src,__constrange(0,7) int lane); \/\/ VLD3.16 {d0[0], d2[0], d4[0]}, [r0] variable 10872 int8x8x3_t vld3_lane_s8_ptr(__transfersize(3) int8_t const * ptr, int8x8x3_t * src, __constrange(0,7) int lane); \/\/ VLD3.8 {d0[0], d1[0], d2[0]}, [r0] variable 10875 int16x4x3_t vld3_lane_s16_ptr(__transfersize(3) int16_t const * ptr, int16x4x3_t * src, __constrange(0,3) int lane); \/\/ VLD3.16 {d0[0], d1[0], d2[0]}, [r0] variable 10878 int32x2x3_t vld3_lane_s32_ptr(__transfersize(3) int32_t const * ptr, int32x2x3_t * src, __constrange(0,1) int lane); \/\/ VLD3.32 {d0[0], d1[0], d2[0]}, [r0] variable 10881 float16x4x3_t vld3_lane_f16_ptr(__transfersize(3) __fp16 const * ptr, float16x4x3_t * src, __constrange(0,3) int lane); \/\/ VLD3.16 {d0[0], d1[0], d2[0]}, [r0] variable 10931 int16x8x4_t vld4q_lane_s16_ptr(__transfersize(4) int16_t const * ptr, int16x8x4_t * src, __constrange(0,7) int lane); \/\/ VLD4.16 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 10935 int32x4x4_t vld4q_lane_s32_ptr(__transfersize(4) int32_t const * ptr, int32x4x4_t * src, __constrange(0,3) int lane); \/\/ VLD4.32 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 10939 float16x8x4_t vld4q_lane_f16_ptr(__transfersize(4) __fp16 const * ptr, float16x8x4_t * src, __constrange(0,7) int lane); \/\/ VLD4.16 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 10955 poly16x8x4_t vld4q_lane_p16_ptr(__transfersize(4) poly16_t const * ptr, poly16x8x4_t * src,__constrange(0,7) int lane); \/\/ VLD4.16 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 10995 int8x8x4_t vld4_lane_s8_ptr(__transfersize(4) int8_t const * ptr, int8x8x4_t * src, __constrange(0,7) int lane); variable 10999 int16x4x4_t vld4_lane_s16_ptr(__transfersize(4) int16_t const * ptr, int16x4x4_t * src, __constrange(0,3) int lane); variable 11003 int32x2x4_t vld4_lane_s32_ptr(__transfersize(4) int32_t const * ptr, int32x2x4_t * src, __constrange(0,1) int lane); variable 11007 float16x4x4_t vld4_lane_f16_ptr(__transfersize(4) __fp16 const * ptr, float16x4x4_t * src, __constrange(0,3) int lane); variable 11024 poly8x8x4_t vld4_lane_p8_ptr(__transfersize(4) poly8_t const * ptr, poly8x8x4_t * src, __constrange(0,7) int lane); variable 11028 poly16x4x4_t vld4_lane_p16_ptr(__transfersize(4) poly16_t const * ptr, poly16x4x4_t * src, __constrange(0,3) int lane); variable 11623 void vst2q_lane_s16_ptr(__transfersize(2) int16_t * ptr, int16x8x2_t * val, __constrange(0,7) int lane); variable 11627 void vst2q_lane_s32_ptr(__transfersize(2) int32_t * ptr, int32x4x2_t * val, __constrange(0,3) int lane); variable 11631 void vst2q_lane_f16_ptr(__transfersize(2) __fp16 * ptr, float16x8x2_t * val, __constrange(0,7) int lane); variable 11643 void vst2q_lane_p16_ptr(__transfersize(2) poly16_t * ptr, poly16x8x2_t * val, __constrange(0,7) int lane); variable 11647 void vst2_lane_u8_ptr(__transfersize(2) uint8_t * ptr, uint8x8x2_t * val, __constrange(0,7) int lane); \/\/ VST2.8 {d0[0], d1[0]}, [r0] variable 11656 void vst2_lane_u16_ptr(__transfersize(2) uint16_t * ptr, uint16x4x2_t * val, __constrange(0,3) int lane); \/\/ VST2.16 {d0[0], d1[0]}, [r0] variable 11665 void vst2_lane_u32_ptr(__transfersize(2) uint32_t * ptr, uint32x2x2_t * val, __constrange(0,1) int lane); \/\/ VST2.32 {d0[0], d1[0]}, [r0] variable 11674 void vst2_lane_s8_ptr(__transfersize(2) int8_t * ptr, int8x8x2_t * val, __constrange(0,7) int lane); variable 11678 void vst2_lane_s16_ptr(__transfersize(2) int16_t * ptr, int16x4x2_t * val, __constrange(0,3) int lane); variable 11682 void vst2_lane_s32_ptr(__transfersize(2) int32_t * ptr, int32x2x2_t * val, __constrange(0,1) int lane); variable 11688 void vst2_lane_f32_ptr(__transfersize(2) float32_t * ptr, float32x2x2_t * val, __constrange(0,1) int lane); \/\/ VST2.32 {d0[0], d1[0]}, [r0] variable 11721 void vst3q_lane_s16_ptr(__transfersize(3) int16_t * ptr, int16x8x3_t * val, __constrange(0,7) int lane); variable 11725 void vst3q_lane_s32_ptr(__transfersize(3) int32_t * ptr, int32x4x3_t * val, __constrange(0,3) int lane); variable 11729 void vst3q_lane_f16_ptr(__transfersize(3) __fp16 * ptr, float16x8x3_t * val, __constrange(0,7) int lane); variable 11742 void vst3q_lane_p16_ptr(__transfersize(3) poly16_t * ptr, poly16x8x3_t * val, __constrange(0,7) int lane); variable 11773 void vst3_lane_s8_ptr(__transfersize(3) int8_t * ptr, int8x8x3_t * val, __constrange(0,7) int lane); variable 11777 void vst3_lane_s16_ptr(__transfersize(3) int16_t * ptr, int16x4x3_t * val, __constrange(0,3) int lane); variable 11781 void vst3_lane_s32_ptr(__transfersize(3) int32_t * ptr, int32x2x3_t * val, __constrange(0,1) int lane); variable 11785 void vst3_lane_f16_ptr(__transfersize(3) __fp16 * ptr, float16x4x3_t * val, __constrange(0,3) int lane); variable 11789 void vst3_lane_f32_ptr(__transfersize(3) float32_t * ptr, float32x2x3_t * val, __constrange(0,1) int lane); variable 11799 void vst3_lane_p8_ptr(__transfersize(3) poly8_t * ptr, poly8x8x3_t * val, __constrange(0,7) int lane); variable 11803 void vst3_lane_p16_ptr(__transfersize(3) poly16_t * ptr, poly16x4x3_t * val, __constrange(0,3) int lane); variable 11825 void vst4q_lane_s16_ptr(__transfersize(4) int16_t * ptr, int16x8x4_t * val, __constrange(0,7) int lane); variable 11829 void vst4q_lane_s32_ptr(__transfersize(4) int32_t * ptr, int32x4x4_t * val, __constrange(0,3) int lane); variable 11833 void vst4q_lane_f16_ptr(__transfersize(4) __fp16 * ptr, float16x8x4_t * val, __constrange(0,7) int lane); variable 11847 void vst4q_lane_p16_ptr(__transfersize(4) poly16_t * ptr, poly16x8x4_t * val, __constrange(0,7) int lane); variable 11890 void vst4_lane_f16_ptr(__transfersize(4) __fp16 * ptr, float16x4x4_t * val, __constrange(0,3) int lane); variable 11893 void vst4_lane_f32_ptr(__transfersize(4) float32_t * ptr, float32x2x4_t * val, __constrange(0,1) int lane); \/\/ VST4.32 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 11904 void vst4_lane_p8_ptr(__transfersize(4) poly8_t * ptr, poly8x8x4_t * val, __constrange(0,7) int lane); variable 11908 void vst4_lane_p16_ptr(__transfersize(4) poly16_t * ptr, poly16x4x4_t * val, __constrange(0,3) int lane); variable [all...] |
/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/lib/gcc/x86_64-linux/4.8/include/ |
arm_neon.h | 415 //Vector add: vadd -> Vr[i]:=Va[i]+Vb[i], Vr, Va, Vb have equal lane sizes. 434 //Vector long add: vaddl -> Vr[i]:=Va[i]+Vb[i], Va, Vb have equal lane sizes, result is a 128 bit vector of lanes that are twice the width. 523 //multiply lane 1212 uint8x16_t vld1q_lane_u8(__transfersize(1) uint8_t const * ptr, uint8x16_t vec, __constrange(0,15) int lane); \/\/VLD1.8 {d0[0]}, [r0] variable 1213 uint16x8_t vld1q_lane_u16(__transfersize(1) uint16_t const * ptr, uint16x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 1214 uint32x4_t vld1q_lane_u32(__transfersize(1) uint32_t const * ptr, uint32x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 1215 uint64x2_t vld1q_lane_u64(__transfersize(1) uint64_t const * ptr, uint64x2_t vec, __constrange(0,1) int lane); \/\/ VLD1.64 {d0}, [r0] variable 1216 int8x16_t vld1q_lane_s8(__transfersize(1) int8_t const * ptr, int8x16_t vec, __constrange(0,15) int lane); \/\/VLD1.8 {d0[0]}, [r0] variable 1217 int16x8_t vld1q_lane_s16(__transfersize(1) int16_t const * ptr, int16x8_t vec, __constrange(0,7) int lane); \/\/VLD1.16 {d0[0]}, [r0] variable 1218 int32x4_t vld1q_lane_s32(__transfersize(1) int32_t const * ptr, int32x4_t vec, __constrange(0,3) int lane); \/\/VLD1.32 {d0[0]}, [r0] variable 1219 float16x8_t vld1q_lane_f16(__transfersize(1) __fp16 const * ptr, float16x8_t vec, __constrange(0,7) int lane); \/\/VLD1.16 {d0[0]}, [r0] variable 1220 float32x4_t vld1q_lane_f32(__transfersize(1) float32_t const * ptr, float32x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 1221 int64x2_t vld1q_lane_s64(__transfersize(1) int64_t const * ptr, int64x2_t vec, __constrange(0,1) int lane); \/\/VLD1.64 {d0}, [r0] variable 1222 poly8x16_t vld1q_lane_p8(__transfersize(1) poly8_t const * ptr, poly8x16_t vec, __constrange(0,15) int lane); \/\/VLD1.8 {d0[0]}, [r0] variable 1223 poly16x8_t vld1q_lane_p16(__transfersize(1) poly16_t const * ptr, poly16x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 1224 uint8x8_t vld1_lane_u8(__transfersize(1) uint8_t const * ptr, uint8x8_t vec, __constrange(0,7) int lane); \/\/VLD1.8 {d0[0]}, [r0] variable 1225 uint16x4_t vld1_lane_u16(__transfersize(1) uint16_t const * ptr, uint16x4_t vec, __constrange(0,3) int lane); \/\/VLD1.16 {d0[0]}, [r0] variable 1226 uint32x2_t vld1_lane_u32(__transfersize(1) uint32_t const * ptr, uint32x2_t vec, __constrange(0,1) int lane); \/\/VLD1.32 {d0[0]}, [r0] variable 1227 uint64x1_t vld1_lane_u64(__transfersize(1) uint64_t const * ptr, uint64x1_t vec, __constrange(0,0) int lane); \/\/VLD1.64 {d0}, [r0] variable 1228 int8x8_t vld1_lane_s8(__transfersize(1) int8_t const * ptr, int8x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.8{d0[0]}, [r0] variable 1229 int16x4_t vld1_lane_s16(__transfersize(1) int16_t const * ptr, int16x4_t vec, __constrange(0,3) int lane); \/\/VLD1.16 {d0[0]}, [r0] variable 1230 int32x2_t vld1_lane_s32(__transfersize(1) int32_t const * ptr, int32x2_t vec, __constrange(0,1) int lane); \/\/VLD1.32 {d0[0]}, [r0] variable 1231 float16x4_t vld1q_lane_f16(__transfersize(1) __fp16 const * ptr, float16x4_t vec, __constrange(0,3) int lane); \/\/VLD1.16 {d0[0]}, [r0] variable 1232 float32x2_t vld1_lane_f32(__transfersize(1) float32_t const * ptr, float32x2_t vec, __constrange(0,1) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 1233 int64x1_t vld1_lane_s64(__transfersize(1) int64_t const * ptr, int64x1_t vec, __constrange(0,0) int lane); \/\/VLD1.64 {d0}, [r0] variable 1234 poly8x8_t vld1_lane_p8(__transfersize(1) poly8_t const * ptr, poly8x8_t vec, __constrange(0,7) int lane); \/\/VLD1.8 {d0[0]}, [r0] variable 1235 poly16x4_t vld1_lane_p16(__transfersize(1) poly16_t const * ptr, poly16x4_t vec, __constrange(0,3) int lane); \/\/VLD1.16 {d0[0]}, [r0] variable 1395 uint16x8x2_t vld2q_lane_u16_ptr(__transfersize(2) uint16_t const * ptr, uint16x8x2_t * src, __constrange(0,7) int lane); \/\/ VLD2.16 {d0[0], d2[0]}, [r0] variable 1396 uint32x4x2_t vld2q_lane_u32_ptr(__transfersize(2) uint32_t const * ptr, uint32x4x2_t * src, __constrange(0,3) int lane); \/\/ VLD2.32 {d0[0], d2[0]}, [r0] variable 1397 int16x8x2_t vld2q_lane_s16_ptr(__transfersize(2) int16_t const * ptr, int16x8x2_t * src, __constrange(0,7) int lane); \/\/ VLD2.16 {d0[0], d2[0]}, [r0] variable 1398 int32x4x2_t vld2q_lane_s32_ptr(__transfersize(2) int32_t const * ptr, int32x4x2_t * src, __constrange(0,3) int lane); \/\/ VLD2.32 {d0[0], d2[0]}, [r0] variable 1399 float16x8x2_t vld2q_lane_f16_ptr(__transfersize(2) __fp16 const * ptr, float16x8x2_t * src, __constrange(0,7) int lane); \/\/ VLD2.16 {d0[0], d2[0]}, [r0] variable 1400 float32x4x2_t vld2q_lane_f32_ptr(__transfersize(2) float32_t const * ptr, float32x4x2_t * src, __constrange(0,3) int lane); \/\/ VLD2.32 {d0[0], d2[0]}, [r0] variable 1401 poly16x8x2_t vld2q_lane_p16_ptr(__transfersize(2) poly16_t const * ptr, poly16x8x2_t * src, __constrange(0,7) int lane); \/\/ VLD2.16 {d0[0], d2[0]}, [r0] variable 1402 uint8x8x2_t vld2_lane_u8_ptr(__transfersize(2) uint8_t const * ptr, uint8x8x2_t * src, __constrange(0,7) int lane); \/\/VLD2.8 {d0[0], d1[0]}, [r0] variable 1403 uint16x4x2_t vld2_lane_u16_ptr(__transfersize(2) uint16_t const * ptr, uint16x4x2_t * src, __constrange(0,3) int lane); \/\/ VLD2.16 {d0[0], d1[0]}, [r0] variable 1404 uint32x2x2_t vld2_lane_u32_ptr(__transfersize(2) uint32_t const * ptr, uint32x2x2_t * src, __constrange(0,1) int lane); \/\/ VLD2.32 {d0[0], d1[0]}, [r0] variable 1405 int8x8x2_t vld2_lane_s8_ptr(__transfersize(2) int8_t const * ptr, int8x8x2_t * src, __constrange(0,7) int lane); \/\/VLD2.8 {d0[0], d1[0]}, [r0] variable 1406 int16x4x2_t vld2_lane_s16_ptr(__transfersize(2) int16_t const * ptr, int16x4x2_t * src, __constrange(0,3) int lane); \/\/VLD2.16 {d0[0], d1[0]}, [r0] variable 1407 int32x2x2_t vld2_lane_s32_ptr(__transfersize(2) int32_t const * ptr, int32x2x2_t * src, __constrange(0,1) int lane); \/\/VLD2.32 {d0[0], d1[0]}, [r0] variable 1409 float32x2x2_t vld2_lane_f32_ptr(__transfersize(2) float32_t const * ptr, float32x2x2_t * src, __constrange(0,1) int lane); \/\/ VLD2.32 {d0[0], d1[0]}, [r0] variable 1410 poly8x8x2_t vld2_lane_p8_ptr(__transfersize(2) poly8_t const * ptr, poly8x8x2_t * src, __constrange(0,7) int lane); \/\/VLD2.8 {d0[0], d1[0]}, [r0] variable 1411 poly16x4x2_t vld2_lane_p16_ptr(__transfersize(2) poly16_t const * ptr, poly16x4x2_t * src, __constrange(0,3) int lane); \/\/ VLD2.16 {d0[0], d1[0]}, [r0] variable 1412 uint16x8x3_t vld3q_lane_u16_ptr(__transfersize(3) uint16_t const * ptr, uint16x8x3_t * src, __constrange(0,7) int lane); \/\/ VLD3.16 {d0[0], d2[0], d4[0]}, [r0] variable 1413 uint32x4x3_t vld3q_lane_u32_ptr(__transfersize(3) uint32_t const * ptr, uint32x4x3_t * src, __constrange(0,3) int lane); \/\/ VLD3.32 {d0[0], d2[0], d4[0]}, [r0] variable 1414 int16x8x3_t vld3q_lane_s16_ptr(__transfersize(3) int16_t const * ptr, int16x8x3_t * src, __constrange(0,7) int lane); \/\/ VLD3.16 {d0[0], d2[0], d4[0]}, [r0] variable 1415 int32x4x3_t vld3q_lane_s32_ptr(__transfersize(3) int32_t const * ptr, int32x4x3_t * src, __constrange(0,3) int lane); \/\/ VLD3.32 {d0[0], d2[0], d4[0]}, [r0] variable 1416 float16x8x3_t vld3q_lane_f16_ptr(__transfersize(3) __fp16 const * ptr, float16x8x3_t * src, __constrange(0,7) int lane); \/\/ VLD3.16 {d0[0], d2[0], d4[0]}, [r0] variable 1417 float32x4x3_t vld3q_lane_f32_ptr(__transfersize(3) float32_t const * ptr, float32x4x3_t * src, __constrange(0,3) int lane); \/\/ VLD3.32 {d0[0], d2[0], d4[0]}, [r0] variable 1418 poly16x8x3_t vld3q_lane_p16_ptr(__transfersize(3) poly16_t const * ptr, poly16x8x3_t * src, __constrange(0,7) int lane); \/\/ VLD3.16 {d0[0], d2[0], d4[0]}, [r0] variable 1419 uint8x8x3_t vld3_lane_u8_ptr(__transfersize(3) uint8_t const * ptr, uint8x8x3_t * src, __constrange(0,7) int lane); \/\/VLD3.8 {d0[0], d1[0], d2[0]}, [r0] variable 1420 uint16x4x3_t vld3_lane_u16_ptr(__transfersize(3) uint16_t const * ptr, uint16x4x3_t * src, __constrange(0,3) int lane); \/\/ VLD3.16 {d0[0], d1[0], d2[0]}, [r0] variable 1421 uint32x2x3_t vld3_lane_u32_ptr(__transfersize(3) uint32_t const * ptr, uint32x2x3_t * src, __constrange(0,1) int lane); \/\/ VLD3.32 {d0[0], d1[0], d2[0]}, [r0] variable 1422 int8x8x3_t vld3_lane_s8_ptr(__transfersize(3) int8_t const * ptr, int8x8x3_t * src, __constrange(0,7) int lane); \/\/VLD3.8 {d0[0], d1[0], d2[0]}, [r0] variable 1423 int16x4x3_t vld3_lane_s16_ptr(__transfersize(3) int16_t const * ptr, int16x4x3_t * src, __constrange(0,3) int lane); \/\/VLD3.16 {d0[0], d1[0], d2[0]}, [r0] variable 1424 int32x2x3_t vld3_lane_s32_ptr(__transfersize(3) int32_t const * ptr, int32x2x3_t * src, __constrange(0,1) int lane); \/\/VLD3.32 {d0[0], d1[0], d2[0]}, [r0] variable 1425 float16x4x3_t vld3_lane_f16_ptr(__transfersize(3) __fp16 const * ptr, float16x4x3_t * src, __constrange(0,3) int lane); \/\/ VLD3.16 {d0[0], d1[0], d2[0]}, [r0] variable 1426 float32x2x3_t vld3_lane_f32_ptr(__transfersize(3) float32_t const * ptr, float32x2x3_t * src, __constrange(0,1) int lane); \/\/ VLD3.32 {d0[0], d1[0], d2[0]}, [r0] variable 1427 poly8x8x3_t vld3_lane_p8_ptr(__transfersize(3) poly8_t const * ptr, poly8x8x3_t * src, __constrange(0,7) int lane); \/\/VLD3.8 {d0[0], d1[0], d2[0]}, [r0] variable 1428 poly16x4x3_t vld3_lane_p16_ptr(__transfersize(3) poly16_t const * ptr, poly16x4x3_t * src, __constrange(0,3) int lane); \/\/ VLD3.16 {d0[0], d1[0], d2[0]}, [r0] variable 1429 uint16x8x4_t vld4q_lane_u16_ptr(__transfersize(4) uint16_t const * ptr, uint16x8x4_t * src, __constrange(0,7) int lane); \/\/ VLD4.16 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1430 uint32x4x4_t vld4q_lane_u32_ptr(__transfersize(4) uint32_t const * ptr, uint32x4x4_t * src, __constrange(0,3) int lane); \/\/ VLD4.32 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1431 int16x8x4_t vld4q_lane_s16_ptr(__transfersize(4) int16_t const * ptr, int16x8x4_t * src, __constrange(0,7) int lane); \/\/ VLD4.16 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1432 int32x4x4_t vld4q_lane_s32_ptr(__transfersize(4) int32_t const * ptr, int32x4x4_t * src, __constrange(0,3) int lane); \/\/ VLD4.32 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1433 float16x8x4_t vld4q_lane_f16_ptr(__transfersize(4) __fp16 const * ptr, float16x8x4_t * src, __constrange(0,7) int lane); \/\/ VLD4.16 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1434 float32x4x4_t vld4q_lane_f32_ptr(__transfersize(4) float32_t const * ptr, float32x4x4_t * src, __constrange(0,3) int lane); \/\/ VLD4.32 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1435 poly16x8x4_t vld4q_lane_p16_ptr(__transfersize(4) poly16_t const * ptr, poly16x8x4_t * src, __constrange(0,7) int lane); \/\/ VLD4.16 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1436 uint8x8x4_t vld4_lane_u8_ptr(__transfersize(4) uint8_t const * ptr, uint8x8x4_t * src, __constrange(0,7) int lane); \/\/VLD4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1437 uint16x4x4_t vld4_lane_u16_ptr(__transfersize(4) uint16_t const * ptr, uint16x4x4_t * src, __constrange(0,3) int lane); \/\/ VLD4.16 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1438 uint32x2x4_t vld4_lane_u32_ptr(__transfersize(4) uint32_t const * ptr, uint32x2x4_t * src, __constrange(0,1) int lane); \/\/ VLD4.32 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1439 int8x8x4_t vld4_lane_s8_ptr(__transfersize(4) int8_t const * ptr, int8x8x4_t * src, __constrange(0,7) int lane); \/\/VLD4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1440 int16x4x4_t vld4_lane_s16_ptr(__transfersize(4) int16_t const * ptr, int16x4x4_t * src, __constrange(0,3) int lane); \/\/VLD4.16 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1441 int32x2x4_t vld4_lane_s32_ptr(__transfersize(4) int32_t const * ptr, int32x2x4_t * src, __constrange(0,1) int lane); \/\/VLD4.32 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1442 float16x4x4_t vld4_lane_f16_ptr(__transfersize(4) __fp16 const * ptr, float16x4x4_t * src, __constrange(0,3) int lane); \/\/ VLD4.16 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1443 float32x2x4_t vld4_lane_f32_ptr(__transfersize(4) float32_t const * ptr, float32x2x4_t * src, __constrange(0,1) int lane); \/\/ VLD4.32 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1444 poly8x8x4_t vld4_lane_p8_ptr(__transfersize(4) poly8_t const * ptr, poly8x8x4_t * src, __constrange(0,7) int lane); \/\/VLD4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1445 poly16x4x4_t vld4_lane_p16_ptr(__transfersize(4) poly16_t const * ptr, poly16x4x4_t * src, __constrange(0,3) int lane); \/\/ VLD4.16 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1514 void vst2q_lane_u16_ptr(__transfersize(2) uint16_t * ptr, uint16x8x2_t * val, __constrange(0,7) int lane); \/\/ VST2.16{d0[0], d2[0]}, [r0] variable 1515 void vst2q_lane_u32_ptr(__transfersize(2) uint32_t * ptr, uint32x4x2_t * val, __constrange(0,3) int lane); \/\/ VST2.32{d0[0], d2[0]}, [r0] variable 1516 void vst2q_lane_s16_ptr(__transfersize(2) int16_t * ptr, int16x8x2_t * val, __constrange(0,7) int lane); \/\/ VST2.16{d0[0], d2[0]}, [r0] variable 1517 void vst2q_lane_s32_ptr(__transfersize(2) int32_t * ptr, int32x4x2_t * val, __constrange(0,3) int lane); \/\/ VST2.32{d0[0], d2[0]}, [r0] variable 1518 void vst2q_lane_f16_ptr(__transfersize(2) __fp16 * ptr, float16x8x2_t * val, __constrange(0,7) int lane); \/\/ VST2.16{d0[0], d2[0]}, [r0] variable 1519 void vst2q_lane_f32_ptr(__transfersize(2) float32_t * ptr, float32x4x2_t * val, __constrange(0,3) int lane); \/\/VST2.32 {d0[0], d2[0]}, [r0] variable 1520 void vst2q_lane_p16_ptr(__transfersize(2) poly16_t * ptr, poly16x8x2_t * val, __constrange(0,7) int lane); \/\/ VST2.16{d0[0], d2[0]}, [r0] variable 1521 void vst2_lane_u8_ptr(__transfersize(2) uint8_t * ptr, uint8x8x2_t * val, __constrange(0,7) int lane); \/\/ VST2.8{d0[0], d1[0]}, [r0] variable 1522 void vst2_lane_u16_ptr(__transfersize(2) uint16_t * ptr, uint16x4x2_t * val, __constrange(0,3) int lane); \/\/ VST2.16{d0[0], d1[0]}, [r0] variable 1523 void vst2_lane_u32_ptr(__transfersize(2) uint32_t * ptr, uint32x2x2_t * val, __constrange(0,1) int lane); \/\/ VST2.32{d0[0], d1[0]}, [r0] variable 1524 void vst2_lane_s8_ptr(__transfersize(2) int8_t * ptr, int8x8x2_t * val, __constrange(0,7) int lane); \/\/ VST2.8 {d0[0],d1[0]}, [r0] variable 1525 void vst2_lane_s16_ptr(__transfersize(2) int16_t * ptr, int16x4x2_t * val, __constrange(0,3) int lane); \/\/ VST2.16{d0[0], d1[0]}, [r0] variable 1526 void vst2_lane_s32_ptr(__transfersize(2) int32_t * ptr, int32x2x2_t * val, __constrange(0,1) int lane); \/\/ VST2.32{d0[0], d1[0]}, [r0] variable 1527 void vst2_lane_f16_ptr(__transfersize(2) __fp16 * ptr, float16x4x2_t * val, __constrange(0,3) int lane); \/\/ VST2.16{d0[0], d1[0]}, [r0] variable 1528 void vst2_lane_f32_ptr(__transfersize(2) float32_t * ptr, float32x2x2_t * val, __constrange(0,1) int lane); \/\/ VST2.32{d0[0], d1[0]}, [r0] variable 1529 void vst2_lane_p8_ptr(__transfersize(2) poly8_t * ptr, poly8x8x2_t * val, __constrange(0,7) int lane); \/\/ VST2.8{d0[0], d1[0]}, [r0] variable 1530 void vst2_lane_p16_ptr(__transfersize(2) poly16_t * ptr, poly16x4x2_t * val, __constrange(0,3) int lane); \/\/ VST2.16{d0[0], d1[0]}, [r0] variable 1531 void vst3q_lane_u16_ptr(__transfersize(3) uint16_t * ptr, uint16x8x3_t * val, __constrange(0,7) int lane); \/\/ VST3.16{d0[0], d2[0], d4[0]}, [r0] variable 1532 void vst3q_lane_u32_ptr(__transfersize(3) uint32_t * ptr, uint32x4x3_t * val, __constrange(0,3) int lane); \/\/ VST3.32{d0[0], d2[0], d4[0]}, [r0] variable 1533 void vst3q_lane_s16_ptr(__transfersize(3) int16_t * ptr, int16x8x3_t * val, __constrange(0,7) int lane); \/\/ VST3.16{d0[0], d2[0], d4[0]}, [r0] variable 1534 void vst3q_lane_s32_ptr(__transfersize(3) int32_t * ptr, int32x4x3_t * val, __constrange(0,3) int lane); \/\/ VST3.32{d0[0], d2[0], d4[0]}, [r0] variable 1535 void vst3q_lane_f16_ptr(__transfersize(3) __fp16 * ptr, float16x8x3_t * val, __constrange(0,7) int lane); \/\/ VST3.16{d0[0], d2[0], d4[0]}, [r0] variable 1536 void vst3q_lane_f32_ptr(__transfersize(3) float32_t * ptr, float32x4x3_t * val, __constrange(0,3) int lane); \/\/VST3.32 {d0[0], d2[0], d4[0]}, [r0] variable 1537 void vst3q_lane_p16_ptr(__transfersize(3) poly16_t * ptr, poly16x8x3_t * val, __constrange(0,7) int lane); \/\/ VST3.16{d0[0], d2[0], d4[0]}, [r0] variable 1538 void vst3_lane_u8_ptr(__transfersize(3) uint8_t * ptr, uint8x8x3_t * val, __constrange(0,7) int lane); \/\/ VST3.8{d0[0], d1[0], d2[0]}, [r0] variable 1539 void vst3_lane_u16_ptr(__transfersize(3) uint16_t * ptr, uint16x4x3_t * val, __constrange(0,3) int lane); \/\/ VST3.16{d0[0], d1[0], d2[0]}, [r0] variable 1540 void vst3_lane_u32_ptr(__transfersize(3) uint32_t * ptr, uint32x2x3_t * val, __constrange(0,1) int lane); \/\/ VST3.32{d0[0], d1[0], d2[0]}, [r0] variable 1541 void vst3_lane_s8_ptr(__transfersize(3) int8_t * ptr, int8x8x3_t * val, __constrange(0,7) int lane); \/\/ VST3.8 {d0[0],d1[0], d2[0]}, [r0] variable 1542 void vst3_lane_s16_ptr(__transfersize(3) int16_t * ptr, int16x4x3_t * val, __constrange(0,3) int lane); \/\/ VST3.16{d0[0], d1[0], d2[0]}, [r0] variable 1543 void vst3_lane_s32_ptr(__transfersize(3) int32_t * ptr, int32x2x3_t * val, __constrange(0,1) int lane); \/\/ VST3.32{d0[0], d1[0], d2[0]}, [r0] variable 1544 void vst3_lane_f16_ptr(__transfersize(3) __fp16 * ptr, float16x4x3_t * val, __constrange(0,3) int lane); \/\/ VST3.16{d0[0], d1[0], d2[0]}, [r0] variable 1545 void vst3_lane_f32_ptr(__transfersize(3) float32_t * ptr, float32x2x3_t * val, __constrange(0,1) int lane); \/\/ VST3.32{d0[0], d1[0], d2[0]}, [r0] variable 1546 void vst3_lane_p8_ptr(__transfersize(3) poly8_t * ptr, poly8x8x3_t * val, __constrange(0,7) int lane); \/\/ VST3.8{d0[0], d1[0], d2[0]}, [r0] variable 1547 void vst3_lane_p16_ptr(__transfersize(3) poly16_t * ptr, poly16x4x3_t * val, __constrange(0,3) int lane); \/\/ VST3.16{d0[0], d1[0], d2[0]}, [r0] variable 1548 void vst4q_lane_u16_ptr(__transfersize(4) uint16_t * ptr, uint16x8x4_t * val, __constrange(0,7) int lane); \/\/ VST4.16{d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1549 void vst4q_lane_u32_ptr(__transfersize(4) uint32_t * ptr, uint32x4x4_t * val, __constrange(0,3) int lane); \/\/ VST4.32{d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1550 void vst4q_lane_s16_ptr(__transfersize(4) int16_t * ptr, int16x8x4_t * val, __constrange(0,7) int lane); \/\/ VST4.16{d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1551 void vst4q_lane_s32_ptr(__transfersize(4) int32_t * ptr, int32x4x4_t * val, __constrange(0,3) int lane); \/\/ VST4.32{d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1552 void vst4q_lane_f16_ptr(__transfersize(4) __fp16 * ptr, float16x8x4_t * val, __constrange(0,7) int lane); \/\/ VST4.16{d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1553 void vst4q_lane_f32_ptr(__transfersize(4) float32_t * ptr, float32x4x4_t * val, __constrange(0,3) int lane); \/\/VST4.32 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1554 void vst4q_lane_p16_ptr(__transfersize(4) poly16_t * ptr, poly16x8x4_t * val, __constrange(0,7) int lane); \/\/ VST4.16{d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1555 void vst4_lane_u8_ptr(__transfersize(4) uint8_t * ptr, uint8x8x4_t * val, __constrange(0,7) int lane); \/\/ VST4.8{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1556 void vst4_lane_u16_ptr(__transfersize(4) uint16_t * ptr, uint16x4x4_t * val, __constrange(0,3) int lane); \/\/ VST4.16{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1557 void vst4_lane_u32_ptr(__transfersize(4) uint32_t * ptr, uint32x2x4_t * val, __constrange(0,1) int lane); \/\/ VST4.32{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1558 void vst4_lane_s8_ptr(__transfersize(4) int8_t * ptr, int8x8x4_t * val, __constrange(0,7) int lane); \/\/ VST4.8 {d0[0],d1[0], d2[0], d3[0]}, [r0] variable 1559 void vst4_lane_s16_ptr(__transfersize(4) int16_t * ptr, int16x4x4_t * val, __constrange(0,3) int lane); \/\/ VST4.16{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1560 void vst4_lane_s32_ptr(__transfersize(4) int32_t * ptr, int32x2x4_t * val, __constrange(0,1) int lane); \/\/ VST4.32{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1561 void vst4_lane_f16_ptr(__transfersize(4) __fp16 * ptr, float16x4x4_t * val, __constrange(0,3) int lane); \/\/ VST4.16{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1562 void vst4_lane_f32_ptr(__transfersize(4) float32_t * ptr, float32x2x4_t * val, __constrange(0,1) int lane); \/\/ VST4.32{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1563 void vst4_lane_p8_ptr(__transfersize(4) poly8_t * ptr, poly8x8x4_t * val, __constrange(0,7) int lane); \/\/ VST4.8{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1564 void vst4_lane_p16_ptr(__transfersize(4) poly16_t * ptr, poly16x4x4_t * val, __constrange(0,3) int lane); \/\/ VST4.16{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 9281 uint8x16_t vld1q_lane_u8(__transfersize(1) uint8_t const * ptr, uint8x16_t vec, __constrange(0,15) int lane); \/\/ VLD1.8 {d0[0]}, [r0] variable 9284 uint16x8_t vld1q_lane_u16(__transfersize(1) uint16_t const * ptr, uint16x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 9287 uint32x4_t vld1q_lane_u32(__transfersize(1) uint32_t const * ptr, uint32x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 9290 uint64x2_t vld1q_lane_u64(__transfersize(1) uint64_t const * ptr, uint64x2_t vec, __constrange(0,1) int lane); \/\/ VLD1.64 {d0}, [r0] variable 9294 int8x16_t vld1q_lane_s8(__transfersize(1) int8_t const * ptr, int8x16_t vec, __constrange(0,15) int lane); \/\/ VLD1.8 {d0[0]}, [r0] variable 9297 int16x8_t vld1q_lane_s16(__transfersize(1) int16_t const * ptr, int16x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 9300 int32x4_t vld1q_lane_s32(__transfersize(1) int32_t const * ptr, int32x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 9303 float16x8_t vld1q_lane_f16(__transfersize(1) __fp16 const * ptr, float16x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 9306 float32x4_t vld1q_lane_f32(__transfersize(1) float32_t const * ptr, float32x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 9315 int64x2_t vld1q_lane_s64(__transfersize(1) int64_t const * ptr, int64x2_t vec, __constrange(0,1) int lane); \/\/ VLD1.64 {d0}, [r0] variable 9318 poly8x16_t vld1q_lane_p8(__transfersize(1) poly8_t const * ptr, poly8x16_t vec, __constrange(0,15) int lane); \/\/ VLD1.8 {d0[0]}, [r0] variable 9321 poly16x8_t vld1q_lane_p16(__transfersize(1) poly16_t const * ptr, poly16x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 9324 uint8x8_t vld1_lane_u8(__transfersize(1) uint8_t const * ptr, uint8x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.8 {d0[0]}, [r0] variable 9333 uint16x4_t vld1_lane_u16(__transfersize(1) uint16_t const * ptr, uint16x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 9342 uint32x2_t vld1_lane_u32(__transfersize(1) uint32_t const * ptr, uint32x2_t vec, __constrange(0,1) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 9351 uint64x1_t vld1_lane_u64(__transfersize(1) uint64_t const * ptr, uint64x1_t vec, __constrange(0,0) int lane); \/\/ VLD1.64 {d0}, [r0] variable 9360 int8x8_t vld1_lane_s8(__transfersize(1) int8_t const * ptr, int8x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.8 {d0[0]}, [r0] variable 9363 int16x4_t vld1_lane_s16(__transfersize(1) int16_t const * ptr, int16x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 9366 int32x2_t vld1_lane_s32(__transfersize(1) int32_t const * ptr, int32x2_t vec, __constrange(0,1) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 9369 float16x4_t vld1_lane_f16(__transfersize(1) __fp16 const * ptr, float16x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 9372 float32x2_t vld1_lane_f32(__transfersize(1) float32_t const * ptr, float32x2_t vec, __constrange(0,1) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 9381 int64x1_t vld1_lane_s64(__transfersize(1) int64_t const * ptr, int64x1_t vec, __constrange(0,0) int lane); \/\/ VLD1.64 {d0}, [r0] variable 9384 poly8x8_t vld1_lane_p8(__transfersize(1) poly8_t const * ptr, poly8x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.8 {d0[0]}, [r0] variable 9387 poly16x4_t vld1_lane_p16(__transfersize(1) poly16_t const * ptr, poly16x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 9628 void vst1q_lane_u8(__transfersize(1) uint8_t * ptr, uint8x16_t val, __constrange(0,15) int lane); \/\/ VST1.8 {d0[0]}, [r0] variable 9631 void vst1q_lane_u16(__transfersize(1) uint16_t * ptr, uint16x8_t val, __constrange(0,7) int lane); \/\/ VST1.16 {d0[0]}, [r0] variable 9634 void vst1q_lane_u32(__transfersize(1) uint32_t * ptr, uint32x4_t val, __constrange(0,3) int lane); \/\/ VST1.32 {d0[0]}, [r0] variable 9637 void vst1q_lane_u64(__transfersize(1) uint64_t * ptr, uint64x2_t val, __constrange(0,1) int lane); \/\/ VST1.64 {d0}, [r0] variable 9640 void vst1q_lane_s8(__transfersize(1) int8_t * ptr, int8x16_t val, __constrange(0,15) int lane); \/\/ VST1.8 {d0[0]}, [r0] variable 9643 void vst1q_lane_s16(__transfersize(1) int16_t * ptr, int16x8_t val, __constrange(0,7) int lane); \/\/ VST1.16 {d0[0]}, [r0] variable 9646 void vst1q_lane_s32(__transfersize(1) int32_t * ptr, int32x4_t val, __constrange(0,3) int lane); \/\/ VST1.32 {d0[0]}, [r0] variable 9649 void vst1q_lane_s64(__transfersize(1) int64_t * ptr, int64x2_t val, __constrange(0,1) int lane); \/\/ VST1.64 {d0}, [r0] variable 9652 void vst1q_lane_f16(__transfersize(1) __fp16 * ptr, float16x8_t val, __constrange(0,7) int lane); \/\/ VST1.16 {d0[0]}, [r0] variable 9655 void vst1q_lane_f32(__transfersize(1) float32_t * ptr, float32x4_t val, __constrange(0,3) int lane); \/\/ VST1.32 {d0[0]}, [r0] variable 9663 void vst1q_lane_p8(__transfersize(1) poly8_t * ptr, poly8x16_t val, __constrange(0,15) int lane); \/\/ VST1.8 {d0[0]}, [r0] variable 9666 void vst1q_lane_p16(__transfersize(1) poly16_t * ptr, poly16x8_t val, __constrange(0,7) int lane); \/\/ VST1.16 {d0[0]}, [r0] variable 9669 void vst1_lane_u8(__transfersize(1) uint8_t * ptr, uint8x8_t val, __constrange(0,7) int lane); \/\/ VST1.8 {d0[0]}, [r0] variable 9675 void vst1_lane_u16(__transfersize(1) uint16_t * ptr, uint16x4_t val, __constrange(0,3) int lane); \/\/ VST1.16 {d0[0]}, [r0] variable 9681 void vst1_lane_u32(__transfersize(1) uint32_t * ptr, uint32x2_t val, __constrange(0,1) int lane); \/\/ VST1.32 {d0[0]}, [r0] variable 9687 void vst1_lane_u64(__transfersize(1) uint64_t * ptr, uint64x1_t val, __constrange(0,0) int lane); \/\/ VST1.64 {d0}, [r0] variable 9693 void vst1_lane_s8(__transfersize(1) int8_t * ptr, int8x8_t val, __constrange(0,7) int lane); \/\/ VST1.8 {d0[0]}, [r0] variable 9696 void vst1_lane_s16(__transfersize(1) int16_t * ptr, int16x4_t val, __constrange(0,3) int lane); \/\/ VST1.16 {d0[0]}, [r0] variable 9699 void vst1_lane_s32(__transfersize(1) int32_t * ptr, int32x2_t val, __constrange(0,1) int lane); \/\/ VST1.32 {d0[0]}, [r0] variable 9703 void vst1_lane_s64(__transfersize(1) int64_t * ptr, int64x1_t val, __constrange(0,0) int lane); \/\/ VST1.64 {d0}, [r0] variable 9707 void vst1_lane_f16(__transfersize(1) __fp16 * ptr, float16x4_t val, __constrange(0,3) int lane); \/\/ VST1.16 {d0[0]}, [r0] variable 9710 void vst1_lane_f32(__transfersize(1) float32_t * ptr, float32x2_t val, __constrange(0,1) int lane); \/\/ VST1.32 {d0[0]}, [r0] variable 9716 void vst1_lane_p8(__transfersize(1) poly8_t * ptr, poly8x8_t val, __constrange(0,7) int lane); \/\/ VST1.8 {d0[0]}, [r0] variable 9719 void vst1_lane_p16(__transfersize(1) poly16_t * ptr, poly16x4_t val, __constrange(0,3) int lane); \/\/ VST1.16 {d0[0]}, [r0] variable 10736 int8x8x2_t vld2_lane_s8_ptr(__transfersize(2) int8_t const * ptr, int8x8x2_t * src, __constrange(0,7) int lane); \/\/ VLD2.8 {d0[0], d1[0]}, [r0] variable 10740 int16x4x2_t vld2_lane_s16_ptr(__transfersize(2) int16_t const * ptr, int16x4x2_t * src, __constrange(0,3) int lane); \/\/ VLD2.16 {d0[0], d1[0]}, [r0] variable 10744 int32x2x2_t vld2_lane_s32_ptr(__transfersize(2) int32_t const * ptr, int32x2x2_t * src, __constrange(0,1) int lane); \/\/ VLD2.32 {d0[0], d1[0]}, [r0] variable 10750 float32x2x2_t vld2_lane_f32_ptr(__transfersize(2) float32_t const * ptr, float32x2x2_t * src,__constrange(0,1) int lane); \/\/ VLD2.32 {d0[0], d1[0]}, [r0] variable 10761 poly8x8x2_t vld2_lane_p8_ptr(__transfersize(2) poly8_t const * ptr, poly8x8x2_t * src, __constrange(0,7) int lane); \/\/ VLD2.8 {d0[0], d1[0]}, [r0] variable 10765 poly16x4x2_t vld2_lane_p16_ptr(__transfersize(2) poly16_t const * ptr, poly16x4x2_t * src, __constrange(0,3) int lane); \/\/ VLD2.16 {d0[0], d1[0]}, [r0] variable 10817 float16x8x3_t vld3q_lane_f16_ptr(__transfersize(3) __fp16 const * ptr, float16x8x3_t * src, __constrange(0,7) int lane); \/\/ VLD3.16 {d0[0], d2[0], d4[0]}, [r0] variable 10833 poly16x8x3_t vld3q_lane_p16_ptr(__transfersize(3) poly16_t const * ptr, poly16x8x3_t * src,__constrange(0,7) int lane); \/\/ VLD3.16 {d0[0], d2[0], d4[0]}, [r0] variable 10870 int8x8x3_t vld3_lane_s8_ptr(__transfersize(3) int8_t const * ptr, int8x8x3_t * src, __constrange(0,7) int lane); \/\/ VLD3.8 {d0[0], d1[0], d2[0]}, [r0] variable 10873 int16x4x3_t vld3_lane_s16_ptr(__transfersize(3) int16_t const * ptr, int16x4x3_t * src, __constrange(0,3) int lane); \/\/ VLD3.16 {d0[0], d1[0], d2[0]}, [r0] variable 10876 int32x2x3_t vld3_lane_s32_ptr(__transfersize(3) int32_t const * ptr, int32x2x3_t * src, __constrange(0,1) int lane); \/\/ VLD3.32 {d0[0], d1[0], d2[0]}, [r0] variable 10879 float16x4x3_t vld3_lane_f16_ptr(__transfersize(3) __fp16 const * ptr, float16x4x3_t * src, __constrange(0,3) int lane); \/\/ VLD3.16 {d0[0], d1[0], d2[0]}, [r0] variable 10929 int16x8x4_t vld4q_lane_s16_ptr(__transfersize(4) int16_t const * ptr, int16x8x4_t * src, __constrange(0,7) int lane); \/\/ VLD4.16 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 10933 int32x4x4_t vld4q_lane_s32_ptr(__transfersize(4) int32_t const * ptr, int32x4x4_t * src, __constrange(0,3) int lane); \/\/ VLD4.32 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 10937 float16x8x4_t vld4q_lane_f16_ptr(__transfersize(4) __fp16 const * ptr, float16x8x4_t * src, __constrange(0,7) int lane); \/\/ VLD4.16 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 10953 poly16x8x4_t vld4q_lane_p16_ptr(__transfersize(4) poly16_t const * ptr, poly16x8x4_t * src,__constrange(0,7) int lane); \/\/ VLD4.16 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 10993 int8x8x4_t vld4_lane_s8_ptr(__transfersize(4) int8_t const * ptr, int8x8x4_t * src, __constrange(0,7) int lane); variable 10997 int16x4x4_t vld4_lane_s16_ptr(__transfersize(4) int16_t const * ptr, int16x4x4_t * src, __constrange(0,3) int lane); variable 11001 int32x2x4_t vld4_lane_s32_ptr(__transfersize(4) int32_t const * ptr, int32x2x4_t * src, __constrange(0,1) int lane); variable 11005 float16x4x4_t vld4_lane_f16_ptr(__transfersize(4) __fp16 const * ptr, float16x4x4_t * src, __constrange(0,3) int lane); variable 11022 poly8x8x4_t vld4_lane_p8_ptr(__transfersize(4) poly8_t const * ptr, poly8x8x4_t * src, __constrange(0,7) int lane); variable 11026 poly16x4x4_t vld4_lane_p16_ptr(__transfersize(4) poly16_t const * ptr, poly16x4x4_t * src, __constrange(0,3) int lane); variable 11621 void vst2q_lane_s16_ptr(__transfersize(2) int16_t * ptr, int16x8x2_t * val, __constrange(0,7) int lane); variable 11625 void vst2q_lane_s32_ptr(__transfersize(2) int32_t * ptr, int32x4x2_t * val, __constrange(0,3) int lane); variable 11629 void vst2q_lane_f16_ptr(__transfersize(2) __fp16 * ptr, float16x8x2_t * val, __constrange(0,7) int lane); variable 11641 void vst2q_lane_p16_ptr(__transfersize(2) poly16_t * ptr, poly16x8x2_t * val, __constrange(0,7) int lane); variable 11645 void vst2_lane_u8_ptr(__transfersize(2) uint8_t * ptr, uint8x8x2_t * val, __constrange(0,7) int lane); \/\/ VST2.8 {d0[0], d1[0]}, [r0] variable 11654 void vst2_lane_u16_ptr(__transfersize(2) uint16_t * ptr, uint16x4x2_t * val, __constrange(0,3) int lane); \/\/ VST2.16 {d0[0], d1[0]}, [r0] variable 11663 void vst2_lane_u32_ptr(__transfersize(2) uint32_t * ptr, uint32x2x2_t * val, __constrange(0,1) int lane); \/\/ VST2.32 {d0[0], d1[0]}, [r0] variable 11672 void vst2_lane_s8_ptr(__transfersize(2) int8_t * ptr, int8x8x2_t * val, __constrange(0,7) int lane); variable 11676 void vst2_lane_s16_ptr(__transfersize(2) int16_t * ptr, int16x4x2_t * val, __constrange(0,3) int lane); variable 11680 void vst2_lane_s32_ptr(__transfersize(2) int32_t * ptr, int32x2x2_t * val, __constrange(0,1) int lane); variable 11686 void vst2_lane_f32_ptr(__transfersize(2) float32_t * ptr, float32x2x2_t * val, __constrange(0,1) int lane); \/\/ VST2.32 {d0[0], d1[0]}, [r0] variable 11719 void vst3q_lane_s16_ptr(__transfersize(3) int16_t * ptr, int16x8x3_t * val, __constrange(0,7) int lane); variable 11723 void vst3q_lane_s32_ptr(__transfersize(3) int32_t * ptr, int32x4x3_t * val, __constrange(0,3) int lane); variable 11727 void vst3q_lane_f16_ptr(__transfersize(3) __fp16 * ptr, float16x8x3_t * val, __constrange(0,7) int lane); variable 11740 void vst3q_lane_p16_ptr(__transfersize(3) poly16_t * ptr, poly16x8x3_t * val, __constrange(0,7) int lane); variable 11771 void vst3_lane_s8_ptr(__transfersize(3) int8_t * ptr, int8x8x3_t * val, __constrange(0,7) int lane); variable 11775 void vst3_lane_s16_ptr(__transfersize(3) int16_t * ptr, int16x4x3_t * val, __constrange(0,3) int lane); variable 11779 void vst3_lane_s32_ptr(__transfersize(3) int32_t * ptr, int32x2x3_t * val, __constrange(0,1) int lane); variable 11783 void vst3_lane_f16_ptr(__transfersize(3) __fp16 * ptr, float16x4x3_t * val, __constrange(0,3) int lane); variable 11787 void vst3_lane_f32_ptr(__transfersize(3) float32_t * ptr, float32x2x3_t * val, __constrange(0,1) int lane); variable 11797 void vst3_lane_p8_ptr(__transfersize(3) poly8_t * ptr, poly8x8x3_t * val, __constrange(0,7) int lane); variable 11801 void vst3_lane_p16_ptr(__transfersize(3) poly16_t * ptr, poly16x4x3_t * val, __constrange(0,3) int lane); variable 11823 void vst4q_lane_s16_ptr(__transfersize(4) int16_t * ptr, int16x8x4_t * val, __constrange(0,7) int lane); variable 11827 void vst4q_lane_s32_ptr(__transfersize(4) int32_t * ptr, int32x4x4_t * val, __constrange(0,3) int lane); variable 11831 void vst4q_lane_f16_ptr(__transfersize(4) __fp16 * ptr, float16x8x4_t * val, __constrange(0,7) int lane); variable 11845 void vst4q_lane_p16_ptr(__transfersize(4) poly16_t * ptr, poly16x8x4_t * val, __constrange(0,7) int lane); variable 11888 void vst4_lane_f16_ptr(__transfersize(4) __fp16 * ptr, float16x4x4_t * val, __constrange(0,3) int lane); variable 11891 void vst4_lane_f32_ptr(__transfersize(4) float32_t * ptr, float32x2x4_t * val, __constrange(0,1) int lane); \/\/ VST4.32 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 11902 void vst4_lane_p8_ptr(__transfersize(4) poly8_t * ptr, poly8x8x4_t * val, __constrange(0,7) int lane); variable 11906 void vst4_lane_p16_ptr(__transfersize(4) poly16_t * ptr, poly16x4x4_t * val, __constrange(0,3) int lane); variable [all...] |
/prebuilts/gcc/linux-x86/x86/x86_64-linux-android-4.9/lib/gcc/x86_64-linux-android/4.9/include/ |
arm_neon.h | 417 //Vector add: vadd -> Vr[i]:=Va[i]+Vb[i], Vr, Va, Vb have equal lane sizes. 436 //Vector long add: vaddl -> Vr[i]:=Va[i]+Vb[i], Va, Vb have equal lane sizes, result is a 128 bit vector of lanes that are twice the width. 525 //multiply lane 1214 uint8x16_t vld1q_lane_u8(__transfersize(1) uint8_t const * ptr, uint8x16_t vec, __constrange(0,15) int lane); \/\/VLD1.8 {d0[0]}, [r0] variable 1215 uint16x8_t vld1q_lane_u16(__transfersize(1) uint16_t const * ptr, uint16x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 1216 uint32x4_t vld1q_lane_u32(__transfersize(1) uint32_t const * ptr, uint32x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 1217 uint64x2_t vld1q_lane_u64(__transfersize(1) uint64_t const * ptr, uint64x2_t vec, __constrange(0,1) int lane); \/\/ VLD1.64 {d0}, [r0] variable 1218 int8x16_t vld1q_lane_s8(__transfersize(1) int8_t const * ptr, int8x16_t vec, __constrange(0,15) int lane); \/\/VLD1.8 {d0[0]}, [r0] variable 1219 int16x8_t vld1q_lane_s16(__transfersize(1) int16_t const * ptr, int16x8_t vec, __constrange(0,7) int lane); \/\/VLD1.16 {d0[0]}, [r0] variable 1220 int32x4_t vld1q_lane_s32(__transfersize(1) int32_t const * ptr, int32x4_t vec, __constrange(0,3) int lane); \/\/VLD1.32 {d0[0]}, [r0] variable 1221 float16x8_t vld1q_lane_f16(__transfersize(1) __fp16 const * ptr, float16x8_t vec, __constrange(0,7) int lane); \/\/VLD1.16 {d0[0]}, [r0] variable 1222 float32x4_t vld1q_lane_f32(__transfersize(1) float32_t const * ptr, float32x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 1223 int64x2_t vld1q_lane_s64(__transfersize(1) int64_t const * ptr, int64x2_t vec, __constrange(0,1) int lane); \/\/VLD1.64 {d0}, [r0] variable 1224 poly8x16_t vld1q_lane_p8(__transfersize(1) poly8_t const * ptr, poly8x16_t vec, __constrange(0,15) int lane); \/\/VLD1.8 {d0[0]}, [r0] variable 1225 poly16x8_t vld1q_lane_p16(__transfersize(1) poly16_t const * ptr, poly16x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 1226 uint8x8_t vld1_lane_u8(__transfersize(1) uint8_t const * ptr, uint8x8_t vec, __constrange(0,7) int lane); \/\/VLD1.8 {d0[0]}, [r0] variable 1227 uint16x4_t vld1_lane_u16(__transfersize(1) uint16_t const * ptr, uint16x4_t vec, __constrange(0,3) int lane); \/\/VLD1.16 {d0[0]}, [r0] variable 1228 uint32x2_t vld1_lane_u32(__transfersize(1) uint32_t const * ptr, uint32x2_t vec, __constrange(0,1) int lane); \/\/VLD1.32 {d0[0]}, [r0] variable 1229 uint64x1_t vld1_lane_u64(__transfersize(1) uint64_t const * ptr, uint64x1_t vec, __constrange(0,0) int lane); \/\/VLD1.64 {d0}, [r0] variable 1230 int8x8_t vld1_lane_s8(__transfersize(1) int8_t const * ptr, int8x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.8{d0[0]}, [r0] variable 1231 int16x4_t vld1_lane_s16(__transfersize(1) int16_t const * ptr, int16x4_t vec, __constrange(0,3) int lane); \/\/VLD1.16 {d0[0]}, [r0] variable 1232 int32x2_t vld1_lane_s32(__transfersize(1) int32_t const * ptr, int32x2_t vec, __constrange(0,1) int lane); \/\/VLD1.32 {d0[0]}, [r0] variable 1233 float16x4_t vld1q_lane_f16(__transfersize(1) __fp16 const * ptr, float16x4_t vec, __constrange(0,3) int lane); \/\/VLD1.16 {d0[0]}, [r0] variable 1234 float32x2_t vld1_lane_f32(__transfersize(1) float32_t const * ptr, float32x2_t vec, __constrange(0,1) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 1235 int64x1_t vld1_lane_s64(__transfersize(1) int64_t const * ptr, int64x1_t vec, __constrange(0,0) int lane); \/\/VLD1.64 {d0}, [r0] variable 1236 poly8x8_t vld1_lane_p8(__transfersize(1) poly8_t const * ptr, poly8x8_t vec, __constrange(0,7) int lane); \/\/VLD1.8 {d0[0]}, [r0] variable 1237 poly16x4_t vld1_lane_p16(__transfersize(1) poly16_t const * ptr, poly16x4_t vec, __constrange(0,3) int lane); \/\/VLD1.16 {d0[0]}, [r0] variable 1397 uint16x8x2_t vld2q_lane_u16_ptr(__transfersize(2) uint16_t const * ptr, uint16x8x2_t * src, __constrange(0,7) int lane); \/\/ VLD2.16 {d0[0], d2[0]}, [r0] variable 1398 uint32x4x2_t vld2q_lane_u32_ptr(__transfersize(2) uint32_t const * ptr, uint32x4x2_t * src, __constrange(0,3) int lane); \/\/ VLD2.32 {d0[0], d2[0]}, [r0] variable 1399 int16x8x2_t vld2q_lane_s16_ptr(__transfersize(2) int16_t const * ptr, int16x8x2_t * src, __constrange(0,7) int lane); \/\/ VLD2.16 {d0[0], d2[0]}, [r0] variable 1400 int32x4x2_t vld2q_lane_s32_ptr(__transfersize(2) int32_t const * ptr, int32x4x2_t * src, __constrange(0,3) int lane); \/\/ VLD2.32 {d0[0], d2[0]}, [r0] variable 1401 float16x8x2_t vld2q_lane_f16_ptr(__transfersize(2) __fp16 const * ptr, float16x8x2_t * src, __constrange(0,7) int lane); \/\/ VLD2.16 {d0[0], d2[0]}, [r0] variable 1402 float32x4x2_t vld2q_lane_f32_ptr(__transfersize(2) float32_t const * ptr, float32x4x2_t * src, __constrange(0,3) int lane); \/\/ VLD2.32 {d0[0], d2[0]}, [r0] variable 1403 poly16x8x2_t vld2q_lane_p16_ptr(__transfersize(2) poly16_t const * ptr, poly16x8x2_t * src, __constrange(0,7) int lane); \/\/ VLD2.16 {d0[0], d2[0]}, [r0] variable 1404 uint8x8x2_t vld2_lane_u8_ptr(__transfersize(2) uint8_t const * ptr, uint8x8x2_t * src, __constrange(0,7) int lane); \/\/VLD2.8 {d0[0], d1[0]}, [r0] variable 1405 uint16x4x2_t vld2_lane_u16_ptr(__transfersize(2) uint16_t const * ptr, uint16x4x2_t * src, __constrange(0,3) int lane); \/\/ VLD2.16 {d0[0], d1[0]}, [r0] variable 1406 uint32x2x2_t vld2_lane_u32_ptr(__transfersize(2) uint32_t const * ptr, uint32x2x2_t * src, __constrange(0,1) int lane); \/\/ VLD2.32 {d0[0], d1[0]}, [r0] variable 1407 int8x8x2_t vld2_lane_s8_ptr(__transfersize(2) int8_t const * ptr, int8x8x2_t * src, __constrange(0,7) int lane); \/\/VLD2.8 {d0[0], d1[0]}, [r0] variable 1408 int16x4x2_t vld2_lane_s16_ptr(__transfersize(2) int16_t const * ptr, int16x4x2_t * src, __constrange(0,3) int lane); \/\/VLD2.16 {d0[0], d1[0]}, [r0] variable 1409 int32x2x2_t vld2_lane_s32_ptr(__transfersize(2) int32_t const * ptr, int32x2x2_t * src, __constrange(0,1) int lane); \/\/VLD2.32 {d0[0], d1[0]}, [r0] variable 1411 float32x2x2_t vld2_lane_f32_ptr(__transfersize(2) float32_t const * ptr, float32x2x2_t * src, __constrange(0,1) int lane); \/\/ VLD2.32 {d0[0], d1[0]}, [r0] variable 1412 poly8x8x2_t vld2_lane_p8_ptr(__transfersize(2) poly8_t const * ptr, poly8x8x2_t * src, __constrange(0,7) int lane); \/\/VLD2.8 {d0[0], d1[0]}, [r0] variable 1413 poly16x4x2_t vld2_lane_p16_ptr(__transfersize(2) poly16_t const * ptr, poly16x4x2_t * src, __constrange(0,3) int lane); \/\/ VLD2.16 {d0[0], d1[0]}, [r0] variable 1414 uint16x8x3_t vld3q_lane_u16_ptr(__transfersize(3) uint16_t const * ptr, uint16x8x3_t * src, __constrange(0,7) int lane); \/\/ VLD3.16 {d0[0], d2[0], d4[0]}, [r0] variable 1415 uint32x4x3_t vld3q_lane_u32_ptr(__transfersize(3) uint32_t const * ptr, uint32x4x3_t * src, __constrange(0,3) int lane); \/\/ VLD3.32 {d0[0], d2[0], d4[0]}, [r0] variable 1416 int16x8x3_t vld3q_lane_s16_ptr(__transfersize(3) int16_t const * ptr, int16x8x3_t * src, __constrange(0,7) int lane); \/\/ VLD3.16 {d0[0], d2[0], d4[0]}, [r0] variable 1417 int32x4x3_t vld3q_lane_s32_ptr(__transfersize(3) int32_t const * ptr, int32x4x3_t * src, __constrange(0,3) int lane); \/\/ VLD3.32 {d0[0], d2[0], d4[0]}, [r0] variable 1418 float16x8x3_t vld3q_lane_f16_ptr(__transfersize(3) __fp16 const * ptr, float16x8x3_t * src, __constrange(0,7) int lane); \/\/ VLD3.16 {d0[0], d2[0], d4[0]}, [r0] variable 1419 float32x4x3_t vld3q_lane_f32_ptr(__transfersize(3) float32_t const * ptr, float32x4x3_t * src, __constrange(0,3) int lane); \/\/ VLD3.32 {d0[0], d2[0], d4[0]}, [r0] variable 1420 poly16x8x3_t vld3q_lane_p16_ptr(__transfersize(3) poly16_t const * ptr, poly16x8x3_t * src, __constrange(0,7) int lane); \/\/ VLD3.16 {d0[0], d2[0], d4[0]}, [r0] variable 1421 uint8x8x3_t vld3_lane_u8_ptr(__transfersize(3) uint8_t const * ptr, uint8x8x3_t * src, __constrange(0,7) int lane); \/\/VLD3.8 {d0[0], d1[0], d2[0]}, [r0] variable 1422 uint16x4x3_t vld3_lane_u16_ptr(__transfersize(3) uint16_t const * ptr, uint16x4x3_t * src, __constrange(0,3) int lane); \/\/ VLD3.16 {d0[0], d1[0], d2[0]}, [r0] variable 1423 uint32x2x3_t vld3_lane_u32_ptr(__transfersize(3) uint32_t const * ptr, uint32x2x3_t * src, __constrange(0,1) int lane); \/\/ VLD3.32 {d0[0], d1[0], d2[0]}, [r0] variable 1424 int8x8x3_t vld3_lane_s8_ptr(__transfersize(3) int8_t const * ptr, int8x8x3_t * src, __constrange(0,7) int lane); \/\/VLD3.8 {d0[0], d1[0], d2[0]}, [r0] variable 1425 int16x4x3_t vld3_lane_s16_ptr(__transfersize(3) int16_t const * ptr, int16x4x3_t * src, __constrange(0,3) int lane); \/\/VLD3.16 {d0[0], d1[0], d2[0]}, [r0] variable 1426 int32x2x3_t vld3_lane_s32_ptr(__transfersize(3) int32_t const * ptr, int32x2x3_t * src, __constrange(0,1) int lane); \/\/VLD3.32 {d0[0], d1[0], d2[0]}, [r0] variable 1427 float16x4x3_t vld3_lane_f16_ptr(__transfersize(3) __fp16 const * ptr, float16x4x3_t * src, __constrange(0,3) int lane); \/\/ VLD3.16 {d0[0], d1[0], d2[0]}, [r0] variable 1428 float32x2x3_t vld3_lane_f32_ptr(__transfersize(3) float32_t const * ptr, float32x2x3_t * src, __constrange(0,1) int lane); \/\/ VLD3.32 {d0[0], d1[0], d2[0]}, [r0] variable 1429 poly8x8x3_t vld3_lane_p8_ptr(__transfersize(3) poly8_t const * ptr, poly8x8x3_t * src, __constrange(0,7) int lane); \/\/VLD3.8 {d0[0], d1[0], d2[0]}, [r0] variable 1430 poly16x4x3_t vld3_lane_p16_ptr(__transfersize(3) poly16_t const * ptr, poly16x4x3_t * src, __constrange(0,3) int lane); \/\/ VLD3.16 {d0[0], d1[0], d2[0]}, [r0] variable 1431 uint16x8x4_t vld4q_lane_u16_ptr(__transfersize(4) uint16_t const * ptr, uint16x8x4_t * src, __constrange(0,7) int lane); \/\/ VLD4.16 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1432 uint32x4x4_t vld4q_lane_u32_ptr(__transfersize(4) uint32_t const * ptr, uint32x4x4_t * src, __constrange(0,3) int lane); \/\/ VLD4.32 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1433 int16x8x4_t vld4q_lane_s16_ptr(__transfersize(4) int16_t const * ptr, int16x8x4_t * src, __constrange(0,7) int lane); \/\/ VLD4.16 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1434 int32x4x4_t vld4q_lane_s32_ptr(__transfersize(4) int32_t const * ptr, int32x4x4_t * src, __constrange(0,3) int lane); \/\/ VLD4.32 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1435 float16x8x4_t vld4q_lane_f16_ptr(__transfersize(4) __fp16 const * ptr, float16x8x4_t * src, __constrange(0,7) int lane); \/\/ VLD4.16 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1436 float32x4x4_t vld4q_lane_f32_ptr(__transfersize(4) float32_t const * ptr, float32x4x4_t * src, __constrange(0,3) int lane); \/\/ VLD4.32 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1437 poly16x8x4_t vld4q_lane_p16_ptr(__transfersize(4) poly16_t const * ptr, poly16x8x4_t * src, __constrange(0,7) int lane); \/\/ VLD4.16 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1438 uint8x8x4_t vld4_lane_u8_ptr(__transfersize(4) uint8_t const * ptr, uint8x8x4_t * src, __constrange(0,7) int lane); \/\/VLD4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1439 uint16x4x4_t vld4_lane_u16_ptr(__transfersize(4) uint16_t const * ptr, uint16x4x4_t * src, __constrange(0,3) int lane); \/\/ VLD4.16 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1440 uint32x2x4_t vld4_lane_u32_ptr(__transfersize(4) uint32_t const * ptr, uint32x2x4_t * src, __constrange(0,1) int lane); \/\/ VLD4.32 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1441 int8x8x4_t vld4_lane_s8_ptr(__transfersize(4) int8_t const * ptr, int8x8x4_t * src, __constrange(0,7) int lane); \/\/VLD4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1442 int16x4x4_t vld4_lane_s16_ptr(__transfersize(4) int16_t const * ptr, int16x4x4_t * src, __constrange(0,3) int lane); \/\/VLD4.16 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1443 int32x2x4_t vld4_lane_s32_ptr(__transfersize(4) int32_t const * ptr, int32x2x4_t * src, __constrange(0,1) int lane); \/\/VLD4.32 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1444 float16x4x4_t vld4_lane_f16_ptr(__transfersize(4) __fp16 const * ptr, float16x4x4_t * src, __constrange(0,3) int lane); \/\/ VLD4.16 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1445 float32x2x4_t vld4_lane_f32_ptr(__transfersize(4) float32_t const * ptr, float32x2x4_t * src, __constrange(0,1) int lane); \/\/ VLD4.32 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1446 poly8x8x4_t vld4_lane_p8_ptr(__transfersize(4) poly8_t const * ptr, poly8x8x4_t * src, __constrange(0,7) int lane); \/\/VLD4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1447 poly16x4x4_t vld4_lane_p16_ptr(__transfersize(4) poly16_t const * ptr, poly16x4x4_t * src, __constrange(0,3) int lane); \/\/ VLD4.16 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1516 void vst2q_lane_u16_ptr(__transfersize(2) uint16_t * ptr, uint16x8x2_t * val, __constrange(0,7) int lane); \/\/ VST2.16{d0[0], d2[0]}, [r0] variable 1517 void vst2q_lane_u32_ptr(__transfersize(2) uint32_t * ptr, uint32x4x2_t * val, __constrange(0,3) int lane); \/\/ VST2.32{d0[0], d2[0]}, [r0] variable 1518 void vst2q_lane_s16_ptr(__transfersize(2) int16_t * ptr, int16x8x2_t * val, __constrange(0,7) int lane); \/\/ VST2.16{d0[0], d2[0]}, [r0] variable 1519 void vst2q_lane_s32_ptr(__transfersize(2) int32_t * ptr, int32x4x2_t * val, __constrange(0,3) int lane); \/\/ VST2.32{d0[0], d2[0]}, [r0] variable 1520 void vst2q_lane_f16_ptr(__transfersize(2) __fp16 * ptr, float16x8x2_t * val, __constrange(0,7) int lane); \/\/ VST2.16{d0[0], d2[0]}, [r0] variable 1521 void vst2q_lane_f32_ptr(__transfersize(2) float32_t * ptr, float32x4x2_t * val, __constrange(0,3) int lane); \/\/VST2.32 {d0[0], d2[0]}, [r0] variable 1522 void vst2q_lane_p16_ptr(__transfersize(2) poly16_t * ptr, poly16x8x2_t * val, __constrange(0,7) int lane); \/\/ VST2.16{d0[0], d2[0]}, [r0] variable 1523 void vst2_lane_u8_ptr(__transfersize(2) uint8_t * ptr, uint8x8x2_t * val, __constrange(0,7) int lane); \/\/ VST2.8{d0[0], d1[0]}, [r0] variable 1524 void vst2_lane_u16_ptr(__transfersize(2) uint16_t * ptr, uint16x4x2_t * val, __constrange(0,3) int lane); \/\/ VST2.16{d0[0], d1[0]}, [r0] variable 1525 void vst2_lane_u32_ptr(__transfersize(2) uint32_t * ptr, uint32x2x2_t * val, __constrange(0,1) int lane); \/\/ VST2.32{d0[0], d1[0]}, [r0] variable 1526 void vst2_lane_s8_ptr(__transfersize(2) int8_t * ptr, int8x8x2_t * val, __constrange(0,7) int lane); \/\/ VST2.8 {d0[0],d1[0]}, [r0] variable 1527 void vst2_lane_s16_ptr(__transfersize(2) int16_t * ptr, int16x4x2_t * val, __constrange(0,3) int lane); \/\/ VST2.16{d0[0], d1[0]}, [r0] variable 1528 void vst2_lane_s32_ptr(__transfersize(2) int32_t * ptr, int32x2x2_t * val, __constrange(0,1) int lane); \/\/ VST2.32{d0[0], d1[0]}, [r0] variable 1529 void vst2_lane_f16_ptr(__transfersize(2) __fp16 * ptr, float16x4x2_t * val, __constrange(0,3) int lane); \/\/ VST2.16{d0[0], d1[0]}, [r0] variable 1530 void vst2_lane_f32_ptr(__transfersize(2) float32_t * ptr, float32x2x2_t * val, __constrange(0,1) int lane); \/\/ VST2.32{d0[0], d1[0]}, [r0] variable 1531 void vst2_lane_p8_ptr(__transfersize(2) poly8_t * ptr, poly8x8x2_t * val, __constrange(0,7) int lane); \/\/ VST2.8{d0[0], d1[0]}, [r0] variable 1532 void vst2_lane_p16_ptr(__transfersize(2) poly16_t * ptr, poly16x4x2_t * val, __constrange(0,3) int lane); \/\/ VST2.16{d0[0], d1[0]}, [r0] variable 1533 void vst3q_lane_u16_ptr(__transfersize(3) uint16_t * ptr, uint16x8x3_t * val, __constrange(0,7) int lane); \/\/ VST3.16{d0[0], d2[0], d4[0]}, [r0] variable 1534 void vst3q_lane_u32_ptr(__transfersize(3) uint32_t * ptr, uint32x4x3_t * val, __constrange(0,3) int lane); \/\/ VST3.32{d0[0], d2[0], d4[0]}, [r0] variable 1535 void vst3q_lane_s16_ptr(__transfersize(3) int16_t * ptr, int16x8x3_t * val, __constrange(0,7) int lane); \/\/ VST3.16{d0[0], d2[0], d4[0]}, [r0] variable 1536 void vst3q_lane_s32_ptr(__transfersize(3) int32_t * ptr, int32x4x3_t * val, __constrange(0,3) int lane); \/\/ VST3.32{d0[0], d2[0], d4[0]}, [r0] variable 1537 void vst3q_lane_f16_ptr(__transfersize(3) __fp16 * ptr, float16x8x3_t * val, __constrange(0,7) int lane); \/\/ VST3.16{d0[0], d2[0], d4[0]}, [r0] variable 1538 void vst3q_lane_f32_ptr(__transfersize(3) float32_t * ptr, float32x4x3_t * val, __constrange(0,3) int lane); \/\/VST3.32 {d0[0], d2[0], d4[0]}, [r0] variable 1539 void vst3q_lane_p16_ptr(__transfersize(3) poly16_t * ptr, poly16x8x3_t * val, __constrange(0,7) int lane); \/\/ VST3.16{d0[0], d2[0], d4[0]}, [r0] variable 1540 void vst3_lane_u8_ptr(__transfersize(3) uint8_t * ptr, uint8x8x3_t * val, __constrange(0,7) int lane); \/\/ VST3.8{d0[0], d1[0], d2[0]}, [r0] variable 1541 void vst3_lane_u16_ptr(__transfersize(3) uint16_t * ptr, uint16x4x3_t * val, __constrange(0,3) int lane); \/\/ VST3.16{d0[0], d1[0], d2[0]}, [r0] variable 1542 void vst3_lane_u32_ptr(__transfersize(3) uint32_t * ptr, uint32x2x3_t * val, __constrange(0,1) int lane); \/\/ VST3.32{d0[0], d1[0], d2[0]}, [r0] variable 1543 void vst3_lane_s8_ptr(__transfersize(3) int8_t * ptr, int8x8x3_t * val, __constrange(0,7) int lane); \/\/ VST3.8 {d0[0],d1[0], d2[0]}, [r0] variable 1544 void vst3_lane_s16_ptr(__transfersize(3) int16_t * ptr, int16x4x3_t * val, __constrange(0,3) int lane); \/\/ VST3.16{d0[0], d1[0], d2[0]}, [r0] variable 1545 void vst3_lane_s32_ptr(__transfersize(3) int32_t * ptr, int32x2x3_t * val, __constrange(0,1) int lane); \/\/ VST3.32{d0[0], d1[0], d2[0]}, [r0] variable 1546 void vst3_lane_f16_ptr(__transfersize(3) __fp16 * ptr, float16x4x3_t * val, __constrange(0,3) int lane); \/\/ VST3.16{d0[0], d1[0], d2[0]}, [r0] variable 1547 void vst3_lane_f32_ptr(__transfersize(3) float32_t * ptr, float32x2x3_t * val, __constrange(0,1) int lane); \/\/ VST3.32{d0[0], d1[0], d2[0]}, [r0] variable 1548 void vst3_lane_p8_ptr(__transfersize(3) poly8_t * ptr, poly8x8x3_t * val, __constrange(0,7) int lane); \/\/ VST3.8{d0[0], d1[0], d2[0]}, [r0] variable 1549 void vst3_lane_p16_ptr(__transfersize(3) poly16_t * ptr, poly16x4x3_t * val, __constrange(0,3) int lane); \/\/ VST3.16{d0[0], d1[0], d2[0]}, [r0] variable 1550 void vst4q_lane_u16_ptr(__transfersize(4) uint16_t * ptr, uint16x8x4_t * val, __constrange(0,7) int lane); \/\/ VST4.16{d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1551 void vst4q_lane_u32_ptr(__transfersize(4) uint32_t * ptr, uint32x4x4_t * val, __constrange(0,3) int lane); \/\/ VST4.32{d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1552 void vst4q_lane_s16_ptr(__transfersize(4) int16_t * ptr, int16x8x4_t * val, __constrange(0,7) int lane); \/\/ VST4.16{d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1553 void vst4q_lane_s32_ptr(__transfersize(4) int32_t * ptr, int32x4x4_t * val, __constrange(0,3) int lane); \/\/ VST4.32{d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1554 void vst4q_lane_f16_ptr(__transfersize(4) __fp16 * ptr, float16x8x4_t * val, __constrange(0,7) int lane); \/\/ VST4.16{d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1555 void vst4q_lane_f32_ptr(__transfersize(4) float32_t * ptr, float32x4x4_t * val, __constrange(0,3) int lane); \/\/VST4.32 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1556 void vst4q_lane_p16_ptr(__transfersize(4) poly16_t * ptr, poly16x8x4_t * val, __constrange(0,7) int lane); \/\/ VST4.16{d0[0], d2[0], d4[0], d6[0]}, [r0] variable 1557 void vst4_lane_u8_ptr(__transfersize(4) uint8_t * ptr, uint8x8x4_t * val, __constrange(0,7) int lane); \/\/ VST4.8{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1558 void vst4_lane_u16_ptr(__transfersize(4) uint16_t * ptr, uint16x4x4_t * val, __constrange(0,3) int lane); \/\/ VST4.16{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1559 void vst4_lane_u32_ptr(__transfersize(4) uint32_t * ptr, uint32x2x4_t * val, __constrange(0,1) int lane); \/\/ VST4.32{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1560 void vst4_lane_s8_ptr(__transfersize(4) int8_t * ptr, int8x8x4_t * val, __constrange(0,7) int lane); \/\/ VST4.8 {d0[0],d1[0], d2[0], d3[0]}, [r0] variable 1561 void vst4_lane_s16_ptr(__transfersize(4) int16_t * ptr, int16x4x4_t * val, __constrange(0,3) int lane); \/\/ VST4.16{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1562 void vst4_lane_s32_ptr(__transfersize(4) int32_t * ptr, int32x2x4_t * val, __constrange(0,1) int lane); \/\/ VST4.32{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1563 void vst4_lane_f16_ptr(__transfersize(4) __fp16 * ptr, float16x4x4_t * val, __constrange(0,3) int lane); \/\/ VST4.16{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1564 void vst4_lane_f32_ptr(__transfersize(4) float32_t * ptr, float32x2x4_t * val, __constrange(0,1) int lane); \/\/ VST4.32{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1565 void vst4_lane_p8_ptr(__transfersize(4) poly8_t * ptr, poly8x8x4_t * val, __constrange(0,7) int lane); \/\/ VST4.8{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 1566 void vst4_lane_p16_ptr(__transfersize(4) poly16_t * ptr, poly16x4x4_t * val, __constrange(0,3) int lane); \/\/ VST4.16{d0[0], d1[0], d2[0], d3[0]}, [r0] variable 9283 uint8x16_t vld1q_lane_u8(__transfersize(1) uint8_t const * ptr, uint8x16_t vec, __constrange(0,15) int lane); \/\/ VLD1.8 {d0[0]}, [r0] variable 9286 uint16x8_t vld1q_lane_u16(__transfersize(1) uint16_t const * ptr, uint16x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 9289 uint32x4_t vld1q_lane_u32(__transfersize(1) uint32_t const * ptr, uint32x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 9292 uint64x2_t vld1q_lane_u64(__transfersize(1) uint64_t const * ptr, uint64x2_t vec, __constrange(0,1) int lane); \/\/ VLD1.64 {d0}, [r0] variable 9296 int8x16_t vld1q_lane_s8(__transfersize(1) int8_t const * ptr, int8x16_t vec, __constrange(0,15) int lane); \/\/ VLD1.8 {d0[0]}, [r0] variable 9299 int16x8_t vld1q_lane_s16(__transfersize(1) int16_t const * ptr, int16x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 9302 int32x4_t vld1q_lane_s32(__transfersize(1) int32_t const * ptr, int32x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 9305 float16x8_t vld1q_lane_f16(__transfersize(1) __fp16 const * ptr, float16x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 9308 float32x4_t vld1q_lane_f32(__transfersize(1) float32_t const * ptr, float32x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 9317 int64x2_t vld1q_lane_s64(__transfersize(1) int64_t const * ptr, int64x2_t vec, __constrange(0,1) int lane); \/\/ VLD1.64 {d0}, [r0] variable 9320 poly8x16_t vld1q_lane_p8(__transfersize(1) poly8_t const * ptr, poly8x16_t vec, __constrange(0,15) int lane); \/\/ VLD1.8 {d0[0]}, [r0] variable 9323 poly16x8_t vld1q_lane_p16(__transfersize(1) poly16_t const * ptr, poly16x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 9326 uint8x8_t vld1_lane_u8(__transfersize(1) uint8_t const * ptr, uint8x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.8 {d0[0]}, [r0] variable 9335 uint16x4_t vld1_lane_u16(__transfersize(1) uint16_t const * ptr, uint16x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 9344 uint32x2_t vld1_lane_u32(__transfersize(1) uint32_t const * ptr, uint32x2_t vec, __constrange(0,1) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 9353 uint64x1_t vld1_lane_u64(__transfersize(1) uint64_t const * ptr, uint64x1_t vec, __constrange(0,0) int lane); \/\/ VLD1.64 {d0}, [r0] variable 9362 int8x8_t vld1_lane_s8(__transfersize(1) int8_t const * ptr, int8x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.8 {d0[0]}, [r0] variable 9365 int16x4_t vld1_lane_s16(__transfersize(1) int16_t const * ptr, int16x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 9368 int32x2_t vld1_lane_s32(__transfersize(1) int32_t const * ptr, int32x2_t vec, __constrange(0,1) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 9371 float16x4_t vld1_lane_f16(__transfersize(1) __fp16 const * ptr, float16x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 9374 float32x2_t vld1_lane_f32(__transfersize(1) float32_t const * ptr, float32x2_t vec, __constrange(0,1) int lane); \/\/ VLD1.32 {d0[0]}, [r0] variable 9383 int64x1_t vld1_lane_s64(__transfersize(1) int64_t const * ptr, int64x1_t vec, __constrange(0,0) int lane); \/\/ VLD1.64 {d0}, [r0] variable 9386 poly8x8_t vld1_lane_p8(__transfersize(1) poly8_t const * ptr, poly8x8_t vec, __constrange(0,7) int lane); \/\/ VLD1.8 {d0[0]}, [r0] variable 9389 poly16x4_t vld1_lane_p16(__transfersize(1) poly16_t const * ptr, poly16x4_t vec, __constrange(0,3) int lane); \/\/ VLD1.16 {d0[0]}, [r0] variable 9630 void vst1q_lane_u8(__transfersize(1) uint8_t * ptr, uint8x16_t val, __constrange(0,15) int lane); \/\/ VST1.8 {d0[0]}, [r0] variable 9633 void vst1q_lane_u16(__transfersize(1) uint16_t * ptr, uint16x8_t val, __constrange(0,7) int lane); \/\/ VST1.16 {d0[0]}, [r0] variable 9636 void vst1q_lane_u32(__transfersize(1) uint32_t * ptr, uint32x4_t val, __constrange(0,3) int lane); \/\/ VST1.32 {d0[0]}, [r0] variable 9639 void vst1q_lane_u64(__transfersize(1) uint64_t * ptr, uint64x2_t val, __constrange(0,1) int lane); \/\/ VST1.64 {d0}, [r0] variable 9642 void vst1q_lane_s8(__transfersize(1) int8_t * ptr, int8x16_t val, __constrange(0,15) int lane); \/\/ VST1.8 {d0[0]}, [r0] variable 9645 void vst1q_lane_s16(__transfersize(1) int16_t * ptr, int16x8_t val, __constrange(0,7) int lane); \/\/ VST1.16 {d0[0]}, [r0] variable 9648 void vst1q_lane_s32(__transfersize(1) int32_t * ptr, int32x4_t val, __constrange(0,3) int lane); \/\/ VST1.32 {d0[0]}, [r0] variable 9651 void vst1q_lane_s64(__transfersize(1) int64_t * ptr, int64x2_t val, __constrange(0,1) int lane); \/\/ VST1.64 {d0}, [r0] variable 9654 void vst1q_lane_f16(__transfersize(1) __fp16 * ptr, float16x8_t val, __constrange(0,7) int lane); \/\/ VST1.16 {d0[0]}, [r0] variable 9657 void vst1q_lane_f32(__transfersize(1) float32_t * ptr, float32x4_t val, __constrange(0,3) int lane); \/\/ VST1.32 {d0[0]}, [r0] variable 9665 void vst1q_lane_p8(__transfersize(1) poly8_t * ptr, poly8x16_t val, __constrange(0,15) int lane); \/\/ VST1.8 {d0[0]}, [r0] variable 9668 void vst1q_lane_p16(__transfersize(1) poly16_t * ptr, poly16x8_t val, __constrange(0,7) int lane); \/\/ VST1.16 {d0[0]}, [r0] variable 9671 void vst1_lane_u8(__transfersize(1) uint8_t * ptr, uint8x8_t val, __constrange(0,7) int lane); \/\/ VST1.8 {d0[0]}, [r0] variable 9677 void vst1_lane_u16(__transfersize(1) uint16_t * ptr, uint16x4_t val, __constrange(0,3) int lane); \/\/ VST1.16 {d0[0]}, [r0] variable 9683 void vst1_lane_u32(__transfersize(1) uint32_t * ptr, uint32x2_t val, __constrange(0,1) int lane); \/\/ VST1.32 {d0[0]}, [r0] variable 9689 void vst1_lane_u64(__transfersize(1) uint64_t * ptr, uint64x1_t val, __constrange(0,0) int lane); \/\/ VST1.64 {d0}, [r0] variable 9695 void vst1_lane_s8(__transfersize(1) int8_t * ptr, int8x8_t val, __constrange(0,7) int lane); \/\/ VST1.8 {d0[0]}, [r0] variable 9698 void vst1_lane_s16(__transfersize(1) int16_t * ptr, int16x4_t val, __constrange(0,3) int lane); \/\/ VST1.16 {d0[0]}, [r0] variable 9701 void vst1_lane_s32(__transfersize(1) int32_t * ptr, int32x2_t val, __constrange(0,1) int lane); \/\/ VST1.32 {d0[0]}, [r0] variable 9705 void vst1_lane_s64(__transfersize(1) int64_t * ptr, int64x1_t val, __constrange(0,0) int lane); \/\/ VST1.64 {d0}, [r0] variable 9709 void vst1_lane_f16(__transfersize(1) __fp16 * ptr, float16x4_t val, __constrange(0,3) int lane); \/\/ VST1.16 {d0[0]}, [r0] variable 9712 void vst1_lane_f32(__transfersize(1) float32_t * ptr, float32x2_t val, __constrange(0,1) int lane); \/\/ VST1.32 {d0[0]}, [r0] variable 9718 void vst1_lane_p8(__transfersize(1) poly8_t * ptr, poly8x8_t val, __constrange(0,7) int lane); \/\/ VST1.8 {d0[0]}, [r0] variable 9721 void vst1_lane_p16(__transfersize(1) poly16_t * ptr, poly16x4_t val, __constrange(0,3) int lane); \/\/ VST1.16 {d0[0]}, [r0] variable 10738 int8x8x2_t vld2_lane_s8_ptr(__transfersize(2) int8_t const * ptr, int8x8x2_t * src, __constrange(0,7) int lane); \/\/ VLD2.8 {d0[0], d1[0]}, [r0] variable 10742 int16x4x2_t vld2_lane_s16_ptr(__transfersize(2) int16_t const * ptr, int16x4x2_t * src, __constrange(0,3) int lane); \/\/ VLD2.16 {d0[0], d1[0]}, [r0] variable 10746 int32x2x2_t vld2_lane_s32_ptr(__transfersize(2) int32_t const * ptr, int32x2x2_t * src, __constrange(0,1) int lane); \/\/ VLD2.32 {d0[0], d1[0]}, [r0] variable 10752 float32x2x2_t vld2_lane_f32_ptr(__transfersize(2) float32_t const * ptr, float32x2x2_t * src,__constrange(0,1) int lane); \/\/ VLD2.32 {d0[0], d1[0]}, [r0] variable 10763 poly8x8x2_t vld2_lane_p8_ptr(__transfersize(2) poly8_t const * ptr, poly8x8x2_t * src, __constrange(0,7) int lane); \/\/ VLD2.8 {d0[0], d1[0]}, [r0] variable 10767 poly16x4x2_t vld2_lane_p16_ptr(__transfersize(2) poly16_t const * ptr, poly16x4x2_t * src, __constrange(0,3) int lane); \/\/ VLD2.16 {d0[0], d1[0]}, [r0] variable 10819 float16x8x3_t vld3q_lane_f16_ptr(__transfersize(3) __fp16 const * ptr, float16x8x3_t * src, __constrange(0,7) int lane); \/\/ VLD3.16 {d0[0], d2[0], d4[0]}, [r0] variable 10835 poly16x8x3_t vld3q_lane_p16_ptr(__transfersize(3) poly16_t const * ptr, poly16x8x3_t * src,__constrange(0,7) int lane); \/\/ VLD3.16 {d0[0], d2[0], d4[0]}, [r0] variable 10872 int8x8x3_t vld3_lane_s8_ptr(__transfersize(3) int8_t const * ptr, int8x8x3_t * src, __constrange(0,7) int lane); \/\/ VLD3.8 {d0[0], d1[0], d2[0]}, [r0] variable 10875 int16x4x3_t vld3_lane_s16_ptr(__transfersize(3) int16_t const * ptr, int16x4x3_t * src, __constrange(0,3) int lane); \/\/ VLD3.16 {d0[0], d1[0], d2[0]}, [r0] variable 10878 int32x2x3_t vld3_lane_s32_ptr(__transfersize(3) int32_t const * ptr, int32x2x3_t * src, __constrange(0,1) int lane); \/\/ VLD3.32 {d0[0], d1[0], d2[0]}, [r0] variable 10881 float16x4x3_t vld3_lane_f16_ptr(__transfersize(3) __fp16 const * ptr, float16x4x3_t * src, __constrange(0,3) int lane); \/\/ VLD3.16 {d0[0], d1[0], d2[0]}, [r0] variable 10931 int16x8x4_t vld4q_lane_s16_ptr(__transfersize(4) int16_t const * ptr, int16x8x4_t * src, __constrange(0,7) int lane); \/\/ VLD4.16 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 10935 int32x4x4_t vld4q_lane_s32_ptr(__transfersize(4) int32_t const * ptr, int32x4x4_t * src, __constrange(0,3) int lane); \/\/ VLD4.32 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 10939 float16x8x4_t vld4q_lane_f16_ptr(__transfersize(4) __fp16 const * ptr, float16x8x4_t * src, __constrange(0,7) int lane); \/\/ VLD4.16 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 10955 poly16x8x4_t vld4q_lane_p16_ptr(__transfersize(4) poly16_t const * ptr, poly16x8x4_t * src,__constrange(0,7) int lane); \/\/ VLD4.16 {d0[0], d2[0], d4[0], d6[0]}, [r0] variable 10995 int8x8x4_t vld4_lane_s8_ptr(__transfersize(4) int8_t const * ptr, int8x8x4_t * src, __constrange(0,7) int lane); variable 10999 int16x4x4_t vld4_lane_s16_ptr(__transfersize(4) int16_t const * ptr, int16x4x4_t * src, __constrange(0,3) int lane); variable 11003 int32x2x4_t vld4_lane_s32_ptr(__transfersize(4) int32_t const * ptr, int32x2x4_t * src, __constrange(0,1) int lane); variable 11007 float16x4x4_t vld4_lane_f16_ptr(__transfersize(4) __fp16 const * ptr, float16x4x4_t * src, __constrange(0,3) int lane); variable 11024 poly8x8x4_t vld4_lane_p8_ptr(__transfersize(4) poly8_t const * ptr, poly8x8x4_t * src, __constrange(0,7) int lane); variable 11028 poly16x4x4_t vld4_lane_p16_ptr(__transfersize(4) poly16_t const * ptr, poly16x4x4_t * src, __constrange(0,3) int lane); variable 11623 void vst2q_lane_s16_ptr(__transfersize(2) int16_t * ptr, int16x8x2_t * val, __constrange(0,7) int lane); variable 11627 void vst2q_lane_s32_ptr(__transfersize(2) int32_t * ptr, int32x4x2_t * val, __constrange(0,3) int lane); variable 11631 void vst2q_lane_f16_ptr(__transfersize(2) __fp16 * ptr, float16x8x2_t * val, __constrange(0,7) int lane); variable 11643 void vst2q_lane_p16_ptr(__transfersize(2) poly16_t * ptr, poly16x8x2_t * val, __constrange(0,7) int lane); variable 11647 void vst2_lane_u8_ptr(__transfersize(2) uint8_t * ptr, uint8x8x2_t * val, __constrange(0,7) int lane); \/\/ VST2.8 {d0[0], d1[0]}, [r0] variable 11656 void vst2_lane_u16_ptr(__transfersize(2) uint16_t * ptr, uint16x4x2_t * val, __constrange(0,3) int lane); \/\/ VST2.16 {d0[0], d1[0]}, [r0] variable 11665 void vst2_lane_u32_ptr(__transfersize(2) uint32_t * ptr, uint32x2x2_t * val, __constrange(0,1) int lane); \/\/ VST2.32 {d0[0], d1[0]}, [r0] variable 11674 void vst2_lane_s8_ptr(__transfersize(2) int8_t * ptr, int8x8x2_t * val, __constrange(0,7) int lane); variable 11678 void vst2_lane_s16_ptr(__transfersize(2) int16_t * ptr, int16x4x2_t * val, __constrange(0,3) int lane); variable 11682 void vst2_lane_s32_ptr(__transfersize(2) int32_t * ptr, int32x2x2_t * val, __constrange(0,1) int lane); variable 11688 void vst2_lane_f32_ptr(__transfersize(2) float32_t * ptr, float32x2x2_t * val, __constrange(0,1) int lane); \/\/ VST2.32 {d0[0], d1[0]}, [r0] variable 11721 void vst3q_lane_s16_ptr(__transfersize(3) int16_t * ptr, int16x8x3_t * val, __constrange(0,7) int lane); variable 11725 void vst3q_lane_s32_ptr(__transfersize(3) int32_t * ptr, int32x4x3_t * val, __constrange(0,3) int lane); variable 11729 void vst3q_lane_f16_ptr(__transfersize(3) __fp16 * ptr, float16x8x3_t * val, __constrange(0,7) int lane); variable 11742 void vst3q_lane_p16_ptr(__transfersize(3) poly16_t * ptr, poly16x8x3_t * val, __constrange(0,7) int lane); variable 11773 void vst3_lane_s8_ptr(__transfersize(3) int8_t * ptr, int8x8x3_t * val, __constrange(0,7) int lane); variable 11777 void vst3_lane_s16_ptr(__transfersize(3) int16_t * ptr, int16x4x3_t * val, __constrange(0,3) int lane); variable 11781 void vst3_lane_s32_ptr(__transfersize(3) int32_t * ptr, int32x2x3_t * val, __constrange(0,1) int lane); variable 11785 void vst3_lane_f16_ptr(__transfersize(3) __fp16 * ptr, float16x4x3_t * val, __constrange(0,3) int lane); variable 11789 void vst3_lane_f32_ptr(__transfersize(3) float32_t * ptr, float32x2x3_t * val, __constrange(0,1) int lane); variable 11799 void vst3_lane_p8_ptr(__transfersize(3) poly8_t * ptr, poly8x8x3_t * val, __constrange(0,7) int lane); variable 11803 void vst3_lane_p16_ptr(__transfersize(3) poly16_t * ptr, poly16x4x3_t * val, __constrange(0,3) int lane); variable 11825 void vst4q_lane_s16_ptr(__transfersize(4) int16_t * ptr, int16x8x4_t * val, __constrange(0,7) int lane); variable 11829 void vst4q_lane_s32_ptr(__transfersize(4) int32_t * ptr, int32x4x4_t * val, __constrange(0,3) int lane); variable 11833 void vst4q_lane_f16_ptr(__transfersize(4) __fp16 * ptr, float16x8x4_t * val, __constrange(0,7) int lane); variable 11847 void vst4q_lane_p16_ptr(__transfersize(4) poly16_t * ptr, poly16x8x4_t * val, __constrange(0,7) int lane); variable 11890 void vst4_lane_f16_ptr(__transfersize(4) __fp16 * ptr, float16x4x4_t * val, __constrange(0,3) int lane); variable 11893 void vst4_lane_f32_ptr(__transfersize(4) float32_t * ptr, float32x2x4_t * val, __constrange(0,1) int lane); \/\/ VST4.32 {d0[0], d1[0], d2[0], d3[0]}, [r0] variable 11904 void vst4_lane_p8_ptr(__transfersize(4) poly8_t * ptr, poly8x8x4_t * val, __constrange(0,7) int lane); variable 11908 void vst4_lane_p16_ptr(__transfersize(4) poly16_t * ptr, poly16x4x4_t * val, __constrange(0,3) int lane); variable [all...] |
/external/vixl/test/ |
test-simulator-a64.cc | [all...] |
/external/vixl/src/vixl/a64/ |
simulator-a64.cc | 667 for (int lane = leftmost_lane; lane >= rightmost_lane; lane--) { 669 (lane_size_in_bytes == kSRegSizeInBytes) ? vreg(code).Get<float>(lane) 670 : vreg(code).Get<double>(lane); 762 unsigned lane) { 769 GetPrintRegLaneCount(format), lane); 793 unsigned lane) { 805 PrintVRegisterRawHelper(reg_code, reg_size, lane_size * lane); 807 PrintVRegisterFPHelper(reg_code, lane_size, lane_count, lane); 3268 int lane = instr->NEONLSIndex(index_shift); local [all...] |
simulator-a64.h | 400 // unchanged. The lane parameter indicates where in the register the value 404 void Insert(int lane, T new_value) { 405 VIXL_ASSERT(lane >= 0); 407 (lane * sizeof(new_value))) <= kSizeInBytes); 408 memcpy(&value_[lane * sizeof(new_value)], &new_value, sizeof(new_value)); 414 T Get(int lane = 0) const { 416 VIXL_ASSERT(lane >= 0); 417 VIXL_ASSERT((sizeof(result) + (lane * sizeof(result))) <= kSizeInBytes); 418 memcpy(&result, &value_[lane * sizeof(result)], sizeof(result)); 447 // and additional information to represent lane state [all...] |
macro-assembler-a64.h | [all...] |
assembler-a64.cc | [all...] |
assembler-a64.h | [all...] |
/external/tcpdump/ |
Android.mk | 17 print-l2tp.c print-lane.c print-ldp.c print-lldp.c print-llc.c \
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/external/tcpdump/win32/prj/ |
GNUmakefile | 91 ../../print-lane.o \
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/frameworks/rs/cpu_ref/ |
rsCpuIntrinsics_neon_Blur.S | 103 .irp dreg, 6, 5, 4, 3, 2, 1, 0 ; .irp lane, 3, 2, 1, 0 104 .set i, \dreg * 4 + \lane 121 vmlal.u16 q12, d20, d\dreg[\lane] 123 vmlal.u16 q13, d21, d\dreg[\lane] 125 vmlal.u16 q14, d22, d\dreg[\lane] 127 vmlal.u16 q15, d23, d\dreg[\lane] [all...] |
rsCpuIntrinsics_advsimd_Blur.S | 95 .irp dreg, 4, 3, 2, 1, 0 ; .irp lane, 7, 6, 5, 4, 3, 2, 1, 0 ; .irp doth, .h 96 .set i, \dreg * 8 + \lane 106 umlal v12.4s, v16.4h, v\dreg\doth[\lane] 107 umlal2 v13.4s, v16.8h, v\dreg\doth[\lane] 110 umlal v14.4s, v11.4h, v\dreg\doth[\lane] 113 umlal2 v15.4s, v11.8h, v\dreg\doth[\lane] [all...] |
/external/mesa3d/src/gallium/drivers/nv50/codegen/ |
nv50_ir_emit_nv50.cpp | 120 void emitQUADOP(const Instruction *, uint8_t lane, uint8_t quOp); 779 CodeEmitterNV50::emitQUADOP(const Instruction *i, uint8_t lane, uint8_t quOp) 781 code[0] = 0xc0000000 | (lane << 16); [all...] |
/external/libpcap/ |
scanner.l | 288 lane return LANE;
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/external/valgrind/VEX/priv/ |
guest_arm64_toIR.c | 8711 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I8); local 8718 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I8); local 8725 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I16); local 8732 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I16); local 8739 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I32); local 8746 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I32); local 8753 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I64); local [all...] |
guest_x86_toIR.c | 513 least significant lane (rightmost in the register). */ 8879 Int lane; local 10969 Int lane; local 10990 putXMMRegLane16( gregOfRM(modrm), lane & 7, mkexpr(t4) ); local [all...] |
guest_amd64_toIR.c | 13782 Int lane; local 13823 Int lane; local 27294 IRExpr* lane = (laneIs32 ? getYMMRegLane32 : getYMMRegLane64)( rV, i ); local [all...] |
/external/valgrind/none/tests/arm/ |
neon64.stdout.exp | [all...] |