| /art/compiler/dex/quick/mips/ |
| call_mips.cc | 322 m2l_->ResetRegPool();
323 m2l_->ResetDefTracking();
326 m2l_->LoadWordDisp(m2l_->TargetPtrReg(kSp), 0, m2l_->TargetPtrReg(kLr));
327 m2l_->OpRegImm(kOpAdd, m2l_->TargetPtrReg(kSp), sp_displace_);
328 m2l_->cfi().AdjustCFAOffset(-sp_displace_);
329 m2l_->ClobberCallerSave();
330 RegStorage r_tgt = m2l_->CallHelperSetup(kQuickThrowStackOverflow); // Doesn't clobber LR
[all...] |
| codegen_mips.h | 32 explicit InToRegStorageMipsMapper(Mir2Lir* m2l) : m2l_(m2l), cur_core_reg_(0) {}
38 Mir2Lir* m2l_; member in class:art::FINAL::InToRegStorageMipsMapper
45 explicit InToRegStorageMips64Mapper(Mir2Lir* m2l) : m2l_(m2l), cur_arg_reg_(0) {}
51 Mir2Lir* m2l_; member in class:art::FINAL::InToRegStorageMips64Mapper
|
| target_mips.cc | 256 result = m2l_->TargetReg(coreArgMappingToPhysicalReg[cur_core_reg_++],
260 result, m2l_->TargetReg(coreArgMappingToPhysicalReg[cur_core_reg_++], kNotWide));
278 result = m2l_->TargetReg(fpArgMappingToPhysicalReg[cur_arg_reg_++],
284 result = m2l_->TargetReg(coreArgMappingToPhysicalReg[cur_arg_reg_++],
[all...] |
| /art/compiler/dex/quick/x86/ |
| call_x86.cc | 200 m2l_->ResetRegPool();
201 m2l_->ResetDefTracking();
204 m2l_->OpRegImm(kOpAdd, local_rs_rSP, sp_displace_);
205 m2l_->cfi().AdjustCFAOffset(-sp_displace_);
206 m2l_->ClobberCallerSave();
208 m2l_->CallHelper(RegStorage::InvalidReg(), kQuickThrowStackOverflow,
210 m2l_->cfi().AdjustCFAOffset(sp_displace_);
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| int_x86.cc | [all...] |
| codegen_x86.h | 36 : m2l_(m2l), cur_core_reg_(0), cur_fp_reg_(0) {}
43 Mir2Lir* m2l_; member in class:art::FINAL::InToRegStorageX86_64Mapper
[all...] |
| target_x86.cc | [all...] |
| /art/compiler/dex/quick/arm64/ |
| call_arm64.cc | 367 m2l_->ResetRegPool();
368 m2l_->ResetDefTracking();
371 m2l_->OpRegImm(kOpAdd, rs_sp, sp_displace_);
372 m2l_->cfi().AdjustCFAOffset(-sp_displace_);
373 m2l_->ClobberCallerSave();
375 m2l_->LockTemp(rs_xIP0);
376 m2l_->LoadWordDisp(rs_xSELF, func_offset.Int32Value(), rs_xIP0);
377 m2l_->NewLIR1(kA64Br1x, rs_xIP0.GetReg());
378 m2l_->FreeTemp(rs_xIP0);
379 m2l_->cfi().AdjustCFAOffset(sp_displace_)
[all...] |
| /art/compiler/dex/quick/ |
| gen_common.cc | 73 m2l_->CallRuntimeHelperImm(trampoline_, imm_, true);
74 m2l_->OpRegCopy(r_result_, m2l_->TargetReg(kRet0, kRef));
75 m2l_->OpUnconditionalBranch(cont_);
146 m2l_->CallRuntimeHelperImm(kQuickInitializeStaticStorage, storage_index_, true);
148 m2l_->OpRegCopy(r_base_, m2l_->TargetReg(kRet0, kRef));
150 m2l_->OpUnconditionalBranch(cont_);
204 m2l_->ResetRegPool();
205 m2l_->ResetDefTracking()
[all...] |
| ralloc_util.cc | 76 dp_regs_(arena->Adapter()), next_dp_reg_(0), m2l_(m2l) {
78 m2l_->reginfo_map_.clear();
79 m2l_->reginfo_map_.resize(RegStorage::kMaxRegs, nullptr);
84 RegisterInfo* info = new (arena) RegisterInfo(reg, m2l_->GetRegMaskCommon(reg));
85 m2l_->reginfo_map_[reg.GetReg()] = info;
90 RegisterInfo* info = new (arena) RegisterInfo(reg, m2l_->GetRegMaskCommon(reg));
91 m2l_->reginfo_map_[reg.GetReg()] = info;
96 RegisterInfo* info = new (arena) RegisterInfo(reg, m2l_->GetRegMaskCommon(reg));
97 m2l_->reginfo_map_[reg.GetReg()] = info;
102 RegisterInfo* info = new (arena) RegisterInfo(reg, m2l_->GetRegMaskCommon(reg))
[all...] |
| mir_to_lir.cc | 47 m2l_->ResetRegPool();
48 m2l_->ResetDefTracking();
51 m2l_->LockCallTemps();
54 m2l_->GenSpecialEntryForSuspend();
57 for (size_t i = 0, end = m2l_->in_to_reg_storage_mapping_.GetEndMappedIn(); i < end;
58 i += m2l_->in_to_reg_storage_mapping_.GetShorty(i).IsWide() ? 2u : 1u) {
59 m2l_->SpillArg(i);
62 m2l_->FreeCallTemps();
65 m2l_->CallRuntimeHelper(kQuickTestSuspend, true);
67 m2l_->LockCallTemps()
[all...] |
| mir_to_lir.h | 451 Mir2Lir* const m2l_; member in class:art::Mir2Lir::RegisterPool
500 : m2l_(m2l), cu_(m2l->cu_),
518 Mir2Lir* const m2l_; member in class:art::Mir2Lir::LIRSlowPath
533 : m2l_(m2l),
535 m2l_->mem_ref_type_ = new_mem_ref_type;
539 m2l_->mem_ref_type_ = old_mem_ref_type_;
543 Mir2Lir* const m2l_; member in class:art::Mir2Lir::ScopedMemRefType
[all...] |
| gen_invoke.cc | 57 m2l_->ResetRegPool();
58 m2l_->ResetDefTracking();
61 m2l_->GenInvokeNoInline(info_);
63 m2l_->OpUnconditionalBranch(cont_);
[all...] |
| /art/compiler/dex/quick/arm/ |
| call_arm.cc | 455 m2l_->ResetRegPool();
456 m2l_->ResetDefTracking();
459 m2l_->LoadWordDisp(rs_rARM_SP, sp_displace_ - 4, rs_rARM_LR);
461 m2l_->OpRegImm(kOpAdd, rs_rARM_SP, sp_displace_);
462 m2l_->cfi().AdjustCFAOffset(-sp_displace_);
463 m2l_->ClobberCallerSave();
468 m2l_->LoadWordDisp(rs_rARM_SELF, func_offset.Int32Value(), rs_rARM_PC);
469 m2l_->cfi().AdjustCFAOffset(sp_displace_);
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