1 // RUN: llvm-mc -arch=amdgcn -show-encoding %s | FileCheck %s 2 // RUN: llvm-mc -arch=amdgcn -mcpu=SI -show-encoding %s | FileCheck %s 3 4 //===----------------------------------------------------------------------===// 5 // Instructions 6 //===----------------------------------------------------------------------===// 7 8 s_movk_i32 s2, 0x6 9 // CHECK: s_movk_i32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb0] 10 11 s_cmovk_i32 s2, 0x6 12 // CHECK: s_cmovk_i32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb1] 13 14 s_cmpk_eq_i32 s2, 0x6 15 // CHECK: s_cmpk_eq_i32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb1] 16 17 s_cmpk_lg_i32 s2, 0x6 18 // CHECK: s_cmpk_lg_i32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb2] 19 20 s_cmpk_gt_i32 s2, 0x6 21 // CHECK: s_cmpk_gt_i32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb2] 22 23 s_cmpk_ge_i32 s2, 0x6 24 // CHECK: s_cmpk_ge_i32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb3] 25 26 s_cmpk_lt_i32 s2, 0x6 27 // CHECK: s_cmpk_lt_i32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb3] 28 29 s_cmpk_le_i32 s2, 0x6 30 // CHECK: s_cmpk_le_i32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb4] 31 32 s_cmpk_eq_u32 s2, 0x6 33 // CHECK: s_cmpk_eq_u32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb4] 34 35 s_cmpk_lg_u32 s2, 0x6 36 // CHECK: s_cmpk_lg_u32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb5] 37 38 s_cmpk_gt_u32 s2, 0x6 39 // CHECK: s_cmpk_gt_u32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb5] 40 41 s_cmpk_ge_u32 s2, 0x6 42 // CHECK: s_cmpk_ge_u32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb6] 43 44 s_cmpk_lt_u32 s2, 0x6 45 // CHECK: s_cmpk_lt_u32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb6] 46 47 s_cmpk_le_u32 s2, 0x6 48 // CHECK: s_cmpk_le_u32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb7] 49 50 s_addk_i32 s2, 0x6 51 // CHECK: s_addk_i32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb7] 52 53 s_mulk_i32 s2, 0x6 54 // CHECK: s_mulk_i32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb8] 55 56 s_cbranch_i_fork s[2:3], 0x6 57 // CHECK: s_cbranch_i_fork s[2:3], 0x6 ; encoding: [0x06,0x00,0x82,0xb8] 58 59 s_getreg_b32 s2, 0x6 60 // CHECK: s_getreg_b32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb9] 61 62 s_setreg_b32 s2, 0x6 63 // CHECK: s_setreg_b32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb9] 64 65 s_setreg_imm32_b32 0xff, 0x6 66 // CHECK: s_setreg_imm32_b32 0xff, 0x6 ; encoding: [0x06,0x00,0x80,0xba,0xff,0x00,0x00,0x00] 67
