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  /external/jpeg/
mips_idct_le.S 155 subq.ph $s6, $t2, $t6 # tmp12 ...
158 mulq_rs.ph $s6, $s6, $t8 # ... tmp12 ...
172 subq.ph $s6, $s6, $s7 # ... tmp12
223 mulq_rs.ph $v0, $v0, $t8 # tmp12 ...
235 addq.ph $s6, $s6, $v1 # ... tmp12
403 subq.ph $s6, $t2, $t6 # tmp12 ...
406 mulq_rs.ph $s6, $s6, $t8 # ... tmp12 ...
413 subq.ph $s6, $s6, $s7 # ... tmp12
448 mulq_rs.ph $v0, $v0, $t8 # tmp12 ...
459 addq.ph $s6, $s6, $v1 # ... tmp12
    [all...]
  /external/llvm/test/CodeGen/PowerPC/
vec_shuffle.ll 26 %tmp12 = extractelement <16 x i8> %tmp.upgrd.1, i32 15 ; <i8> [#uses=1]
42 %tmp28 = insertelement <16 x i8> %tmp27, i8 %tmp12, i32 10 ; <<16 x i8>> [#uses=1]
68 %tmp12 = extractelement <16 x i8> %tmp.upgrd.5, i32 15 ; <i8> [#uses=1]
84 %tmp28 = insertelement <16 x i8> %tmp27, i8 %tmp12, i32 10 ; <<16 x i8>> [#uses=1]
123 %tmp12 = extractelement <16 x i8> %tmp, i32 13 ; <i8> [#uses=1]
139 %tmp28 = insertelement <16 x i8> %tmp27, i8 %tmp12, i32 10 ; <<16 x i8>> [#uses=1]
163 %tmp12 = insertelement <8 x i16> %tmp11, i16 %tmp4, i32 2 ; <<8 x i16>> [#uses=1]
164 %tmp13 = insertelement <8 x i16> %tmp12, i16 %tmp5, i32 3 ; <<8 x i16>> [#uses=1]
203 %tmp12 = extractelement <16 x i8> %tmp, i32 5 ; <i8> [#uses=1]
219 %tmp28 = insertelement <16 x i8> %tmp27, i8 %tmp12, i32 10 ; <<16 x i8>> [#uses=1
    [all...]
  /external/llvm/test/CodeGen/X86/
2008-02-18-TailMergingBug.ll 16 %tmp12 = fcmp olt float %tmp8, %tmp11 ; <i1> [#uses=5]
17 br i1 %tmp12, label %bb, label %bb21
32 br i1 %tmp12, label %bb40, label %bb50
43 br i1 %tmp12, label %bb72, label %bb80
47 %brmerge786 = or i1 %tmp82475, %tmp12 ; <i1> [#uses=1]
53 %brmerge = or i1 %tmp82, %tmp12 ; <i1> [#uses=1]
mmx-arith.ll 19 %tmp12 = tail call x86_mmx @llvm.x86.mmx.padds.b(x86_mmx %tmp4a, x86_mmx %tmp7)
20 store x86_mmx %tmp12, x86_mmx* %A
22 %tmp21 = tail call x86_mmx @llvm.x86.mmx.paddus.b(x86_mmx %tmp12, x86_mmx %tmp16)
118 %tmp12 = tail call x86_mmx @llvm.x86.mmx.padds.w(x86_mmx %tmp4a, x86_mmx %tmp7)
119 store x86_mmx %tmp12, x86_mmx* %A
121 %tmp21 = tail call x86_mmx @llvm.x86.mmx.paddus.w(x86_mmx %tmp12, x86_mmx %tmp16)
2010-01-13-OptExtBug.ll 39 %tmp12 = load i8, i8* %arrayidx
2006-11-12-CSRetCC.ll 41 %tmp12 = getelementptr { double, double }, { double, double }* %z, i64 0, i32 0 ; <double*> [#uses=1]
44 store double %tmp14, double* %tmp12
2008-02-22-LocalRegAllocBug.ll 18 %tmp12 = bitcast i8* %tmp1 to i32* ; <i32*> [#uses=1]
50 call void asm sideeffect "movd $4, %mm0 \0A\09movd $5, %mm1 \0A\09movd $6, %mm2 \0A\09movd $7, %mm3 \0A\09punpcklbw %mm1, %mm0 \0A\09punpcklbw %mm3, %mm2 \0A\09movq %mm0, %mm1 \0A\09punpcklwd %mm2, %mm0 \0A\09punpckhwd %mm2, %mm1 \0A\09movd %mm0, $0 \0A\09punpckhdq %mm0, %mm0 \0A\09movd %mm0, $1 \0A\09movd %mm1, $2 \0A\09punpckhdq %mm1, %mm1 \0A\09movd %mm1, $3 \0A\09", "=*m,=*m,=*m,=*m,*m,*m,*m,*m,~{dirflag},~{fpsr},~{flags}"( i32* %tmp12, i32* %tmp56, i32* %tmp1011, i32* %tmp1617, i32* %tmp1920, i32* %tmp2324, i32* %tmp2829, i32* %tmp3334 ) nounwind
add.ll 79 %tmp12 = zext i32 %B to i64 ; <i64> [#uses=1]
80 %tmp3 = shl i64 %tmp12, 32 ; <i64> [#uses=1]
lsr-reuse-trunc.ll 49 %tmp12 = add i64 %tmp, 4
50 %tmp13 = trunc i64 %tmp12 to i32
misched-new.ll 100 %tmp12 = mul i64 %tmp11, %tmp9
106 %tmp17 = add i64 0, %tmp12
muloti.ll 10 %tmp12 = shl nuw i128 %tmp11, 64
11 %ins14 = or i128 %tmp12, %tmp16
vec_ss_load_fold.ll 10 %tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3 ; <<4 x float>> [#uses=1]
11 %tmp28 = tail call <4 x float> @llvm.x86.sse.sub.ss( <4 x float> %tmp12, <4 x float> < float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
widen_cast-4.ll 41 %tmp12 = load <8 x i8>*, <8 x i8>** %src ; <<8 x i8>*> [#uses=1]
42 %arrayidx13 = getelementptr <8 x i8>, <8 x i8>* %tmp12, i32 %tmp11 ; <<8 x i8>*> [#uses=1]
  /external/llvm/test/Transforms/InstCombine/
2007-02-01-LoadSinkAlloca.ll 31 %tmp12 = call i32 (...) @baq( ) ; <i32> [#uses=0]
  /external/llvm/test/Transforms/ObjCARC/
escape.ll 55 %tmp12 = bitcast i8* %tmp11 to i8**
56 %tmp13 = load i8*, i8** %tmp12, align 8
110 %tmp12 = bitcast i8* %tmp11 to i8**
111 %tmp13 = load i8*, i8** %tmp12, align 8
  /external/llvm/test/CodeGen/AArch64/
arm64-andCmpBrToTBZ.ll 33 %tmp12 = and i8 %tmp11, 2
34 %tmp13 = icmp ne i8 %tmp12, 0
arm64-prefetch.ll 72 %tmp12 = load i32*, i32** @a, align 8, !tbaa !3
73 %arrayidx15 = getelementptr inbounds i32, i32* %tmp12, i64 %idxprom
  /external/llvm/test/CodeGen/ARM/
2007-05-22-tailmerge-3.ll 34 %tmp12 = zext i1 %tmp1 to i8 ; <i8> [#uses=1]
35 %toBool = icmp ne i8 %tmp12, 0 ; <i1> [#uses=1]
2012-01-24-RegSequenceLiveRange.ll 21 %tmp12 = shufflevector <2 x i64> %tmp11, <2 x i64> undef, <1 x i32> zeroinitializer
22 %tmp13 = bitcast <1 x i64> %tmp12 to <2 x float>
crash.ll 39 %tmp12 = fadd <4 x float> undef, %tmp11
40 %tmp13 = bitcast <4 x float> %tmp12 to i128
  /external/llvm/test/CodeGen/R600/
llvm.SI.load.dword.ll 22 %tmp12 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %tmp10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 1, i32 0)
23 %tmp13 = bitcast i32 %tmp12 to float
subreg-coalescer-crash.ll 72 %tmp12 = extractelement <4 x float> %tmp10, i32 3
79 %tmp15 = phi float [ %tmp12, %bb9 ], [ undef, %bb27 ], [ 0.000000e+00, %bb24 ]
  /external/llvm/test/CodeGen/Thumb2/
2010-03-15-AsmCCClobber.ll 25 %tmp12 = getelementptr inbounds %s1, %s1* %this, i32 0, i32 1
26 store i32 %levels, i32* %tmp12, align 4
thumb2-ifcvt1.ll 16 %tmp12 = add i32 %a, 1
17 %tmp1518 = add i32 %tmp12, %b
thumb2-ifcvt2.ll 46 %tmp12 = load %struct.quad_struct*, %struct.quad_struct** null ; <%struct.quad_struct*> [#uses=1]
50 %tmp29 = icmp eq %struct.quad_struct* %tmp12, null ; <i1> [#uses=1]

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