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  /external/clang/test/CXX/over/over.over/
p4.cpp 7 int (*fp0)(int) = f0;
18 int (*fp0)(int) = f0; // expected-error{{address of overloaded function 'f0' is ambiguous}}
  /external/llvm/test/CodeGen/PowerPC/
2006-08-11-RetVector.ll 4 define <4 x float> @func(<4 x float> %fp0, <4 x float> %fp1) {
5 %tmp76 = shufflevector <4 x float> %fp0, <4 x float> %fp1, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>> [#uses=1]
  /external/llvm/test/CodeGen/X86/
2010-05-12-FastAllocKills.ll 11 ; FP_REG_KILL %FP0<imp-def>, %FP1<imp-def>, %FP2<imp-def>, %FP3<imp-def>, %FP4<imp-def>, %FP5<imp-def>, %FP6<imp-def>
15 ; The X86FP pass needs good kill flags, like on %FP0 representing %reg1034:
18 ; %FP0<def> = LD_Fp80m <fi#3>, 1, %reg0, 0, %reg0; mem:LD10[FixedStack3](align=4)
19 ; %FP1<def> = MOV_Fp8080 %FP0<kill>
21 ; %FP0<def> = MOV_Fp8080 %FP2
22 ; ST_FpP80m <fi#3>, 1, %reg0, 0, %reg0, %FP0<kill>; mem:ST10[FixedStack3](align=4)
25 ; FP_REG_KILL %FP0<imp-def>, %FP1<imp-def>, %FP2<imp-def>, %FP3<imp-def>, %FP4<imp-def>, %FP5<imp-def>, %FP6<imp-def>
fp-stack-O0-crash.ll 33 ; This produces a FP0 = IMPLICIT_DEF instruction.
inline-asm-fpstack.ll 351 ; %FP0<def> = COPY %ST0
  /external/clang/test/Sema/
attr-noreturn.c 3 static void (*fp0)(void) __attribute__((noreturn)); variable
attr-unused.c 3 static void (*fp0)(void) __attribute__((unused)); variable
  /external/strace/linux/alpha/
userent.h 33 { 32, "fp0" },
  /external/lz4/examples/
blockStreaming_doubleBuffer.c 108 int compare(FILE* fp0, FILE* fp1)
115 const size_t r0 = read_bin(fp0, b0, sizeof(b0));
  /external/llvm/lib/Target/X86/
X86FloatingPoint.cpp 96 // Bit mask of live FP registers. Bit 0 = FP0, bit 1 = FP1, &c.
126 if (Reg < X86::FP0 || Reg > X86::FP6)
128 Mask |= 1 << (Reg - X86::FP0);
150 // The first entries correspond to FP0-FP6, the rest are scratch registers
291 assert(Reg >= X86::FP0 && Reg <= X86::FP6 && "Expected FP register!");
292 return Reg - X86::FP0;
303 static_assert(X86::FP6 == X86::FP0+6, "Register enums aren't sorted right!");
305 if (MF.getRegInfo().isPhysRegUsed(X86::FP0+i)) {
425 if (Reg >= X86::FP0 && Reg <= X86::FP6 && isLive(Reg-X86::FP0)) {
    [all...]
X86CallingConv.td 64 // Long double types are always returned in FP0 (even with SSE).
65 CCIfType<[f80], CCAssignToReg<[FP0, FP1]>>
70 // The X86-32 calling convention returns FP values in FP0, unless marked
77 CCIfType<[f32,f64], CCAssignToReg<[FP0, FP1]>>,
X86RegisterInfo.td 162 def FP0 : X86Reg<"fp0", 0>;
  /external/clang/test/SemaTemplate/
temp_arg_nontype.cpp 119 extern FuncPtr0<&func0> *fp0;
121 extern FuncPtr0<&func0> *fp0;
123 extern FuncPtr0<&func0> *fp0;
  /external/lldb/tools/debugserver/source/MacOSX/ppc/
DNBArchImpl.cpp 305 { "fp0" , IEEE754, 8, Float },
500 if (reg < 33) // FP0 - FP31 and VSCR
  /external/llvm/docs/TableGen/
index.rst 64 ECX, EDI, EDX, EFLAGS, EIP, ESI, ESP, FP0, FP1, FP2, FP3, FP4, FP5, FP6, IP,
  /prebuilts/gcc/darwin-x86/x86/x86_64-linux-android-4.9/lib/gcc/x86_64-linux-android/4.9/include/
emmintrin.h 52 #define _MM_SHUFFLE2(fp1,fp0) \
53 (((fp1) << 1) | (fp0))
    [all...]
xmmintrin.h 75 #define _MM_SHUFFLE(fp3,fp2,fp1,fp0) \
76 (((fp3) << 6) | ((fp2) << 4) | ((fp1) << 2) | (fp0))
    [all...]
  /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/lib/gcc/x86_64-linux/4.8/include/
emmintrin.h 50 #define _MM_SHUFFLE2(fp1,fp0) \
51 (((fp1) << 1) | (fp0))
    [all...]
xmmintrin.h 48 #define _MM_SHUFFLE(fp3,fp2,fp1,fp0) \
49 (((fp3) << 6) | ((fp2) << 4) | ((fp1) << 2) | (fp0))
    [all...]
  /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/lib/gcc/x86_64-linux/4.8/include/
emmintrin.h 50 #define _MM_SHUFFLE2(fp1,fp0) \
51 (((fp1) << 1) | (fp0))
    [all...]
xmmintrin.h 48 #define _MM_SHUFFLE(fp3,fp2,fp1,fp0) \
49 (((fp3) << 6) | ((fp2) << 4) | ((fp1) << 2) | (fp0))
    [all...]
  /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/lib/gcc/x86_64-w64-mingw32/4.8.3/include/
emmintrin.h 50 #define _MM_SHUFFLE2(fp1,fp0) \
51 (((fp1) << 1) | (fp0))
    [all...]
xmmintrin.h 48 #define _MM_SHUFFLE(fp3,fp2,fp1,fp0) \
49 (((fp3) << 6) | ((fp2) << 4) | ((fp1) << 2) | (fp0))
    [all...]
  /prebuilts/gcc/linux-x86/x86/x86_64-linux-android-4.9/lib/gcc/x86_64-linux-android/4.9/include/
emmintrin.h 52 #define _MM_SHUFFLE2(fp1,fp0) \
53 (((fp1) << 1) | (fp0))
    [all...]
xmmintrin.h 75 #define _MM_SHUFFLE(fp3,fp2,fp1,fp0) \
76 (((fp3) << 6) | ((fp2) << 4) | ((fp1) << 2) | (fp0))
    [all...]

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