| /external/mesa3d/src/mesa/program/ |
| prog_instruction.c | 34 * Initialize program instruction fields to defaults.
35 * \param inst first instruction to initialize
67 * \return pointer to instruction memory
83 * \param numNewInst desired size of new instruction array.
84 * \return pointer to start of new instruction array.
140 * Basic info about each instruction
151 * Instruction info
254 * Return the number of src registers for the given instruction/opcode.
267 * Return the number of dst registers for the given instruction/opcode.
300 * The second instruction will have the wrong value for t0 if executed as-is
[all...] |
| /external/proguard/src/proguard/optimize/info/ |
| SideEffectInstructionChecker.java | 27 import proguard.classfile.instruction.*;
28 import proguard.classfile.instruction.visitor.InstructionVisitor;
35 * This class can tell whether an instruction has any side effects outside of
79 * Returns whether the given instruction has side effects outside of its
86 Instruction instruction)
90 instruction.accept(clazz, method, codeAttribute, offset, this);
98 public void visitAnyInstruction(Clazz clazz, Method method, CodeAttribute codeAttribute, int offset, Instruction instruction) {}
166 // This instruction may have a side effect
[all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineCompares.cpp | 116 /// isSignBitCheck - Given an exploded icmp instruction, return true if the
229 Instruction *InstCombiner::
605 /// FoldGEPICmp - Fold comparisons between a GEP instruction and something
607 Instruction *InstCombiner::FoldGEPICmp(GEPOperator *GEPLHS, Value *RHS,
609 Instruction &I) {
741 Instruction *InstCombiner::FoldICmpAddOpCst(Instruction &ICI,
790 Instruction *InstCombiner::FoldICmpDivCst(ICmpInst &ICI, BinaryOperator *DivI,
[all...] |
| /external/llvm/lib/Transforms/Utils/ |
| SimplifyCFG.cpp | 174 Instruction *Cond,
223 /// given instruction, which is assumed to be safe to speculate. TCC_Free means
229 "Instruction is not safe to speculatively execute!");
238 /// see if V (which must be an instruction) and its recursive operands
240 /// are non-trapping. If both are true, the instruction is inserted into the
250 SmallPtrSetImpl<Instruction*> *AggressiveInsts,
253 Instruction *I = dyn_cast<Instruction>(V);
268 // If this instruction is defined in a block that contains an unconditional
279 // If we have seen this instruction before, don't count it again
[all...] |
| /dalvik/dexgen/src/com/android/dexgen/dex/code/ |
| RopTranslator.java | 130 * objects per basic block (to the first and last instruction,
139 * extra instruction per block (for the locals state at the
252 * Choose and append an output instruction for each original
253 * instruction.
439 * given rop instruction. For insns that are commutative, have
443 * @param insn {@code non-null;} instruction in question
444 * @return {@code non-null;} the instruction's complete register list
452 * given rop instruction. For insns that are commutative, have
456 * @param insn {@code non-null;} instruction in question
458 * @return {@code non-null;} the instruction's complete register lis
[all...] |
| DalvInsn.java | 46 * Makes a move instruction, appropriate and ideal for the given arguments.
80 * <p><b>Note:</b> In the unlikely event that an instruction takes
143 * Gets whether the address of this instruction is known.
153 * Gets the output address of this instruction, if it is known. This throws
187 * Gets the register list for this instruction.
207 * Gets the minimum distinct registers required for this instruction.
229 * Gets the instruction prefix required, if any, to use in a high
253 * Gets the instruction suffix required, if any, to use in a high
270 * Gets the instruction that is equivalent to this one, except that
289 * Gets the short identifier for this instruction. This is it
[all...] |
| /external/dexmaker/src/dx/java/com/android/dx/dex/code/ |
| RopTranslator.java | 136 * objects per basic block (to the first and last instruction,
145 * extra instruction per block (for the locals state at the
259 * Choose and append an output instruction for each original
260 * instruction.
446 * given rop instruction. For insns that are commutative, have
450 * @param insn {@code non-null;} instruction in question
451 * @return {@code non-null;} the instruction's complete register list
459 * given rop instruction. For insns that are commutative, have
463 * @param insn {@code non-null;} instruction in question
465 * @return {@code non-null;} the instruction's complete register lis
[all...] |
| /external/llvm/docs/ |
| WritingAnLLVMBackend.rst | 30 characteristics, such as a RISC instruction set and straightforward calling
50 descriptions of code generation stages: Instruction Selection, Scheduling and
65 reference. For details about the ARM instruction set, refer to the `ARM
92 * Describe the instruction set of the target. Use TableGen to generate code
104 DAG-to-DAG instruction selection. Also write code in ``XXXISelLowering.cpp``
186 methods are named ``get*Info``, and are intended to obtain the instruction set
327 same way for some instruction. Typical examples are register classes for
329 instruction to use any register in a specified register class to perform the
330 instruction in a similar manner. Register classes allocate virtual registers
493 // default value 1 means a single instruction
[all...] |
| /external/llvm/lib/Analysis/ |
| ScalarEvolutionExpander.cpp | 37 Instruction::CastOps Op,
50 Instruction *Ret = nullptr;
79 // instruction with different dominance properties than a cast
91 Instruction::CastOps Op = CastInst::getCastOpcode(V, false, Ty, false);
92 assert((Op == Instruction::BitCast ||
93 Op == Instruction::PtrToInt ||
94 Op == Instruction::IntToPtr) &&
100 if (Op == Instruction::BitCast) {
109 if ((Op == Instruction::PtrToInt || Op == Instruction::IntToPtr) &
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineInstrBuilder.h | 51 /// Create a MachineInstrBuilder for manipulating an existing instruction.
55 /// Allow automatic conversion to the machine instruction we are working on.
232 /// BuildMI - Builder interface. Specify how to create the initial instruction
253 /// instruction before the given position in the given MachineBasicBlock, and
293 /// instruction before the given position in the given MachineBasicBlock, and
330 /// instruction at the end of the given MachineBasicBlock, and does NOT take a
340 /// instruction at the end of the given MachineBasicBlock, and sets up the first
433 /// BB above the bundle or instruction at Pos.
452 /// Create an MIBundleBuilder representing an existing instruction or bundle
464 /// Return an iterator to the first bundled instruction
[all...] |
| /external/llvm/include/llvm/IR/ |
| CallSite.h | 42 typename InstrTy = const Instruction,
57 /// will create an appropriate call site for a Call or Invoke instruction, but
63 if (II->getOpcode() == Instruction::Call)
65 else if (II->getOpcode() == Instruction::Invoke)
73 /// it also could signify a NULL Instruction pointer.
87 assert(getInstruction() && "Not a call or invoke instruction!");
101 assert(getInstruction() && "Not a call or invoke instruction!");
120 assert(getInstruction() && "Not a call or invoke instruction!");
134 assert(getInstruction() && "Not a call or invoke instruction!");
147 assert(getInstruction() && "Not a call or invoke instruction!");
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXGenericToNVVM.cpp | 311 // If any of the operands has been modified, construct the instruction with
315 case Instruction::ICmp:
319 case Instruction::FCmp:
324 case Instruction::ExtractElement:
327 case Instruction::InsertElement:
331 case Instruction::ShuffleVector:
335 case Instruction::ExtractValue:
338 case Instruction::InsertValue:
342 case Instruction::GetElementPtr:
353 case Instruction::Select
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcInstrAliases.td | 1 //===-- SparcInstrAliases.td - Instruction Aliases for Sparc Target -------===//
10 // This file contains instruction aliases for Sparc.
13 // Instruction aliases for conditional moves.
17 Instruction movrr, Instruction movri,
18 Instruction fmovs, Instruction fmovd> {
43 Instruction movrr, Instruction movri,
44 Instruction fmovs, Instruction fmovd>
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| JumpThreading.cpp | 130 Instruction *CxtI = nullptr);
133 Instruction *CxtI = nullptr);
206 // If the terminator is the only non-phi instruction, try to nuke it.
247 // Sum up the cost of each instruction until we get to the terminator. Don't
346 Instruction *CxtI) {
366 // If V is a non-instruction value, or an instruction in a different block,
368 Instruction *I = dyn_cast<Instruction>(V);
379 // "I" is a non-local compare-with-a-constant instruction. This would b
[all...] |
| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| tgsi_sanity.c | 317 if (inst->Instruction.Opcode == TGSI_OPCODE_END) {
324 info = tgsi_get_opcode_info( inst->Instruction.Opcode );
326 report_error( ctx, "(%u): Invalid instruction opcode", inst->Instruction.Opcode );
330 if (info->num_dst != inst->Instruction.NumDstRegs) {
333 if (info->num_src != inst->Instruction.NumSrcRegs) {
340 for (i = 0; i < inst->Instruction.NumDstRegs; i++) {
351 for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
399 /* No declarations allowed after the first instruction.
402 report_error( ctx, "Instruction expected but declaration found" )
[all...] |
| /external/mesa3d/src/gallium/auxiliary/util/ |
| u_pstipple.c | 248 * TGSI instruction transform callback.
249 * Before the first instruction, insert our new code to sample the
268 /* emit our new declarations before the first instruction */
358 newInst.Instruction.Opcode = TGSI_OPCODE_MUL;
359 newInst.Instruction.NumDstRegs = 1;
362 newInst.Instruction.NumSrcRegs = 2;
371 newInst.Instruction.Opcode = TGSI_OPCODE_TEX;
372 newInst.Instruction.NumDstRegs = 1;
375 newInst.Instruction.NumSrcRegs = 2;
376 newInst.Instruction.Texture = TRUE
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| FastISel.cpp | 12 // "Fast" instruction selection is designed to emit very poor code quickly.
20 // "Fast" instruction selection is able to fail gracefully and transfer
25 // The intended use for "fast" instruction selection is "-O0" mode
30 // time. Despite its limitations, "fast" instruction selection is able to
35 // the same instruction descriptions that the SelectionDAG selector reads,
99 // contains labels or copies, use the last instruction as the last local
136 const Instruction *I = dyn_cast<Instruction>(V);
147 // FastISel might fold the use into another instruction and now there is more
148 // than one use at the Machine Instruction level
[all...] |
| /cts/tools/dasm/src/dasm/ |
| DAsm.java | 144 * method is called, it checks if there was a jump to current instruction
535 throwDasmError("Missing arguments for instruction " + name);
554 throwDasmError("Bad arguments for instruction " + name + "("
576 throwDasmError("Bad arguments for instruction " + name + "(" + val
592 throwDasmError("Bad arguments for instruction " + name + "("
609 throwDasmError("Bad arguments for instruction " + name + "(" + val
632 throwDasmError("Bad arguments for instruction " + name + "("
639 throwDasmError("Bad arguments for instruction " + name + "("
656 throwDasmError("Bad arguments for instruction " + name + "("
679 throwDasmError("Bad arguments for instruction " + name + "(
[all...] |
| /art/compiler/dex/quick/x86/ |
| quick_assemble_x86_test.cc | 196 Instruction::Code opcode,
225 static_cast<Instruction::Code>(kMirOpPackedAddition),
229 static_cast<Instruction::Code>(kMirOpPackedAddition),
236 static_cast<Instruction::Code>(kMirOpPackedSubtract),
240 static_cast<Instruction::Code>(kMirOpPackedSubtract),
247 static_cast<Instruction::Code>(kMirOpPackedMultiply),
251 static_cast<Instruction::Code>(kMirOpPackedMultiply),
|
| /dalvik/dexgen/src/com/android/dexgen/rop/code/ |
| LocalVariableInfo.java | 173 * Adds an assignment association for the given instruction and
174 * register spec. This throws an exception if the instruction
177 * <b>Note:</b> Although the instruction contains its own spec for
180 * simple type and the one in the instruction can be an arbitrary
183 * @param insn {@code non-null;} the instruction in question
201 * Gets the named register being assigned by the given instruction, if
204 * @param insn {@code non-null;} instruction in question
|
| /dalvik/dx/src/com/android/dx/rop/code/ |
| LocalVariableInfo.java | 176 * Adds an assignment association for the given instruction and
177 * register spec. This throws an exception if the instruction
180 * <b>Note:</b> Although the instruction contains its own spec for
183 * simple type and the one in the instruction can be an arbitrary
186 * @param insn {@code non-null;} the instruction in question
204 * Gets the named register being assigned by the given instruction, if
207 * @param insn {@code non-null;} instruction in question
|
| /dalvik/dx/src/com/android/dx/ssa/ |
| LocalVariableInfo.java | 173 * Adds an assignment association for the given instruction and
174 * register spec. This throws an exception if the instruction
177 * <b>Note:</b> Although the instruction contains its own spec for
180 * simple type and the one in the instruction can be an arbitrary
183 * @param insn {@code non-null;} the instruction in question
201 * Gets the named register being assigned by the given instruction, if
204 * @param insn {@code non-null;} instruction in question
|
| /external/dexmaker/src/dx/java/com/android/dx/rop/code/ |
| LocalVariableInfo.java | 177 * Adds an assignment association for the given instruction and
178 * register spec. This throws an exception if the instruction
181 * <b>Note:</b> Although the instruction contains its own spec for
184 * simple type and the one in the instruction can be an arbitrary
187 * @param insn {@code non-null;} the instruction in question
205 * Gets the named register being assigned by the given instruction, if
208 * @param insn {@code non-null;} instruction in question
|
| /external/dexmaker/src/dx/java/com/android/dx/ssa/ |
| LocalVariableInfo.java | 174 * Adds an assignment association for the given instruction and
175 * register spec. This throws an exception if the instruction
178 * <b>Note:</b> Although the instruction contains its own spec for
181 * simple type and the one in the instruction can be an arbitrary
184 * @param insn {@code non-null;} the instruction in question
202 * Gets the named register being assigned by the given instruction, if
205 * @param insn {@code non-null;} instruction in question
|
| /external/llvm/lib/CodeGen/ |
| DeadMachineInstructionElim.cpp | 82 // This def has a non-debug use. Don't delete the instruction!
88 // If there are no defs with uses, the instruction is dead.
126 // If the instruction is dead, delete it!
130 // instruction. They get marked as undef and will be deleted
136 // MII is now pointing to the next instruction to process,
160 // both defined and used in the same instruction.
172 // We didn't delete the current instruction, so increment MII to
|
