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  /external/llvm/test/CodeGen/PowerPC/
div-e-all.ll 8 %0 = call i32 @llvm.ppc.divwe(i32 32, i32 16)
14 declare i32 @llvm.ppc.divwe(i32, i32) #1
19 %0 = call i32 @llvm.ppc.divweu(i32 32, i32 16)
25 declare i32 @llvm.ppc.divweu(i32, i32) #1
30 %0 = call i64 @llvm.ppc.divde(i64 32, i64 16)
36 declare i64 @llvm.ppc.divde(i64, i64) #1
41 %0 = call i64 @llvm.ppc.divdeu(i64 32, i64 16)
47 declare i64 @llvm.ppc.divdeu(i64, i64) #1
vec_minmax.ll 5 declare <2 x i64> @llvm.ppc.altivec.vmaxsd(<2 x i64>, <2 x i64>) nounwind readnone
6 declare <2 x i64> @llvm.ppc.altivec.vmaxud(<2 x i64>, <2 x i64>) nounwind readnone
7 declare <2 x i64> @llvm.ppc.altivec.vminsd(<2 x i64>, <2 x i64>) nounwind readnone
8 declare <2 x i64> @llvm.ppc.altivec.vminud(<2 x i64>, <2 x i64>) nounwind readnone
11 %tmp = tail call <2 x i64> @llvm.ppc.altivec.vmaxsd(<2 x i64> %x, <2 x i64> %y)
17 %tmp = tail call <2 x i64> @llvm.ppc.altivec.vmaxud(<2 x i64> %x, <2 x i64> %y)
23 %tmp = tail call <2 x i64> @llvm.ppc.altivec.vminsd(<2 x i64> %x, <2 x i64> %y)
29 %tmp = tail call <2 x i64> @llvm.ppc.altivec.vminud(<2 x i64> %x, <2 x i64> %y)
div-e-32.ll 7 %0 = call i32 @llvm.ppc.divwe(i32 32, i32 16)
13 declare i32 @llvm.ppc.divwe(i32, i32) #1
18 %0 = call i32 @llvm.ppc.divweu(i32 32, i32 16)
24 declare i32 @llvm.ppc.divweu(i32, i32) #1
vsx-minmax.ll 23 %2 = tail call <4 x float> @llvm.ppc.vsx.xvmaxsp(<4 x float> %0, <4 x float> %1)
27 %4 = tail call <2 x double> @llvm.ppc.vsx.xvmaxdp(<2 x double> %3, <2 x double> %3)
32 %7 = tail call <4 x float> @llvm.ppc.vsx.xvmaxsp(<4 x float> %5, <4 x float> %6)
37 %10 = tail call <4 x float> @llvm.ppc.vsx.xvminsp(<4 x float> %8, <4 x float> %9)
41 %12 = tail call <2 x double> @llvm.ppc.vsx.xvmindp(<2 x double> %11, <2 x double> %11)
46 %15 = tail call <4 x float> @llvm.ppc.vsx.xvminsp(<4 x float> %13, <4 x float> %14)
50 %17 = tail call double @llvm.ppc.vsx.xsmaxdp(double %16, double %16)
53 %18 = tail call double @llvm.ppc.vsx.xsmindp(double %16, double %16)
60 declare double @llvm.ppc.vsx.xsmaxdp(double, double)
63 declare double @llvm.ppc.vsx.xsmindp(double, double
    [all...]
  /external/clang/test/CodeGen/
builtins-ppc-crypto.c 37 // CHECK @llvm.ppc.altivec.crypto.vpmsumb
46 // CHECK @llvm.ppc.altivec.crypto.vpmsumh
55 // CHECK @llvm.ppc.altivec.crypto.vpmsumw
64 // CHECK @llvm.ppc.altivec.crypto.vpmsumd
72 // CHECK: @llvm.ppc.altivec.crypto.vsbox
82 // CHECK: @llvm.ppc.altivec.crypto.vpermxor
92 // CHECK: @llvm.ppc.altivec.crypto.vpermxor
102 // CHECK: @llvm.ppc.altivec.crypto.vpermxor
112 // CHECK: @llvm.ppc.altivec.crypto.vpermxor
121 // CHECK: @llvm.ppc.altivec.crypto.vciphe
    [all...]
  /prebuilts/python/darwin-x86/2.7.5/lib/python2.7/test/
test__osx_support.py 123 'CFLAGS': '-fno-strict-aliasing -g -O3 -arch ppc -arch i386 ',
124 'LDFLAGS': '-arch ppc -arch i386 -g',
126 'BLDSHARED': 'gcc-test -bundle -arch ppc -arch i386 -g',
127 'LDSHARED': 'gcc-test -bundle -arch ppc -arch i386 '
133 'CFLAGS': '-fno-strict-aliasing -g -O3 -arch ppc -arch i386 ',
134 'LDFLAGS': '-arch ppc -arch i386 -g',
136 'BLDSHARED': 'clang -bundle -arch ppc -arch i386 -g',
137 'LDSHARED': 'clang -bundle -arch ppc -arch i386 '
156 'CFLAGS': '-fno-strict-aliasing -g -O3 -arch ppc -arch i386 ',
157 'LDFLAGS': '-arch ppc -arch i386 -g'
    [all...]
  /prebuilts/python/linux-x86/2.7.5/lib/python2.7/test/
test__osx_support.py 123 'CFLAGS': '-fno-strict-aliasing -g -O3 -arch ppc -arch i386 ',
124 'LDFLAGS': '-arch ppc -arch i386 -g',
126 'BLDSHARED': 'gcc-test -bundle -arch ppc -arch i386 -g',
127 'LDSHARED': 'gcc-test -bundle -arch ppc -arch i386 '
133 'CFLAGS': '-fno-strict-aliasing -g -O3 -arch ppc -arch i386 ',
134 'LDFLAGS': '-arch ppc -arch i386 -g',
136 'BLDSHARED': 'clang -bundle -arch ppc -arch i386 -g',
137 'LDSHARED': 'clang -bundle -arch ppc -arch i386 '
156 'CFLAGS': '-fno-strict-aliasing -g -O3 -arch ppc -arch i386 ',
157 'LDFLAGS': '-arch ppc -arch i386 -g'
    [all...]
  /external/llvm/test/tools/llvm-readobj/
sections.test 11 RUN: llvm-readobj -s %p/Inputs/trivial.obj.macho-ppc \
12 RUN: | FileCheck %s -check-prefix MACHO-PPC
194 MACHO-PPC: Sections [
195 MACHO-PPC-NEXT: Section {
196 MACHO-PPC-NEXT: Index: 0
197 MACHO-PPC-NEXT: Name: __text (5F 5F 74 65 78 74 00 00 00 00 00 00 00 00 00 00)
198 MACHO-PPC-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00)
199 MACHO-PPC-NEXT: Address: 0x0
200 MACHO-PPC-NEXT: Size: 0x3C
201 MACHO-PPC-NEXT: Offset: 52
    [all...]
sections-ext.test 9 RUN: llvm-readobj -s -st -sr -sd %p/Inputs/trivial.obj.macho-ppc \
10 RUN: | FileCheck %s -check-prefix MACHO-PPC
282 MACHO-PPC: Sections [
283 MACHO-PPC-NEXT: Section {
284 MACHO-PPC-NEXT: Index: 0
285 MACHO-PPC-NEXT: Name: __text (5F 5F 74 65 78 74 00 00 00 00 00 00 00 00 00 00)
286 MACHO-PPC-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00)
287 MACHO-PPC-NEXT: Address: 0x0
288 MACHO-PPC-NEXT: Size: 0x3C
289 MACHO-PPC-NEXT: Offset: 52
    [all...]
  /external/llvm/lib/Target/PowerPC/
PPCFastISel.cpp 16 #include "PPC.h"
148 return MRI.getRegClass(Register)->getID() == PPC::VSFRCRegClassID;
154 unsigned FP64LoadOpc = PPC::LFD);
207 static Optional<PPC::Predicate> getComparePred(CmpInst::Predicate Pred) {
219 return Optional<PPC::Predicate>();
223 return PPC::PRED_EQ;
228 return PPC::PRED_GT;
233 return PPC::PRED_GE;
238 return PPC::PRED_LT;
243 return PPC::PRED_LE
    [all...]
PPCBranchSelector.cpp 18 #include "PPC.h"
29 #define DEBUG_TYPE "ppc-branch-select"
56 INITIALIZE_PASS(PPCBSel, "ppc-branch-select", "PowerPC Branch Selector",
143 if (I->getOpcode() == PPC::BCC && !I->getOperand(2).isImm())
145 else if ((I->getOpcode() == PPC::BC || I->getOpcode() == PPC::BCn) &&
148 else if ((I->getOpcode() == PPC::BDNZ8 || I->getOpcode() == PPC::BDNZ ||
149 I->getOpcode() == PPC::BDZ8 || I->getOpcode() == PPC::BDZ) &
    [all...]
PPCISelDAGToDAG.cpp 1 //===-- PPCISelDAGToDAG.cpp - PPC --pattern matching inst selector --------===//
11 // converting from a legalized dag to a PPC dag.
15 #include "PPC.h"
39 #define DEBUG_TYPE "ppc-codegen"
42 cl::opt<bool> ANDIGlueBug("expose-ppc-andi-glue-bug",
43 cl::desc("expose the ANDI glue bug on PPC"), cl::Hidden);
46 UseBitPermRewriter("ppc-use-bit-perm-rewriter", cl::init(true),
47 cl::desc("use aggressive ppc isel for bit permutations"),
50 "ppc-bit-perm-rewriter-stress-rotates",
51 cl::desc("stress rotate selection in aggressive ppc isel for
    [all...]
PPCHazardRecognizers.cpp 15 #include "PPC.h"
68 if (!PredMCID || PredMCID->getSchedClass() != PPC::Sched::IIC_SprMTSPR)
83 namespace llvm { namespace PPC { extern int getNonRecordFormOpcode(uint16_t); } }
97 case PPC::Sched::IIC_IntDivW:
98 case PPC::Sched::IIC_IntDivD:
99 case PPC::Sched::IIC_LdStLoadUpd:
100 case PPC::Sched::IIC_LdStLDU:
101 case PPC::Sched::IIC_LdStLFDU:
102 case PPC::Sched::IIC_LdStLFDUX:
103 case PPC::Sched::IIC_LdStLHA
    [all...]
PPCAsmPrinter.cpp 19 #include "PPC.h"
116 return "Linux PPC Assembly Printer";
137 return "Darwin PPC Assembly Printer";
252 break; // PPC never has a prefix.
346 MII->getOpcode() == PPC::DBG_VALUE ||
356 EmitToStreamer(OutStreamer, MCInstBuilder(PPC::NOP));
374 EmitToStreamer(OutStreamer, MCInstBuilder(PPC::LI8)
377 EmitToStreamer(OutStreamer, MCInstBuilder(PPC::RLDIC)
381 EmitToStreamer(OutStreamer, MCInstBuilder(PPC::ORIS8)
385 EmitToStreamer(OutStreamer, MCInstBuilder(PPC::ORI8
    [all...]
PPCVSXCopy.cpp 18 #include "PPC.h"
39 #define DEBUG_TYPE "ppc-vsx-copy"
69 return IsRegInClass(Reg, &PPC::VSRCRegClass, MRI);
73 return IsRegInClass(Reg, &PPC::VRRCRegClass, MRI);
77 return IsRegInClass(Reg, &PPC::F8RCRegClass, MRI);
100 IsVRReg(SrcMO.getReg(), MRI) ? &PPC::VSHRCRegClass :
101 &PPC::VSLRCRegClass;
112 .addImm(IsVRReg(SrcMO.getReg(), MRI) ? PPC::sub_128 :
113 PPC::sub_64);
123 IsVRReg(DstMO.getReg(), MRI) ? &PPC::VSHRCRegClass
    [all...]
  /external/llvm/lib/Target/PowerPC/MCTargetDesc/
PPCAsmBackend.cpp 1 //===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===//
35 case PPC::fixup_ppc_nofixup:
37 case PPC::fixup_ppc_brcond14:
38 case PPC::fixup_ppc_brcond14abs:
40 case PPC::fixup_ppc_br24:
41 case PPC::fixup_ppc_br24abs:
43 case PPC::fixup_ppc_half16:
45 case PPC::fixup_ppc_half16ds:
57 case PPC::fixup_ppc_half16:
58 case PPC::fixup_ppc_half16ds
    [all...]
PPCMCTargetDesc.h 17 // GCC #defines PPC on Linux but we use it as our namespace name
18 #undef PPC
47 /// Construct an PPC ELF object writer.
50 /// Construct a PPC Mach-O object writer.
85 // Generated files will use "namespace PPC". To avoid symbol clash,
86 // undefine PPC here. PPC may be predefined on some hosts.
87 #undef PPC
PPCPredicates.h 1 //===-- PPCPredicates.h - PPC Branch Predicate Information ------*- C++ -*-===//
17 // GCC #defines PPC on Linux but we use it as our namespace name
18 #undef PPC
20 // Generated files will use "namespace PPC". To avoid symbol clash,
21 // undefine PPC here. PPC may be predefined on some hosts.
22 #undef PPC
25 namespace PPC {
  /external/libpng/scripts/
smakefile.ppc 2 # makefile for libpng and SAS C V6.58/7.00 PPC compiler
13 AR = ppc-amigaos-ar
15 RANLIB = ppc-amigaos-ranlib
18 LN = ppc-amigaos-ld
  /external/valgrind/memcheck/tests/vbit-test/
TODO 8 (4) Iop_CmpORD32U and friends are not supported (ppc only)
  /external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/org.eclipse.pde.build_3.6.1.R36x_v20100823/templates/packager/
packaging.properties 17 root.macosx.carbon.ppc.permissions.755=Eclipse.app/Contents/MacOS/eclipse
23 root.linux.gtk.ppc=eclipse
24 root.macosx.carbon.ppc=eclipse,Eclipse.app/
25 root.macosx.carbon.ppc.link=Eclipse.app/Contents/MacOS/eclipse,eclipse,../../../MacOS,Eclipse.app/Contents/Resources/Splash.app/Contents/MacOS
26 root.aix.motif.ppc=eclipse
  /external/llvm/test/Transforms/InstCombine/
aligned-altivec.ll 5 declare <4 x i32> @llvm.ppc.altivec.lvx(i8*) #1
11 %vl = call <4 x i32> @llvm.ppc.altivec.lvx(i8* %hv)
14 ; CHECK: @llvm.ppc.altivec.lvx
26 %vl = call <4 x i32> @llvm.ppc.altivec.lvx(i8* %hv)
29 ; CHECK-NOT: @llvm.ppc.altivec.lvx
37 declare void @llvm.ppc.altivec.stvx(<4 x i32>, i8*) #0
43 call void @llvm.ppc.altivec.stvx(<4 x i32> %d, i8* %hv)
49 ; CHECK: @llvm.ppc.altivec.stvx
57 call void @llvm.ppc.altivec.stvx(<4 x i32> %d, i8* %hv)
63 ; CHECK-NOT: @llvm.ppc.altivec.stv
    [all...]
  /external/google-breakpad/src/processor/
stackwalker_ppc.h 30 // stackwalker_ppc.h: ppc-specific stackwalker.
32 // Provides stack frames given ppc register context and a memory region
33 // corresponding to a ppc stack.
52 // context is a ppc context object that gives access to ppc-specific
63 // Implementation of Stackwalker, using ppc context (stack pointer in %r1,
  /external/clang/test/Preprocessor/
stdint.c 744 // RUN: %clang_cc1 -E -ffreestanding -triple=powerpc-none-none %s | FileCheck -check-prefix PPC %s
747 // PPC:typedef long long int int64_t;
748 // PPC:typedef long long unsigned int uint64_t;
749 // PPC:typedef int64_t int_least64_t;
750 // PPC:typedef uint64_t uint_least64_t;
751 // PPC:typedef int64_t int_fast64_t;
752 // PPC:typedef uint64_t uint_fast64_t;
754 // PPC:typedef int int32_t;
755 // PPC:typedef unsigned int uint32_t;
756 // PPC:typedef int32_t int_least32_t
    [all...]
  /external/clang/test/Tooling/
ms-asm-no-target.cpp 2 // RUN: not clang-check "%s" -- -fasm-blocks -target powerpc-apple-darwin10 2>&1 | FileCheck -check-prefix=CHECK-PPC %s
13 // CHECK-PPC: error: Unsupported architecture 'powerpc' for MS-style inline assembly

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