/external/v8/src/mips/ |
lithium-gap-resolver-mips.cc | 79 // offsets (more than 1K or 4K) require us to spill this spilled value to
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/external/v8/src/mips64/ |
lithium-gap-resolver-mips64.cc | 79 // offsets (more than 1K or 4K) require us to spill this spilled value to
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/external/v8/src/x64/ |
regexp-macro-assembler-x64.h | 120 // stack (before the return address) to spill parameter registers. We
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/ndk/sources/cxx-stl/stlport/src/ |
lock_free_slist.h | 57 // The GCC version I'm using (3.4.1) won't temporarily spill it if it's
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/packages/apps/LegacyCamera/res/values-nb/ |
strings.xml | 37 <string name="review_play" msgid="6378271587740884696">"Spill av"</string>
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/art/compiler/utils/arm64/ |
assembler_arm64.cc | 734 ManagedRegisterSpill spill = entry_spills.at(i); local 735 offset += spill.getSize();
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/art/runtime/arch/ |
stub_test.cc | 132 // Spill x0-x7 which we say we don't clobber. May contain args. 266 // Spill a0-a3 and t0-t7 which we say we don't clobber. May contain args. 280 // Spill gp register since it is caller save. 335 // Spill a0-a7 which we say we don't clobber. May contain args. 485 // Spill x0-x7 which we say we don't clobber. May contain args. 618 // Spill a0-a3 and t0-t7 which we say we don't clobber. May contain args. 632 // Spill gp register since it is caller save. 689 // Spill a0-a7 which we say we don't clobber. May contain args. [all...] |
/external/libunwind/src/ia64/ |
unwind_i.h | 423 IA64_WHERE_SPILL_HOME, /* register is saved in its spill home */ 456 long spill_offset; /* psp-relative offset for spill base */
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/external/llvm/lib/CodeGen/ |
VirtRegMap.cpp | 14 // references by replacing them with physical register references - adding spill 45 STATISTIC(NumSpillSlots, "Number of spill slots allocated");
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/external/llvm/lib/Target/SystemZ/ |
SystemZFrameLowering.cpp | 137 // Scan the call-saved GPRs and find the bounds of the register spill area. 479 // Start with the size of the local variables and spill slots.
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/external/llvm/test/CodeGen/Hexagon/ |
circ_ldd_bug.ll | 15 ; would try to spill the CRRegs after running out of them. We don't have code to 16 ; spill CRRegs and the above assertion would be triggered.
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/external/llvm/test/CodeGen/SystemZ/ |
frame-15.ll | 26 ; emergency spill slots at 160(%r15), the amount that we need to allocate 274 ; Repeat f2 in a case that needs the emergency spill slots, because all
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spill-01.ll | 30 ; This function shouldn't spill anything 461 ; This used to generate a no-op MVC. It is very sensitive to spill heuristics.
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/external/llvm/test/CodeGen/X86/ |
ragreedy-hoist-spill.ll | 4 ; We make sure a spill is not hoisted to a hotter outer loop. 203 ; Make sure that we don't hoist the spill to outer loops.
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/external/mesa3d/src/gallium/drivers/nv50/codegen/ |
nv50_ir.h | 521 unsigned noSpill : 1; // do not spill (e.g. if spill temporary already)
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/external/v8/src/compiler/arm/ |
code-generator-arm.cc | 127 // The linkage computes where all spill slots are located. 675 // Remove this frame's spill slots first.
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/external/v8/src/compiler/arm64/ |
code-generator-arm64.cc | 109 // The linkage computes where all spill slots are located. 696 // Remove this frame's spill slots first.
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/external/v8/src/ |
lithium.cc | 256 // Local or spill slot. Skip the frame pointer, function, and 364 // spill slots.
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/prebuilts/python/darwin-x86/2.7.5/lib/python2.7/ |
pydoc.py | 737 def spill(msg, attrs, predicate): function in function:.docclass 1170 def spill(msg, attrs, predicate): function in function:TextDoc.docclass [all...] |
/prebuilts/python/linux-x86/2.7.5/lib/python2.7/ |
pydoc.py | 737 def spill(msg, attrs, predicate): function in function:.docclass 1170 def spill(msg, attrs, predicate): function in function:TextDoc.docclass [all...] |
/system/core/libpixelflinger/include/private/pixelflinger/ |
ggl_context.h | 488 int32_t spill[2]; member in struct:android::generated_tex_vars_t 501 int32_t spill[3]; member in struct:android::generated_vars_t
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/art/runtime/arch/arm64/ |
quick_entrypoints_arm64.S | 30 // Our registers aren't intermixed - just spill in order. 96 // Our registers aren't intermixed - just spill in order. 271 // Our registers aren't intermixed - just spill in order. 695 // Spill registers as per AACPS64 calling convention. 829 // Spill registers as per AACPS64 calling convention. [all...] |
/external/llvm/utils/TableGen/ |
CodeGenRegisters.cpp | 794 // 2. The RC spill size must not be smaller than our spill size. 795 // 3. RC spill alignment must be compatible with ours. 809 /// Register classes with the same registers, spill size, and alignment form a 819 // Order by ascending spill size. 825 // Order by ascending spill alignment. [all...] |
/art/compiler/dex/quick/ |
mir_to_lir.cc | 56 // Spill all args. 137 // TODO: REVISIT: This adds a spill of low part while we could just copy it. 187 // TODO: REVISIT: This adds a spill of low part while we could just copy it. [all...] |
/external/valgrind/VEX/pub/ |
libvex.h | 527 that is a spill area that LibVEX may spill into. It must have size 533 copies, and the spill area. In short, all 4 areas must have a [all...] |