| /external/llvm/lib/Target/PowerPC/ |
| README_ALTIVEC.txt | 4 registers, to generate better spill code.
|
| /external/llvm/lib/Target/X86/ |
| README.txt | 468 Leaf functions that require one 4-byte spill slot have a prolog like this:
596 This seems like a cross between remat and spill folding.
889 Since we 'know' that this is a 'neg', we can actually "fold" the spill into
1049 enough to warrant the spill.
[all...] |
| X86RegisterInfo.td | 423 // values, though they really are f80 values. This will cause us to spill
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| README-SSE.txt | 269 The basic idea is that a reload from a spill slot, can, if only one 4-byte
489 At that point we don't know, whether there will be vector spill, or not.
|
| /external/llvm/test/CodeGen/SystemZ/ |
| int-conv-11.ll | 5 ; Test a case where we spill the source of at least one LLCRMux. We want
|
| /external/llvm/test/CodeGen/X86/ |
| 2009-03-23-MultiUseSched.ll | 3 ; RUN: not grep spill %t
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| anyregcc.ll | 438 ; Make sure we don't spill any XMMs/YMMs
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| zlib-longest-match.ll | 21 ; CHECK-NOT: {{Spill|Reload}}
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| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_vec4_emit.cpp | 820 /* Debug of register spilling: Go spill everything. */
|
| brw_fs.cpp | 1027 * allocate and spill (due to contiguousness requirements for some
[all...] |
| /external/v8/src/ |
| objects-debug.cc | 1120 PrintF("\n JSObject Spill Statistics (#%d):\n", number_of_objects_);
[all...] |
| /external/valgrind/memcheck/tests/ |
| wrap6.c | 20 /* to spill is quite difficult, requiring v > 28 or so. */ \
|
| /packages/apps/Camera2/res/values-nb/ |
| strings.xml | 229 <string name="video_control_play" msgid="6895236811408921715">"Spill av videoen"</string>
[all...] |
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/lib/gcc/x86_64-w64-mingw32/4.8.3/plugin/include/ |
| cfgloop.h | 672 /* The cost for register when we need to spill. */
|
| /prebuilts/python/darwin-x86/2.7.5/lib/python2.7/test/decimaltestdata/ |
| remainderNear.decTest | 189 -- with spill...
|
| /prebuilts/python/linux-x86/2.7.5/lib/python2.7/test/decimaltestdata/ |
| remainderNear.decTest | 189 -- with spill...
|
| /external/llvm/docs/ |
| CodeGenerator.rst | 135 target. This phase introduces spill code and eliminates all virtual register
140 LLVM alloca's and spill slots), the prolog and epilog code for the function
146 machine code can go here, such as spill code scheduling and peephole
300 entry to the first location where function data (local variables, spill
[all...] |
| /external/compiler-rt/lib/tsan/rtl/ |
| tsan_interceptors.cc | [all...] |
| /external/llvm/lib/CodeGen/ |
| MachineVerifier.cpp | [all...] |
| TargetLoweringBase.cpp | [all...] |
| WinEHPrepare.cpp | 51 // spill locations as needed) to GEPs that get the variable from the
526 // If the mapped value isn't already an alloca, we need to spill it if it
[all...] |
| /art/compiler/dex/quick/arm/ |
| target_arm.cc | 641 * machinery is in place, always spill lr.
[all...] |
| /art/compiler/dex/quick/arm64/ |
| arm64_lir.h | 76 * | spill region | {variable sized - will include lr if non-leaf}
|
| target_arm64.cc | 666 * machinery is in place, always spill lr.
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| /art/compiler/dex/quick/mips/ |
| target_mips.cc | 513 * machinery is in place, always spill lr.
[all...] |
