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  /external/llvm/lib/Target/ARM/
ARMFrameLowering.cpp 95 // Integer spill area is handled with "pop".
302 // Determine the sizes of each callee-save spill areas and record which frame
303 // belongs to which callee-save spill areas.
335 // Determine spill area sizes.
379 // Determine starting offsets of spill areas.
504 // For iOS, FP is R7, which has now been stored in spill area 1.
506 // into spill area 1, including the FP in R11. In either case, it
771 // Move SP to start of FP callee save spill area.
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  /art/compiler/optimizing/
register_allocator.cc 497 message << "Spill slot conflict at " << j;
650 // (5) If no register could be found, we need to spill.
769 // AllocateBlockedReg will spill the holder of the register.
789 // If we could not find a register, we need to spill.
795 // If the high register of this interval is not available, we need to spill.
    [all...]
register_allocator.h 103 // Allocate a spill slot for the given interval.
195 // The spill slots allocated for live intervals. We ensure spill slots
  /external/llvm/lib/CodeGen/
PrologEpilogInserter.cpp 136 // Sets used to compute spill, restore placement sets.
179 // Scan the function for modified callee saved registers and insert spill code
183 // Determine placement of CSR spill/restore code:
351 // Nope, just spill it anywhere convenient.
363 // Spill it to the stack where we must.
375 /// insertCSRSpillsAndRestores - Insert spill and restore code for
394 // Spill using target interface.
399 // It's killed at the spill.
402 // Insert the spill to the stack frame.
536 // First assign frame offsets to stack objects that are used to spill
    [all...]
CalcSpillWeights.cpp 30 DEBUG(dbgs() << "********** Compute Spill Weights **********\n"
113 // Don't recompute spill weight for an unspillable register.
173 // Weakly boost the spill weight of hinted registers.
  /external/llvm/lib/Target/AArch64/
AArch64FrameLowering.cpp 57 // | including spill slots |
663 // right thing for the emergency spill slot.
731 assert((Count & 1) == 0 && "Odd number of callee-saved regs to spill!");
749 assert((Count & 1) == 0 && "Odd number of callee-saved regs to spill!");
750 assert((i & 1) == 0 && "Odd index for callee-saved reg spill!");
752 // first spill is a pre-increment that allocates the stack.
763 // For first spill use pre-increment store.
    [all...]
  /external/llvm/lib/Target/Hexagon/
HexagonExpandPredSpillCode.cpp 1 //===-- HexagonExpandPredSpillCode.cpp - Expand Predicate Spill Code ------===//
59 return "Hexagon Expand Predicate Spill Code";
245 "Not a Frame Pointer, Nor a Spill Slot");
292 "Not a Frame Pointer, Nor a Spill Slot");
342 const char *Name = "Hexagon Expand Predicate Spill Code";
343 PassInfo *PI = new PassInfo(Name, "hexagon-spill-pred",
  /external/v8/src/compiler/
register-allocator.h 446 // Spill the given life range after position pos.
449 // Spill the given life range after position [start] and up to position [end].
453 // Spill the given life range after position [start] and up to position [end].
460 // If we are trying to spill a range inside the loop try to
461 // hoist spill position out to the point just before the loop.
465 void Spill(LiveRange* range);
frame.h 16 // Collects the spill slot requirements and the allocated general and double
  /external/v8/src/ia32/
lithium-gap-resolver-ia32.cc 234 // 3. Prefer to spill a register that is not used in any remaining move
274 // Spill on demand to use a temporary register for memory-to-memory
369 // spill on demand because the simple spill implementation cannot avoid
387 // Memory-memory. Spill on demand to use a temporary. If there is a
427 // Double-width memory-to-memory. Spill on demand to use a general
lithium-gap-resolver-ia32.h 80 // If we had to spill on demand, the currently spilled register's
  /external/v8/src/
lithium-allocator.h 456 // Spill the given life range after position pos.
459 // Spill the given life range after position [start] and up to position [end].
464 // Spill the given life range after position [start] and up to position [end].
473 // If we are trying to spill a range inside the loop try to
474 // hoist spill position out to the point just before the loop.
478 void Spill(LiveRange* range);
  /art/compiler/jni/quick/arm64/
calling_convention_arm64.cc 109 // We spill the argument registers on ARM64 to free them up for scratch use, we then assume
179 // Compute spill mask to agree with callee saves initialized in the constructor.
213 // Plus return value spill area size
  /external/llvm/include/llvm/CodeGen/
RegisterScavenging.h 13 // to spill slots.
43 /// Information on scavenged registers (held in a spill slot).
47 /// A spill slot used for scavenging a register post register allocation.
PBQPRAConstraint.h 38 /// constraints (e.g. Spill-costs, interference, coalescing).
  /external/llvm/lib/Target/PowerPC/
PPCMachineFunctionInfo.h 49 /// Does this function spill using instructions with only r+r (not r+i)
74 /// calls. Used for creating an area before the register spill area.
93 /// CRSpillFrameIndex - FrameIndex for CR spill slot for 32-bit SVR4.
  /external/llvm/test/CodeGen/XCore/
scavenging.ll 70 ; !FP + large frame: spill SR+SR = entsp 2 + 100000
76 ; scavenge r4 using SR spill slot
82 ; scavenge r5 using SR spill slot
  /art/compiler/dex/
reg_location.h 29 * value is located (i.e. - physical register, frame, spill, etc.). For each SSA name (SReg)
  /art/compiler/dwarf/
register.h 34 // It would be much simpler to always spill whole D registers.
  /art/compiler/jni/quick/
calling_convention.h 248 // Registers to spill to caller's out registers on entry.
261 // | { Return value spill } | (live on return slow paths)
294 // Callee save registers to spill prior to native code (which may clobber)
297 // Spill mask values
  /external/linux-tools-perf/src/include/linux/
poison.h 57 * value of "SBAIOMMU POISON\0" for spill-over poisoning.
  /external/llvm/lib/Target/XCore/
XCoreFrameLowering.cpp 93 /// frame. During these steps, it may be necessary to spill registers.
96 /// \param OffsetFromTop the spill offset from the top of the frame.
119 /// \param OffsetFromTop the spill offset from the top of the frame.
164 assert(XFI->hasEHSpillSlot() && "There are no EH register spill slots");
188 /// Restore clobbered registers with their spill slot value.
324 // We do not save/spill these registers.
430 // Add the callee-saved register as live-in. It's killed at the spill.
541 // The unwinder expects to find spill slots for the exception info regs R0
543 // info. N.B. we do not spill or restore R0, R1 during normal operation.
  /external/llvm/test/MC/Mips/
xgot.s 38 sw $ra, 20($sp) # 4-byte Folded Spill
  /external/mesa3d/src/mesa/drivers/dri/i965/
brw_vec4_reg_allocate.cpp 207 /* Failed to allocate registers. Spill a reg, and the caller will
212 fail("no register to spill\n");
258 * spill/unspill we'll have to do, and guess that the insides of
326 /* Generate spill/unspill instructions for the objects being spilled. */
  /external/v8/src/x87/
lithium-gap-resolver-x87.h 80 // If we had to spill on demand, the currently spilled register's

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