| /frameworks/av/media/libeffects/lvm/lib/Common/src/ |
| LVC_Core_MixHard_2St_D16C31_SAT.c | 31 const LVM_INT16 *src2,
48 (((LVM_INT32)*(src2++) * (LVM_INT32)Current2Short)>>15);
|
| /frameworks/rs/java/tests/RSTest_CompatLib/src/com/android/rs/test/ |
| clamp.rs | 6 float2 src2 = { 2.0f, 2.0f};
10 float2 res2 = clamp(src2, min2, max2);
|
| /frameworks/rs/java/tests/RSTest_CompatLibLegacy/src/com/android/rs/test/ |
| clamp.rs | 6 float2 src2 = { 2.0f, 2.0f};
10 float2 res2 = clamp(src2, min2, max2);
|
| /frameworks/rs/java/tests/RsTest/src/com/android/rs/test/ |
| clamp.rs | 6 float2 src2 = { 2.0f, 2.0f};
10 float2 res2 = clamp(src2, min2, max2);
|
| /external/pcre/dist/sljit/ |
| sljitNativeX86_common.c | 569 sljit_si src2, sljit_sw src2w);
575 sljit_si src2, sljit_sw src2w);
[all...] |
| sljitNativeMIPS_common.c | 915 sljit_si src2, sljit_sw src2w)
932 if (op >= SLJIT_MOV && op <= SLJIT_MOVU_SI && !(src2 & SLJIT_MEM))
947 if ((src2 & SLJIT_IMM) && src2w) {
961 src1 = src2;
963 src2 = SLJIT_IMM;
991 if (FAST_IS_REG(src2)) {
992 src2_r = src2;
997 else if (src2 & SLJIT_IMM) {
1011 if (getput_arg_fast(compiler, flags | LOAD_DATA, DR(sugg_src2_r), src2, src2w)
[all...] |
| sljitNativeSPARC_common.c | 650 sljit_si src2, sljit_sw src2w)
667 if (op >= SLJIT_MOV && op <= SLJIT_MOVU_SI && !(src2 & SLJIT_MEM))
680 if ((src2 & SLJIT_IMM) && src2w) {
692 src1 = src2;
694 src2 = SLJIT_IMM;
720 if (FAST_IS_REG(src2)) {
721 src2_r = src2;
726 else if (src2 & SLJIT_IMM) {
740 if (getput_arg_fast(compiler, flags | LOAD_DATA, sugg_src2_r, src2, src2w))
749 if (!can_cache(src1, src1w, src2, src2w) && can_cache(src1, src1w, dst, dstw))
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrArithmetic.td | 157 def IMUL16rr : I<0xAF, MRMSrcReg, (outs GR16:$dst), (ins GR16:$src1,GR16:$src2),
158 "imul{w}\t{$src2, $dst|$dst, $src2}",
160 (X86smul_flag GR16:$src1, GR16:$src2))], IIC_IMUL16_RR>,
162 def IMUL32rr : I<0xAF, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src1,GR32:$src2),
163 "imul{l}\t{$src2, $dst|$dst, $src2}",
165 (X86smul_flag GR32:$src1, GR32:$src2))], IIC_IMUL32_RR>,
168 (ins GR64:$src1, GR64:$src2),
169 "imul{q}\t{$src2, $dst|$dst, $src2}"
[all...] |
| X86InstrInfo.td | [all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXVector.td | 390 def : Pat<(shl V2I16Regs:$src1, V2I16Regs:$src2),
391 (ShiftLV2I16 V2I16Regs:$src1, (CVTv2i16tov2i32 V2I16Regs:$src2))>;
392 def : Pat<(shl V2I8Regs:$src1, V2I8Regs:$src2),
393 (ShiftLV2I8 V2I8Regs:$src1, (CVTv2i8tov2i32 V2I8Regs:$src2))>;
394 def : Pat<(shl V2I64Regs:$src1, V2I64Regs:$src2),
395 (ShiftLV2I64 V2I64Regs:$src1, (CVTv2i64tov2i32 V2I64Regs:$src2))>;
397 def : Pat<(shl V4I16Regs:$src1, V4I16Regs:$src2),
398 (ShiftLV4I16 V4I16Regs:$src1, (CVTv4i16tov4i32 V4I16Regs:$src2))>;
399 def : Pat<(shl V4I8Regs:$src1, V4I8Regs:$src2),
400 (ShiftLV4I8 V4I8Regs:$src1, (CVTv4i8tov4i32 V4I8Regs:$src2))>;
[all...] |
| /art/runtime/arch/arm64/ |
| memcmp16_arm64.S | 29 #define src2 x1 define
53 eor tmp1, src1, src2
63 ldr data2, [src2], #8
110 bic src2, src2, #7
115 ldr data2, [src2], #8
135 ldrh data2w, [src2], #2
|
| /art/test/etc/ |
| default-build | 54 if [ -d src2 ]; then
55 ${JACK} --output-jack src2.jack src2
56 imported_jack_files="--import src2.jack ${imported_jack_files}"
60 # class definitions from src2 first.
78 if [ -d src2 ]; then
80 ${JAVAC} -d classes `find src2 -name '*.java'`
|
| /bionic/libc/arch-arm64/generic/bionic/ |
| memcmp.S | 37 #define src2 x1 define
58 eor tmp1, src1, src2
68 ldr data2, [src2], #8
119 bic src2, src2, #7
124 ldr data2, [src2], #8
149 ldrb data2w, [src2], #1
|
| strcmp.S | 41 #define src2 x1 define
60 eor tmp1, src1, src2
71 ldr data2, [src2], #8
136 bic src2, src2, #7
140 ldr data2, [src2], #8
156 ldrb data2w, [src2], #1
|
| /external/skia/tests/ |
| PackBitsTest.cpp | 47 uint16_t src[100], src2[100]; local
55 int srcCount = SkPackBits::Unpack16(dst, dstSize, src2);
57 bool match = memcmp(src, src2, size * sizeof(uint16_t)) == 0;
101 uint8_t src[600], src2[600]; local
109 size_t srcCount = SkPackBits::Unpack8(dst, dstSize, src2);
111 bool match = memcmp(src, src2, size * sizeof(uint8_t)) == 0;
121 bool match = memcmp(src, src2 + skip, write) == 0;
|
| /external/vixl/src/vixl/a64/ |
| simulator-a64.h | [all...] |
| /external/llvm/test/CodeGen/SystemZ/ |
| atomicrmw-minmax-01.ll | 162 ; CHECK: llilh [[SRC2:%r[0-9]+]], 33024
163 ; CHECK: crjle [[ROT:%r[0-9]+]], [[SRC2]]
164 ; CHECK: risbg [[ROT]], [[SRC2]], 32, 39, 0
179 ; CHECK: llilh [[SRC2:%r[0-9]+]], 32256
180 ; CHECK: crjhe [[ROT:%r[0-9]+]], [[SRC2]]
181 ; CHECK: risbg [[ROT]], [[SRC2]], 32, 39, 0
196 ; CHECK: llilh [[SRC2:%r[0-9]+]], 256
197 ; CHECK: clrjle [[ROT:%r[0-9]+]], [[SRC2]],
198 ; CHECK: risbg [[ROT]], [[SRC2]], 32, 39, 0
213 ; CHECK: llilh [[SRC2:%r[0-9]+]], 6502
[all...] |
| atomicrmw-minmax-02.ll | 162 ; CHECK: llilh [[SRC2:%r[0-9]+]], 32769
163 ; CHECK: crjle [[ROT:%r[0-9]+]], [[SRC2]]
164 ; CHECK: risbg [[ROT]], [[SRC2]], 32, 47, 0
179 ; CHECK: llilh [[SRC2:%r[0-9]+]], 32766
180 ; CHECK: crjhe [[ROT:%r[0-9]+]], [[SRC2]]
181 ; CHECK: risbg [[ROT]], [[SRC2]], 32, 47, 0
196 ; CHECK: llilh [[SRC2:%r[0-9]+]], 1
197 ; CHECK: clrjle [[ROT:%r[0-9]+]], [[SRC2]],
198 ; CHECK: risbg [[ROT]], [[SRC2]], 32, 47, 0
213 ; CHECK: llilh [[SRC2:%r[0-9]+]], 6553
[all...] |
| /external/mesa3d/src/mesa/x86/ |
| x86_xform3.S | 43 #define SRC2 REGOFF(8, ESI)
125 FLD_S( SRC2 ) /* F0 F7 F6 F5 F4 */
127 FLD_S( SRC2 ) /* F1 F0 F7 F6 F5 F4 */
129 FLD_S( SRC2 ) /* F2 F1 F0 F7 F6 F5 F4 */
131 FLD_S( SRC2 ) /* F3 F2 F1 F0 F7 F6 F5 F4 */
214 FLD_S( SRC2 ) /* F0 F5 F4 */
216 FLD_S( SRC2 ) /* F1 F0 F5 F4 */
218 FLD_S( SRC2 ) /* F2 F1 F0 F5 F4 */
228 MOV_L( SRC2, EBX )
307 FLD_S( SRC2 ) /* F0 F6 F5 F4 *
[all...] |
| x86_xform4.S | 43 #define SRC2 REGOFF(8, ESI)
125 FLD_S( SRC2 ) /* F0 F7 F6 F5 F4 */
127 FLD_S( SRC2 ) /* F1 F0 F7 F6 F5 F4 */
129 FLD_S( SRC2 ) /* F2 F1 F0 F7 F6 F5 F4 */
131 FLD_S( SRC2 ) /* F3 F2 F1 F0 F7 F6 F5 F4 */
221 FLD_S( SRC2 ) /* F0 F5 F4 */
223 FLD_S( SRC2 ) /* F1 F0 F5 F4 */
225 FLD_S( SRC2 ) /* F6 F1 F0 F5 F4 */
237 MOV_L( SRC2, EBX )
317 FLD_S( SRC2 ) /* F0 F6 F5 F4 *
[all...] |
| /external/bison/lib/ |
| ebitset.c | 1029 ebitset_op3_cmp (bitset dst, bitset src1, bitset src2, enum bitset_ops op)
1045 ebitset_resize (dst, max (BITSET_NBITS_ (src1), BITSET_NBITS_ (src2)));
1048 ssize2 = EBITSET_SIZE (src2);
1055 selts2 = EBITSET_ELTS (src2);
1177 ebitset_and_cmp (bitset dst, bitset src1, bitset src2)
1181 if (EBITSET_ZERO_P (src2))
1195 return ebitset_op3_cmp (dst, src1, src2, BITSET_OP_AND);
1200 ebitset_and (bitset dst, bitset src1, bitset src2)
1202 ebitset_and_cmp (dst, src1, src2);
1207 ebitset_andn_cmp (bitset dst, bitset src1, bitset src2)
[all...] |
| /art/test/032-concrete-sub/src2/ |
| AbstractBase.java | 22 System.out.println("In AbstractBase.doStuff (src2)");
|
| /art/test/ |
| README.txt | 10 in the "src2" directory are compiled separately but to the same output
|
| /external/llvm/test/CodeGen/Thumb/ |
| copy_thumb.ll | 10 ; CHECK-LOLOMOV-NEXT: mov [[SRC1]], [[SRC2:r[01]]]
11 ; CHECK-LOLOMOV-NEXT: mov [[SRC2]], [[TMP]]
23 ; CHECK-NOLOLOMOV: push {[[SRC2:r[01]]]}
27 ; CHECK-NOLOLOMOV-NEXT: pop {[[SRC2]]}
|
| /external/llvm/test/CodeGen/R600/ |
| llvm.AMDGPU.imad24.ll | 17 define void @test_imad24(i32 addrspace(1)* %out, i32 %src0, i32 %src1, i32 %src2) nounwind {
18 %mad = call i32 @llvm.AMDGPU.imad24(i32 %src0, i32 %src1, i32 %src2) nounwind readnone
|
