| /external/skia/src/opts/ |
| SkBlitRow_opts_SSE2.cpp | 150 const __m128i* src4 = (const __m128i*)src; local
154 __m128i s0 = _mm_loadu_si128(src4+i+0),
155 s1 = _mm_loadu_si128(src4+i+1),
156 s2 = _mm_loadu_si128(src4+i+2),
157 s3 = _mm_loadu_si128(src4+i+3);
[all...] |
| /external/skia/src/core/ |
| SkXfermode.cpp | 1396 Sk4f src4 = srcF; variable
[all...] |
| SkMatrix.cpp | 986 Sk4s skew4(kx, ky, kx, ky); // applied to swizzle of src4
989 Sk4s src4 = Sk4s::Load(&src->fX); local
991 (src4 * scale4 + swz4 * skew4 + trans4).store(&dst->fX);
[all...] |
| SkGeometry.cpp | 734 const SkScalar src4[] = { 0, 0, 1 }; local
746 { TEST_COLLAPS_ENTRY(src4), 2 },
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXInstrInfo.td | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfoV5.td | 769 def: Pat<(select (i1 (setult F32:$src1, F32:$src2)), F32:$src3, F32:$src4),
770 (C2_mux (F2_sfcmpgt F32:$src2, F32:$src1), F32:$src4, F32:$src3)>,
777 def: Pat<(select (i1 (setult F64:$src1, F64:$src2)), F64:$src3, F64:$src4),
778 (C2_vmux (F2_dfcmpgt F64:$src2, F64:$src1), F64:$src3, F64:$src4)>,
[all...] |
| HexagonInstrInfoV4.td | 743 (ins IntRegs:$src1, u2Imm:$src2, u6Ext:$src3, RC:$src4),
744 mnemonic#"($src1<<#$src2 + #$src3) = $src4"#!if(isHalf, ".h",""),
750 bits<5> src4;
761 let Inst{12-8} = src4;
779 def : Pat<(stOp (VT RC:$src4),
782 (MI IntRegs:$src1, u2ImmPred:$src2, u32ImmPred:$src3, RC:$src4)>;
784 def : Pat<(stOp (VT RC:$src4),
787 (MI IntRegs:$src1, u2ImmPred:$src2, tglobaladdr:$src3, RC:$src4)>;
789 def : Pat<(stOp (VT RC:$src4),
791 (MI IntRegs:$src1, 0, tglobaladdr:$src3, RC:$src4)>;
[all...] |
| HexagonInstrInfo.td | [all...] |
| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| tgsi_ureg.h | [all...] |
| /external/skia/tests/ |
| Matrix44Test.cpp | 199 SkMScalar src4[] = { src2[0], src2[1], 0, 1 }; local
208 mat.mapMScalars(src4, dstB);
|
| /external/v8/test/cctest/ |
| test-assembler-arm.cc | 1228 uint32_t src4; member in struct:__anon19219
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_optimize.c | 656 * DP4 dst.z src1 src4
|
| /external/llvm/lib/Target/XCore/ |
| XCoreInstrInfo.td | 535 (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3, GRRegs:$src4),
536 "lmul $dst1, $dst2, $src1, $src2, $src3, $src4", []>;
[all...] |
| /external/v8/src/mips/ |
| macro-assembler-mips.h | 668 void Push(Register src1, Register src2, Register src3, Register src4) {
673 sw(src4, MemOperand(sp, 0 * kPointerSize));
[all...] |
| /external/v8/src/mips64/ |
| macro-assembler-mips64.h | 690 void Push(Register src1, Register src2, Register src3, Register src4) {
695 sd(src4, MemOperand(sp, 0 * kPointerSize));
[all...] |
| /external/ipsec-tools/src/racoon/ |
| sockmisc.c | 664 "src4 %s\n",
|
| /external/llvm/lib/Target/ARM/ |
| ARMInstrNEON.td | [all...] |
| /external/vixl/src/vixl/a64/ |
| simulator-a64.h | [all...] |
| /external/v8/src/arm64/ |
| macro-assembler-arm64.cc | 882 const CPURegister& src4, const CPURegister& src5,
884 DCHECK(AreSameSizeAndType(src0, src1, src2, src3, src4, src5, src6, src7));
891 PushHelper(count - 4, size, src4, src5, src6, src7);
[all...] |
| macro-assembler-arm64.h | 566 const CPURegister& src4, const CPURegister& src5 = NoReg,
[all...] |
| /art/runtime/ |
| debugger.cc | 1253 const uint32_t* src4 = reinterpret_cast<uint32_t*>(a->GetRawData(sizeof(uint32_t), 0)); local
[all...] |
| /external/valgrind/VEX/priv/ |
| guest_s390_toIR.c | 7215 IRTemp src4 = newTemp(Ity_F64); local
[all...] |
