| /external/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.td | 528 defm SUBE : F3_12 <"subxcc" , 0b011100, sube, IntRegs, i32, simm13Op>;
[all...] |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 143 setTargetDAGCombine(ISD::SUBE);
458 // (addc Lo0, multLo), (sube Hi0, multHi),
515 // replace uses of sube and subc here
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 111 setOperationAction(ISD::SUBE, VT, Expand);
|
| /packages/apps/UnifiedEmail/src/com/android/emailcommon/utility/ |
| TextUtilities.java | 263 ESCAPE_STRINGS.put("&sube", '\u2286');
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 214 ADDE, SUBE,
[all...] |
| /packages/apps/UnifiedEmail/src/com/google/android/mail/common/base/ |
| CharEscapers.java | 392 .addEscape('\u2286', "⊆")
[all...] |
| StringUtil.java | [all...] |
| /external/tagsoup/src/org/ccil/cowan/tagsoup/ |
| HTMLSchema.java | [all...] |
| /external/owasp/sanitizer/lib/htmlparser-1.3/doc/ |
| named-character-references.html | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMInstrThumb.td | [all...] |
| ARMISelLowering.cpp | 687 setOperationAction(ISD::SUBE, MVT::i32, Custom);
[all...] |
| ARMInstrInfo.td | 158 def ARMsube : SDNode<"ARMISD::SUBE", SDTBinaryArithWithFlagsInOut>;
[all...] |
| /prebuilts/eclipse/maven/apache-maven-3.2.1/lib/ |
| plexus-sec-dispatcher-1.3.jar | |
| /prebuilts/eclipse/mavenplugins/tycho/tycho-dependencies-m2repo/org/sonatype/plexus/plexus-sec-dispatcher/1.3/ |
| plexus-sec-dispatcher-1.3.jar | |
| /prebuilts/tools/common/m2/repository/org/sonatype/plexus/plexus-sec-dispatcher/1.3/ |
| plexus-sec-dispatcher-1.3.jar | |
| /external/chromium-trace/trace-viewer/tracing/third_party/vinn/third_party/parse5/tools/ |
| entities.json | [all...] |
| /external/tagsoup/definitions/ |
| html.tssl | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.td | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 227 setOperationAction(ISD::SUBE, MVT::i32, Custom);
231 setOperationAction(ISD::SUBE, MVT::i64, Custom);
[all...] |
| /external/llvm/lib/Target/R600/ |
| R600ISelLowering.cpp | 188 setOperationAction(ISD::SUBE, VT, Expand);
[all...] |
| SIISelLowering.cpp | 74 setOperationAction(ISD::SUBE, MVT::i32, Legal);
[all...] |
| AMDGPUISelLowering.cpp | 341 setOperationAction(ISD::SUBE, VT, Expand);
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 98 setOperationAction(ISD::SUBE, MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXInstrInfo.td | 403 defm SUBCCC : ADD_SUB_INT_32<"subc.cc", sube>;
[all...] |
