| /external/llvm/test/CodeGen/PowerPC/ |
| asm-dialect.ll | 15 %0 = tail call i32 asm "$(sfe$|subfe$) $0,$1,$2", "=r,r,r"(i32 %in1, i32 %in2)
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| bswap-load-store.ll | 10 %tmp13 = tail call i32 @llvm.bswap.i32( i32 %i ) ; <i32> [#uses=1]
19 %tmp14 = tail call i32 @llvm.bswap.i32( i32 %tmp ) ; <i32> [#uses=1]
42 %tmp13 = tail call i64 @llvm.bswap.i64( i64 %i ) ; <i64> [#uses=1]
51 %tmp14 = tail call i64 @llvm.bswap.i64( i64 %tmp ) ; <i64> [#uses=1]
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| memcpy-vec.ll | 12 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* %1, i64 32, i32 8, i1 false)
41 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* %1, i64 128, i32 8, i1 false)
64 tail call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 128, i32 8, i1 false)
87 tail call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 128, i32 32, i1 false)
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| ppc64-abi-extend.ll | 19 tail call void @arg_si(i32 signext %0) nounwind
29 tail call void @arg_ui(i32 zeroext %0) nounwind
74 %call = tail call signext i32 @ret_si() nounwind
87 %call = tail call zeroext i32 @ret_ui() nounwind
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| ppc64-stackmap-nops.ll | 19 tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 0, i32 32)
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| ppc64le-calls.ll | 13 tail call void %fp()
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| pr12757.ll | 7 %0 = tail call i64 asm sideeffect "mffs $0", "=f"() nounwind
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| retaddr2.ll | 8 %0 = tail call i8* @llvm.returnaddress(i32 0)
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| /external/llvm/test/CodeGen/SPARC/ |
| 2008-10-10-InlineAsmRegOperand.ll | 10 %asmtmp = tail call void (i8*)* (void (i8*)*) asm "", "=r,0"(void (i8*)* @_Jv_RegisterClasses) nounwind ; <void (i8*)*> [#uses=0]
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| 2011-01-11-FrameAddr.ll | 27 %0 = tail call i8* @llvm.frameaddress(i32 0)
52 %0 = tail call i8* @llvm.frameaddress(i32 3)
71 %0 = tail call i8* @llvm.returnaddress(i32 0)
95 %0 = tail call i8* @llvm.returnaddress(i32 3)
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| /external/llvm/test/CodeGen/X86/ |
| 2006-05-17-VectorArg.ll | 8 %tmp3 = tail call float @llvm.sqrt.f32( float %abs ) ; <float> [#uses=1]
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| 2007-04-27-InlineAsm-IntMemInput.ll | 9 %tmp4 = tail call i32 asm "bsrl $1, $0", "=r,ro,~{dirflag},~{fpsr},~{flags},~{cc}"( i32 10 ) ; <i32> [#uses=1]
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| 2008-04-26-Asm-Optimize-Imm.ll | 12 tail call void asm sideeffect " ${0:c} $1 ${2:c} ", "imr,imr,i,~{dirflag},~{fpsr},~{flags}"( i32 1, i32 2, i32 3 ) nounwind
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| 2008-07-09-ELFSectionAttributes.ll | 9 tail call i32 @bar( i32 %A, i32 %B ) nounwind ; <i32>:0 [#uses=1]
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| 2010-02-19-TailCallRetAddrBug.ll | 5 ; If a call is a fastcc tail call and tail call optimization is enabled, the
47 tail call fastcc void @l297(i32 %r10, i32 %r9, i32 %r8, i32 %r7, i32 %r6, i32 %r5, i32 %r3, i32 %r2) noreturn nounwind
51 tail call fastcc void @l298(i32 %r10, i32 %r9, i32 %r4) noreturn nounwind
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| 2010-04-21-CoalescerBug.ll | 11 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %agg.result1, i8* null, i64 96, i32 4, i1 false)
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| 3addr-16bit.ll | 21 tail call void @foo(i16 zeroext %1) nounwind
44 tail call void @foo(i16 zeroext %1) nounwind
68 tail call void @foo(i16 zeroext %0) nounwind
91 tail call void @foo(i16 zeroext %0) nounwind
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| asm-indirect-mem.ll | 8 %asmtmp = tail call i32 asm sideeffect "xchgl $1,$0", "=*m,=r,*m,1,~{dirflag},~{fpsr},~{flags}"( i32* %p, i32* %p, i32 %v ) nounwind ; <i32> [#uses=0]
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| floor-soft-float.ll | 11 %val = tail call float @llvm.floor.f32(float %a)
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| fold-call.ll | 25 tail call void %0()
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| fp-in-intregs.ll | 16 %tmp2 = tail call float @copysignf( float 1.000000e+00, float %x ) nounwind readnone ; <float> [#uses=1]
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| maskmovdqu.ll | 9 tail call void @llvm.x86.sse2.maskmov.dqu( <16 x i8> %a, <16 x i8> %b, i8* %c )
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| neg_cmp.ll | 15 tail call void @g() nounwind
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| pr11985.ll | 5 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %buf, i8* blockaddress(@foo, %out), i64 22, i32 1, i1 false)
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| pr3243.ll | 13 %2 = tail call signext i16 @safe_mul_func_int16_t_s_s(i16 signext %phitmp3, i32 1) nounwind ; <i16> [#uses=0]
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