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      1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -asm-verbose=false | FileCheck %s -check-prefix=64BIT
      2 ; rdar://7329206
      3 
      4 ; In 32-bit the partial register stall would degrade performance.
      5 
      6 define zeroext i16 @t1(i16 zeroext %c, i16 zeroext %k) nounwind ssp {
      7 entry:
      8 ; 32BIT-LABEL:     t1:
      9 ; 32BIT:     movw 20(%esp), %ax
     10 ; 32BIT-NOT: movw %ax, %cx
     11 ; 32BIT:     leal 1(%eax), %ecx
     12 
     13 ; 64BIT-LABEL:     t1:
     14 ; 64BIT-NOT: movw %si, %ax
     15 ; 64BIT:     leal 1(%rsi), %eax
     16   %0 = icmp eq i16 %k, %c                         ; <i1> [#uses=1]
     17   %1 = add i16 %k, 1                              ; <i16> [#uses=3]
     18   br i1 %0, label %bb, label %bb1
     19 
     20 bb:                                               ; preds = %entry
     21   tail call void @foo(i16 zeroext %1) nounwind
     22   ret i16 %1
     23 
     24 bb1:                                              ; preds = %entry
     25   ret i16 %1
     26 }
     27 
     28 define zeroext i16 @t2(i16 zeroext %c, i16 zeroext %k) nounwind ssp {
     29 entry:
     30 ; 32BIT-LABEL:     t2:
     31 ; 32BIT:     movw 20(%esp), %ax
     32 ; 32BIT-NOT: movw %ax, %cx
     33 ; 32BIT:     leal -1(%eax), %ecx
     34 
     35 ; 64BIT-LABEL:     t2:
     36 ; 64BIT-NOT: movw %si, %ax
     37 ; 64BIT:     leal -1(%rsi), %eax
     38 ; 64BIT:     movzwl %ax
     39   %0 = icmp eq i16 %k, %c                         ; <i1> [#uses=1]
     40   %1 = add i16 %k, -1                             ; <i16> [#uses=3]
     41   br i1 %0, label %bb, label %bb1
     42 
     43 bb:                                               ; preds = %entry
     44   tail call void @foo(i16 zeroext %1) nounwind
     45   ret i16 %1
     46 
     47 bb1:                                              ; preds = %entry
     48   ret i16 %1
     49 }
     50 
     51 declare void @foo(i16 zeroext)
     52 
     53 define zeroext i16 @t3(i16 zeroext %c, i16 zeroext %k) nounwind ssp {
     54 entry:
     55 ; 32BIT-LABEL:     t3:
     56 ; 32BIT:     movw 20(%esp), %ax
     57 ; 32BIT-NOT: movw %ax, %cx
     58 ; 32BIT:     leal 2(%eax), %ecx
     59 
     60 ; 64BIT-LABEL:     t3:
     61 ; 64BIT-NOT: movw %si, %ax
     62 ; 64BIT:     leal 2(%rsi), %eax
     63   %0 = add i16 %k, 2                              ; <i16> [#uses=3]
     64   %1 = icmp eq i16 %k, %c                         ; <i1> [#uses=1]
     65   br i1 %1, label %bb, label %bb1
     66 
     67 bb:                                               ; preds = %entry
     68   tail call void @foo(i16 zeroext %0) nounwind
     69   ret i16 %0
     70 
     71 bb1:                                              ; preds = %entry
     72   ret i16 %0
     73 }
     74 
     75 define zeroext i16 @t4(i16 zeroext %c, i16 zeroext %k) nounwind ssp {
     76 entry:
     77 ; 32BIT-LABEL:     t4:
     78 ; 32BIT:     movw 16(%esp), %ax
     79 ; 32BIT:     movw 20(%esp), %cx
     80 ; 32BIT-NOT: movw %cx, %dx
     81 ; 32BIT:     leal (%ecx,%eax), %edx
     82 
     83 ; 64BIT-LABEL:     t4:
     84 ; 64BIT-NOT: movw %si, %ax
     85 ; 64BIT:     leal (%rsi,%rdi), %eax
     86   %0 = add i16 %k, %c                             ; <i16> [#uses=3]
     87   %1 = icmp eq i16 %k, %c                         ; <i1> [#uses=1]
     88   br i1 %1, label %bb, label %bb1
     89 
     90 bb:                                               ; preds = %entry
     91   tail call void @foo(i16 zeroext %0) nounwind
     92   ret i16 %0
     93 
     94 bb1:                                              ; preds = %entry
     95   ret i16 %0
     96 }
     97