| /frameworks/av/media/libstagefright/codecs/mp3dec/src/ |
| pvmp3_dct_9.cpp | 130 int32 tmp6 = vec[6] - vec[2]; local
150 vec[1] = fxp_mac32_Q32(vec[1], tmp6 << 1, cos_13pi_18);
153 vec[3] = fxp_mul32_Q32((tmp5 + tmp6 - tmp8) << 1, cos_pi_6);
155 vec[5] = fxp_mac32_Q32(vec[5], tmp6 << 1, cos_7pi_18);
159 vec[7] = fxp_mac32_Q32(vec[7], tmp6 << 1, cos_17pi_18);
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| /external/llvm/test/CodeGen/WinEH/ |
| cppeh-nested-2.ll | 143 %tmp6 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__CxxFrameHandler3 to i8*)
147 %tmp7 = extractvalue { i8*, i32 } %tmp6, 0
149 %tmp8 = extractvalue { i8*, i32 } %tmp6, 1
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| /external/llvm/test/DebugInfo/X86/ |
| nophysreg.ll | 79 %ref.tmp6 = alloca i32, align 4
105 store i32 0, i32* %ref.tmp6, align 4, !dbg !57, !tbaa !42
106 call void @_Z4funcRKiS0_(i32* dereferenceable(4) %ref.tmp5, i32* dereferenceable(4) %ref.tmp6), !dbg !58
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| /external/llvm/test/CodeGen/AArch64/ |
| arm64-misched-basic-A53.ll | 97 %tmp6 = fadd <4 x float> %A, %tmp5;
98 %tmp7 = fadd <4 x float> %A, %tmp6;
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| arm64-vmul.ll | [all...] |
| arm64-rev.ll | 33 %tmp6 = or i32 %tmp5, %tmp2
34 %tmp10 = or i32 %tmp6, %tmp13
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| /external/llvm/test/CodeGen/ARM/ |
| 2012-01-23-PostRA-LICM.ll | 22 %tmp6 = and <4 x i32> %tmp5, <i32 8388607, i32 8388607, i32 8388607, i32 8388607>
23 %tmp7 = or <4 x i32> %tmp6, <i32 1065353216, i32 1065353216, i32 1065353216, i32 1065353216>
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| 2012-01-26-CopyPropKills.ll | 23 %tmp6 = bitcast <4 x i32> zeroinitializer to <4 x float>
24 %tmp7 = fmul <4 x float> %tmp6, <float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00>
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| 2007-05-22-tailmerge-3.ll | 49 %tmp6 = call i32 (...) @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
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| coalesce-subregs.ll | 227 %tmp6 = bitcast <4 x float> %tmp5 to <2 x i64>
228 %tmp7 = shufflevector <2 x i64> %tmp6, <2 x i64> undef, <1 x i32> zeroinitializer
277 %tmp6 = bitcast <2 x float> %tmp5 to <1 x i64>
278 %tmp7 = shufflevector <1 x i64> undef, <1 x i64> %tmp6, <2 x i32> <i32 0, i32 1>
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| reg_sequence.ll | 89 %tmp6 = add <8 x i8> %tmp2, %tmp3 ; <<8 x i8>> [#uses=1]
91 tail call void @llvm.arm.neon.vst3.v8i8(i8* %B, <8 x i8> %tmp5, <8 x i8> %tmp6, <8 x i8> %tmp7, i32 1)
121 %tmp6 = add <4 x i32> %tmp52, %tmp ; <<4 x i32>> [#uses=1]
123 tail call void @llvm.arm.neon.vst2.v4i32(i8* %tmp8, <4 x i32> %tmp6, <4 x i32> %tmp7, i32 1)
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| vext.ll | 194 %tmp6 = insertelement <4 x i16> undef, i16 %tmp4, i32 0
195 %tmp7 = insertelement <4 x i16> %tmp6, i16 %tmp5, i32 1
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| /external/llvm/test/CodeGen/X86/ |
| 2009-09-10-SpillComments.ll | 23 %tmp6 = getelementptr %struct.rtx_def, %struct.rtx_def* %x, i32 0, i32 0 ; <i16*> [#uses=1]
24 %tmp7 = load i16, i16* %tmp6 ; <i16> [#uses=2]
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| postra-licm.ll | 157 %tmp6 = add i64 %tmp5, 1 ; <i64> [#uses=1]
183 %exitcond = icmp eq i64 undef, %tmp6 ; <i1> [#uses=1]
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| 2008-02-27-DeadSlotElimBug.ll | 58 %tmp6.i = fadd double 0.000000e+00, %tmp20.i23 ; <double> [#uses=0]
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| misched-matrix.ll | 109 %tmp6 = load i32, i32* %arrayidx8.3, align 4
151 %mul.3 = mul nsw i32 %tmp7, %tmp6
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| nancvt.ll | 39 %tmp6 = load float, float* %tmp5, align 4 ; <float> [#uses=1]
40 %tmp67 = fpext float %tmp6 to double ; <double> [#uses=1]
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| /external/llvm/test/MC/AArch64/ |
| ldr-pseudo.s | 88 // CHECK: ldr w0, .Ltmp[[TMP6:[0-9]+]]
237 // CHECK: .Ltmp[[TMP6]]
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| /external/llvm/test/Transforms/GVN/ |
| crash.ll | 131 %tmp6 = bitcast i8* %tmp66.i to i64*
132 %tmp67.i = load i64, i64* %tmp6
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| nonescaping-malloc.ll | 50 %tmp6.i = zext i32 %tmp3.i to i64
51 %tmp7.i = getelementptr inbounds %"struct.llvm::StringMapImpl::ItemBucket", %"struct.llvm::StringMapImpl::ItemBucket"* %tmp5.i, i64 %tmp6.i, i32 1
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| /external/llvm/test/Analysis/ScalarEvolution/ |
| scev-aa.ll | 205 %tmp6 = load i64, i64* %p ; <i64> [#uses=1]
206 %cmp = icmp slt i64 %inc, %tmp6 ; <i1> [#uses=1]
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| trip-count7.ll | 82 %tmp6 = sext i32 %tmp5 to i64 ; <i64> [#uses=1]
83 %tmp7 = getelementptr [17 x i32], [17 x i32]* %b, i64 0, i64 %tmp6 ; <i32*> [#uses=1]
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| /external/llvm/test/Transforms/IndVarSimplify/ |
| iv-sext.ll | 35 %tmp6 = sext i32 %tmp5 to i64 ; <i64> [#uses=1]
36 %tmp7 = getelementptr float, float* %pTmp1, i64 %tmp6 ; <float*> [#uses=1]
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| /external/llvm/test/Transforms/InstCombine/ |
| crash.ll | 40 %tmp6 = bitcast <1 x i16> %tmp2 to i16 ; <i16> [#uses=1]
41 %tmp7 = zext i16 %tmp6 to i32 ; <i32> [#uses=1]
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| /external/llvm/lib/Transforms/Utils/ |
| IntegerDivision.cpp | 293 // ; %tmp6 = lshr i32 %q_2, 31
294 // ; %tmp7 = or i32 %tmp5, %tmp6
311 Value *Tmp6 = Builder.CreateLShr(Q_2, MSB);
312 Value *Tmp7 = Builder.CreateOr(Tmp5, Tmp6);
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