/external/llvm/lib/Target/AArch64/ |
AArch64PBQPRegAlloc.cpp | 72 case AArch64::D17:
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/external/libhevc/common/arm/ |
ihevc_sao_edge_offset_class0.s | 224 VTBL.8 D17,{D11},D15 @offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx)) 228 VADDW.S8 Q7,Q7,D17 @pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1], offset)
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/art/compiler/utils/arm64/ |
managed_register_arm64_test.cc | 565 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D17))); 588 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D17))); [all...] |
/external/llvm/lib/Target/Sparc/Disassembler/ |
SparcDisassembler.cpp | 87 SP::D0, SP::D16, SP::D1, SP::D17,
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/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p2/src/ |
omxVCM4P2_MCReconBlock_s.s | 324 dRow8Shft DN D17.U8
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/external/llvm/lib/Target/AArch64/Utils/ |
AArch64BaseInfo.h | 128 case AArch64::D17: return AArch64::B17; 168 case AArch64::B17: return AArch64::D17; [all...] |
/external/llvm/lib/Target/Sparc/AsmParser/ |
SparcAsmParser.cpp | 116 Sparc::D16, Sparc::D17, Sparc::D18, Sparc::D19,
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/external/valgrind/memcheck/ |
mc_machine.c | [all...] |
/external/libavc/common/arm/ |
ih264_deblk_chroma_a9.s | 322 vst2.8 {d16, d17}, [r6], r1 @ 725 vdup.8 d17, r6 @D17 contains beta_cr [all...] |
/external/libavc/encoder/arm/ |
ime_distortion_metrics_a9q.s | 422 vadd.u16 d16, d16, d17 521 vadd.u16 d16, d16, d17 656 vadd.i16 d7, d16, d17 @ xy top left 1067 vadd.s16 d17, d12, d13 @I (s1 + s2) (s3 + s4) 1069 @D17 S12 S34 A12 A34 1085 vpadd.s16 d10, d16, d17 @I Get sad by adding s1 s2 s3 s4 [all...] |
/external/llvm/lib/Target/AArch64/Disassembler/ |
AArch64Disassembler.cpp | 280 AArch64::D15, AArch64::D16, AArch64::D17, AArch64::D18, AArch64::D19, [all...] |
/external/llvm/lib/Target/ARM/Disassembler/ |
ARMDisassembler.cpp | [all...] |