| /external/llvm/lib/Target/XCore/ |
| XCoreInstrInfo.h | 55 SmallVectorImpl<MachineOperand> &Cond,
60 const SmallVectorImpl<MachineOperand> &Cond,
83 SmallVectorImpl<MachineOperand> &Cond) const override;
|
| /external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
| SIMCCodeEmitter.cpp | 75 SmallVectorImpl<MCFixup> &Fixups) const;
79 SmallVectorImpl<MCFixup> &Fixups) const;
88 SmallVectorImpl<MCFixup> &Fixup) const;
92 SmallVectorImpl<MCFixup> &Fixup) const;
97 SmallVectorImpl<MCFixup> &Fixup) const;
101 SmallVectorImpl<MCFixup> &Fixup) const;
132 SmallVectorImpl<MCFixup> &Fixups) const {
142 SmallVectorImpl<MCFixup> &Fixups) const {
169 SmallVectorImpl<MCFixup> &Fixup) const {
175 SmallVectorImpl<MCFixup> &Fixup) const
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.h | 459 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
669 const SmallVectorImpl<ISD::InputArg> &Ins,
723 const SmallVectorImpl<ISD::InputArg> &Ins,
725 SmallVectorImpl<SDValue> &InVals) const;
734 const SmallVectorImpl<ISD::InputArg> &Ins
[all...] |
| PPCInstrInfo.h | 74 SmallVectorImpl<MachineInstr*> &NewMIs,
79 SmallVectorImpl<MachineInstr*> &NewMIs,
140 SmallVectorImpl<MachineOperand> &Cond,
145 const SmallVectorImpl<MachineOperand> &Cond,
150 const SmallVectorImpl<MachineOperand> &Cond,
155 const SmallVectorImpl<MachineOperand> &Cond,
176 ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
214 const SmallVectorImpl<MachineOperand> &Pred) const override;
216 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
217 const SmallVectorImpl<MachineOperand> &Pred2) const override
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.h | 130 SmallVectorImpl<ISD::OutputArg> &Outs,
131 const SmallVectorImpl<SDValue> &OutVals,
132 const SmallVectorImpl<ISD::InputArg> &Ins,
157 const SmallVectorImpl<ISD::InputArg> &Ins,
159 SmallVectorImpl<SDValue> &InVals) const override;
164 SmallVectorImpl<SDValue> &InVals) const override;
168 const SmallVectorImpl<ISD::InputArg> &Ins,
170 SmallVectorImpl<SDValue> &InVals,
171 const SmallVectorImpl<SDValue> &OutVals,
184 const SmallVectorImpl<ISD::OutputArg> &Outs
[all...] |
| HexagonInstrInfo.h | 64 SmallVectorImpl<MachineOperand> &Cond,
71 const SmallVectorImpl<MachineOperand> &Cond,
90 SmallVectorImpl<MachineOperand> &Addr,
92 SmallVectorImpl<MachineInstr*> &NewMIs) const;
101 SmallVectorImpl<MachineOperand> &Addr,
103 SmallVectorImpl<MachineInstr*> &NewMIs) const;
128 const SmallVectorImpl<MachineOperand> &Cond) const override;
148 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
149 const SmallVectorImpl<MachineOperand> &Pred2) const override;
152 ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override
[all...] |
| /external/llvm/lib/Target/BPF/MCTargetDesc/ |
| BPFMCCodeEmitter.cpp | 42 SmallVectorImpl<MCFixup> &Fixups,
48 SmallVectorImpl<MCFixup> &Fixups,
52 SmallVectorImpl<MCFixup> &Fixups,
56 SmallVectorImpl<MCFixup> &Fixups,
69 SmallVectorImpl<MCFixup> &Fixups,
121 SmallVectorImpl<MCFixup> &Fixups,
152 SmallVectorImpl<MCFixup> &Fixups,
|
| /external/llvm/include/llvm/ADT/ |
| SmallVector.h | 344 class SmallVectorImpl : public SmallVectorTemplateBase<T, isPodLike<T>::value> {
347 SmallVectorImpl(const SmallVectorImpl&) = delete;
354 explicit SmallVectorImpl(unsigned N)
359 ~SmallVectorImpl() {
410 void swap(SmallVectorImpl &RHS);
657 SmallVectorImpl &operator=(const SmallVectorImpl &RHS);
659 SmallVectorImpl &operator=(SmallVectorImpl &&RHS)
[all...] |
| /external/llvm/lib/CodeGen/ |
| CallingConvLower.cpp | 29 SmallVectorImpl<CCValAssign> &locs, LLVMContext &C)
69 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
88 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
102 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
120 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
138 void CCState::AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
139 SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
157 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
194 void CCState::getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs,
232 SmallVectorImpl<ForwardedRegister> &Forwards, ArrayRef<MVT> RegParmTypes
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetInstrInfo.h | 45 template<class T> class SmallVectorImpl;
310 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const;
388 SmallVectorImpl<MachineOperand> &Cond,
412 const SmallVectorImpl<MachineOperand> &Cond,
538 const SmallVectorImpl<MachineOperand> &Cond,
564 const SmallVectorImpl<MachineOperand> &Cond,
588 SmallVectorImpl<MachineOperand> &Cond,
[all...] |
| TargetSubtargetInfo.h | 36 template <typename T> class SmallVectorImpl;
55 typedef SmallVectorImpl<const TargetRegisterClass *> RegClassVector;
|
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsMCCodeEmitter.cpp | 144 SmallVectorImpl<MCFixup> &Fixups,
204 SmallVectorImpl<MCFixup> &Fixups,
226 SmallVectorImpl<MCFixup> &Fixups,
248 SmallVectorImpl<MCFixup> &Fixups,
270 SmallVectorImpl<MCFixup> &Fixups,
293 SmallVectorImpl<MCFixup> &Fixups,
315 SmallVectorImpl<MCFixup> &Fixups,
337 SmallVectorImpl<MCFixup> &Fixups,
356 SmallVectorImpl<MCFixup> &Fixups,
374 SmallVectorImpl<MCFixup> &Fixups
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| CallingConvLower.h | 199 SmallVectorImpl<CCValAssign> &Locs;
261 SmallVectorImpl<CCValAssign> &locs, LLVMContext &C);
282 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
287 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
293 bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
298 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
303 void AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
304 SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
309 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
479 SmallVectorImpl<llvm::CCValAssign> &getPendingLocs()
[all...] |
| Analysis.h | 68 SmallVectorImpl<EVT> &ValueVTs,
69 SmallVectorImpl<uint64_t> *Offsets = nullptr,
|
| LiveRangeEdit.h | 62 SmallVectorImpl<unsigned> &NewRegs;
93 bool foldAsLoad(LiveInterval *LI, SmallVectorImpl<MachineInstr*> &Dead);
115 LiveRangeEdit(LiveInterval *parent, SmallVectorImpl<unsigned> &newRegs,
134 typedef SmallVectorImpl<unsigned>::const_iterator iterator;
217 void eliminateDeadDefs(SmallVectorImpl<MachineInstr*> &Dead,
|
| /external/llvm/include/llvm/Analysis/ |
| CFG.h | 37 SmallVectorImpl<std::pair<const BasicBlock *, const BasicBlock *> > &
|
| PHITransAddr.h | 93 SmallVectorImpl<Instruction*> &NewInsts);
112 SmallVectorImpl<Instruction*> &NewInsts);
|
| /external/llvm/include/llvm/MC/ |
| MCTargetAsmParser.h | 25 template <typename T> class SmallVectorImpl;
27 typedef SmallVectorImpl<std::unique_ptr<MCParsedAsmOperand>> OperandVector;
73 SmallVectorImpl<AsmRewrite> *AsmRewrites;
76 ParseInstructionInfo(SmallVectorImpl<AsmRewrite> *rewrites)
|
| /external/llvm/lib/CodeGen/AsmPrinter/ |
| ByteStreamer.h | 74 SmallVectorImpl<char> &Buffer;
76 SmallVectorImpl<std::string> &Comments;
79 BufferByteStreamer(SmallVectorImpl<char> &Buffer,
80 SmallVectorImpl<std::string> &Comments)
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.h | 138 SmallVectorImpl<MachineOperand> &Cond,
143 const SmallVectorImpl<MachineOperand> &Cond,
146 ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
148 const SmallVectorImpl<MachineOperand> &Cond, unsigned,
152 const SmallVectorImpl<MachineOperand> &Cond,
173 SmallVectorImpl<MachineCombinerPattern::MC_PATTERN> &Pattern)
181 SmallVectorImpl<MachineInstr *> &InsInstrs,
182 SmallVectorImpl<MachineInstr *> &DelInstrs,
191 const SmallVectorImpl<MachineOperand> &Cond) const;
|
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.h | 255 SmallVectorImpl<MachineOperand> &Cond,
260 const SmallVectorImpl<MachineOperand> &Cond,
263 const SmallVectorImpl<MachineOperand> &Cond,
268 const SmallVectorImpl<MachineOperand> &Cond,
281 SmallVectorImpl<MachineOperand> &Addr,
285 SmallVectorImpl<MachineInstr*> &NewMIs) const;
294 SmallVectorImpl<MachineOperand> &Addr,
298 SmallVectorImpl<MachineInstr*> &NewMIs) const;
329 SmallVectorImpl<MachineInstr*> &NewMIs) const override;
332 SmallVectorImpl<SDNode*> &NewNodes) const override
[all...] |
| /external/llvm/include/llvm/Transforms/Utils/ |
| LoopUtils.h | 113 bool promoteLoopAccessesToScalars(AliasSet &, SmallVectorImpl<BasicBlock*> &,
114 SmallVectorImpl<Instruction*> &,
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMTargetStreamer.cpp | 53 void ARMTargetStreamer::emitRegSave(const SmallVectorImpl<unsigned> &RegList,
56 const SmallVectorImpl<uint8_t> &Opcodes) {
|
| ARMUnwindOpAsm.h | 64 void EmitRaw(const SmallVectorImpl<uint8_t> &Opcodes) {
71 SmallVectorImpl<uint8_t> &Result);
|
| /external/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.h | 70 SmallVectorImpl<MachineOperand> &Cond,
77 const SmallVectorImpl<MachineOperand> &Cond,
|
