| /external/llvm/test/CodeGen/AArch64/ |
| arm64-vminmaxnm.ll | 4 ; CHECK: fmaxnm.2s v0, v0, v1
6 %vmaxnm2.i = tail call <2 x float> @llvm.aarch64.neon.fmaxnm.v2f32(<2 x float> %a, <2 x float> %b) nounwind
11 ; CHECK: fmaxnm.4s v0, v0, v1
13 %vmaxnm2.i = tail call <4 x float> @llvm.aarch64.neon.fmaxnm.v4f32(<4 x float> %a, <4 x float> %b) nounwind
18 ; CHECK: fmaxnm.2d v0, v0, v1
20 %vmaxnm2.i = tail call <2 x double> @llvm.aarch64.neon.fmaxnm.v2f64(<2 x double> %a, <2 x double> %b) nounwind
48 declare <2 x double> @llvm.aarch64.neon.fmaxnm.v2f64(<2 x double>, <2 x double>) nounwind readnone
49 declare <4 x float> @llvm.aarch64.neon.fmaxnm.v4f32(<4 x float>, <4 x float>) nounwind readnone
50 declare <2 x float> @llvm.aarch64.neon.fmaxnm.v2f32(<2 x float>, <2 x float>) nounwind readnone
|
| arm64-neon-add-sub.ll | 205 ; CHECK: fmaxnm d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
206 %1 = tail call <1 x double> @llvm.aarch64.neon.fmaxnm.v1f64(<1 x double> %a, <1 x double> %b)
233 declare <1 x double> @llvm.aarch64.neon.fmaxnm.v1f64(<1 x double>, <1 x double>)
|
| /external/llvm/test/MC/AArch64/ |
| neon-max-min.s | 92 fmaxnm v0.2s, v1.2s, v2.2s
93 fmaxnm v31.4s, v15.4s, v16.4s
94 fmaxnm v7.2d, v8.2d, v25.2d
96 // CHECK: fmaxnm v0.2s, v1.2s, v2.2s // encoding: [0x20,0xc4,0x22,0x0e]
97 // CHECK: fmaxnm v31.4s, v15.4s, v16.4s // encoding: [0xff,0xc5,0x30,0x4e]
98 // CHECK: fmaxnm v7.2d, v8.2d, v25.2d // encoding: [0x07,0xc5,0x79,0x4e]
|
| arm64-fp-encoding.s | 34 fmaxnm s1, s2, s3
35 fmaxnm d1, d2, d3
39 ; CHECK: fmaxnm s1, s2, s3 ; encoding: [0x41,0x68,0x23,0x1e]
40 ; CHECK: fmaxnm d1, d2, d3 ; encoding: [0x41,0x68,0x63,0x1e]
|
| arm64-advsimd.s | 318 fmaxnm.2s v0, v0, v0
388 ; CHECK: fmaxnm.2s v0, v0, v0 ; encoding: [0x00,0xc4,0x20,0x0e]
[all...] |
| /external/vixl/doc/ |
| changelog.md | 77 + Added support for `fmadd`, `fnmadd`, `fnmsub`, `fminnm`, `fmaxnm`,
|
| supported-instructions.md | [all...] |
| /external/llvm/test/MC/Disassembler/AArch64/ |
| arm64-scalar-fp.txt | 38 # CHECK: fmaxnm s1, s2, s3
39 # CHECK: fmaxnm d1, d2, d3
|
| /external/v8/src/arm64/ |
| constants-arm64.h | [all...] |
| disasm-arm64.cc | 1025 FORMAT(FMAXNM, "fmaxnm");
[all...] |
| macro-assembler-arm64-inl.h | 680 void MacroAssembler::Fmaxnm(const FPRegister& fd,
684 fmaxnm(fd, fn, fm);
[all...] |
| assembler-arm64.cc | 1876 void Assembler::fmaxnm(const FPRegister& fd, function in class:v8::internal::Assembler
[all...] |
| /external/vixl/src/vixl/a64/ |
| constants-a64.h | [all...] |
| disasm-a64.cc | [all...] |
| macro-assembler-a64.h | [all...] |
| simulator-a64.h | [all...] |
| simulator-a64.cc | [all...] |
| assembler-a64.cc | [all...] |
| /external/v8/test/cctest/ |
| test-disasm-arm64.cc | [all...] |
| /external/vixl/test/ |
| test-simulator-traces-a64.h | 401 #include "traces/a64/sim-fmaxnm-2d-trace-a64.h"
402 #include "traces/a64/sim-fmaxnm-2s-trace-a64.h"
403 #include "traces/a64/sim-fmaxnm-4s-trace-a64.h"
404 #include "traces/a64/sim-fmaxnm-d-trace-a64.h"
405 #include "traces/a64/sim-fmaxnm-s-trace-a64.h"
[all...] |
| test-simulator-a64.cc | [all...] |
| test-disasm-a64.cc | [all...] |
| /external/valgrind/none/tests/arm64/ |
| fp_and_simd.c | [all...] |
| fp_and_simd.stdout.exp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.td | [all...] |
