| /external/llvm/test/Transforms/InstSimplify/ |
| select.ll | 6 %and1 = and i32 %x, -2
7 %and1.x = select i1 %cmp, i32 %and1, i32 %x
8 ret i32 %and1.x
16 %and1 = and i32 %x, -2
17 %and1.x = select i1 %cmp, i32 %x, i32 %and1
18 ret i32 %and1.x
26 %and1 = and i32 %x, -2
27 %and1.x = select i1 %cmp, i32 %and1, i32 %
[all...] |
| reassociate.ll | 12 define i32 @and1(i32 %x, i32 %y) {
13 ; CHECK-LABEL: @and1(
|
| /external/llvm/test/Transforms/InstCombine/ |
| assume2.ll | 19 %and1 = and i32 %a, 7
20 ret i32 %and1
35 %and1 = and i32 %a, 7
36 ret i32 %and1
50 %and1 = and i32 %a, 7
51 ret i32 %and1
66 %and1 = and i32 %a, 7
67 ret i32 %and1
81 %and1 = and i32 %a, 7
82 ret i32 %and1
[all...] |
| assume.ll | 61 %and1 = and i1 %a, %b
62 %and = and i1 %and1, %c
93 %and1 = and i32 %a, 3
103 ret i32 %and1
117 %and1 = and i32 %a, 3
118 ret i32 %and1
124 %and1 = and i32 %a, 3
139 ret i32 %and1
145 %and1 = and i32 %b, 3
159 ret i32 %and1
[all...] |
| bit-checks.ll | 275 %and1 = and i32 %argc2, %argc ; <i32> [#uses=1]
276 %tobool = icmp eq i32 %and1, %argc2 ; <i1> [#uses=1]
288 %and1 = and i32 %argc, %argc2 ; <i32> [#uses=1]
289 %tobool = icmp eq i32 %argc2, %and1 ; <i1> [#uses=1]
301 %and1 = and i32 %argc2, %argc ; <i32> [#uses=1]
302 %tobool = icmp eq i32 %argc2, %and1 ; <i1> [#uses=1]
317 %and1 = and i32 %argc, %bc ; <i32> [#uses=1]
318 %tobool = icmp eq i32 %and1, %bc ; <i1> [#uses=1]
333 %and1 = and i32 %bc, %argc ; <i32> [#uses=1]
334 %tobool = icmp eq i32 %and1, %bc ; <i1> [#uses=1
[all...] |
| and2.ll | 65 %and1 = and i1 %cmp1, %b
66 %and2 = and i1 %and1, %cmp2
|
| or-xor.ll | 158 %and1 = and i32 %x, %noty
160 %xor = xor i32 %and1, %and2
169 %and1 = and i32 %or, 1
171 %xor = or i32 %and1, %and2
|
| /external/llvm/test/CodeGen/Hexagon/ |
| fusedandshift.ll | 11 %and1 = and i32 %shr1, 15
12 %conv2 = trunc i32 %and1 to i16
|
| /external/llvm/test/CodeGen/Mips/ |
| fcopysign.ll | 11 ; 32: and $[[AND1:[0-9]+]], ${{[0-9]+}}, $[[MSK1]]
15 ; 32: or $[[OR:[0-9]+]], $[[AND0]], $[[AND1]]
24 ; 64: and $[[AND1:[0-9]+]], ${{[0-9]+}}, $[[MSK1]]
27 ; 64: or $[[OR:[0-9]+]], $[[AND0]], $[[AND1]]
44 ; 32: and $[[AND1:[0-9]+]], ${{[0-9]+}}, $[[MSK1]]
48 ; 32: or $[[OR:[0-9]+]], $[[AND0]], $[[AND1]]
|
| micromips-andi.ll | 11 %and1 = and i32 %0, 4
13 ([7 x i8], [7 x i8]* @.str, i32 0, i32 0), i32 %and1)
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-bitfield-extract.ll | 83 %and1 = and i64 %shr, 16777215
84 %or = or i64 %and, %and1
99 %and1 = and i32 %shr, 7
100 %or = or i32 %and, %and1
118 %and1 = and i32 %shr, 7
119 %or = or i32 %and, %and1
139 %and1 = and i32 %shr, 7
140 %or = or i32 %and, %and1
161 %and1 = and i64 %shr, 7
162 %or = or i64 %and, %and1
[all...] |
| arm64-call-tailcalls.ll | 68 %and1 = and i32 %x, 2
69 %tobool2 = icmp eq i32 %and1, 0
|
| tbz-tbnz.ll | 133 %and1 = and i64 %val1, %val2
134 %tst1 = icmp slt i64 %and1, 0
|
| /external/llvm/test/CodeGen/X86/ |
| targetLoweringGeneric.ll | 26 %and1 = and i32 %add1, 1
27 %xor2 = xor i32 %and1, 1
|
| combine-or.ll | 84 %and1 = and <4 x i32> %a, <i32 -1, i32 -1, i32 0, i32 0>
86 %or = or <4 x i32> %and1, %and2
96 %and1 = and <2 x i64> %a, <i64 -1, i64 0>
98 %or = or <2 x i64> %and1, %and2
108 %and1 = and <4 x i32> %a, <i32 0, i32 0, i32 -1, i32 -1>
110 %or = or <4 x i32> %and1, %and2
120 %and1 = and <2 x i64> %a, <i64 0, i64 -1>
122 %or = or <2 x i64> %and1, %and2
132 %and1 = and <4 x i32> %a, <i32 -1, i32 0, i32 0, i32 0>
134 %or = or <4 x i32> %and1, %and
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| bfx.ll | 41 %and1 = lshr i32 %x, 16
42 %shr2 = and i32 %and1, 255
|
| call-tc.ll | 116 %and1 = and i32 %x, 2
117 %tobool2 = icmp eq i32 %and1, 0
|
| /external/llvm/test/CodeGen/PowerPC/ |
| bperm.ll | 118 %and1 = shl i32 %x, 16
119 %shl = and i32 %and1, 16711680
231 %and1 = and i64 %shr, 15
232 %or = or i64 %and, %and1
245 %and1 = and i64 %shr, 15
247 %or = or i64 %and1, %and2
263 %and1 = and i64 %shr, 15
265 %or = or i64 %and1, %and2
|
| rm-zext.ll | 21 %and1 = shl i32 %x, 16
22 %shl = and i32 %and1, 16711680
|
| /external/llvm/test/CodeGen/SystemZ/ |
| and-02.ll | 209 %and1 = and i64 %a, -4294967296
212 %or = or i64 %and1, %ext
221 %and1 = and i64 %a, -4294967296
224 %or = or i64 %and1, %ext
|
| and-03.ll | 129 %and1 = and i64 %and0, %val1
130 %and2 = and i64 %and1, %val2
|
| asm-18.ll | 329 %and1 = and i32 %res1, 65535
330 %or1 = or i32 %and1, 305397760
348 %and1 = and i32 %res1, 65535
349 %or1 = or i32 %and1, 305397760
453 %and1 = and i32 %res1, 268500991
454 %res2 = call i32 asm "stepb $0, $1", "=h,h"(i32 %and1)
474 %and1 = and i32 %res1, 268500991
475 %res2 = call i32 asm "stepb $0, $1", "=r,r"(i32 %and1)
493 %and1 = and i32 %old, 14
496 "=h,r,r,0"(i32 %old, i32 %and1, i32 %and2
[all...] |
| and-01.ll | 164 %and1 = and i32 %and0, %val1
165 %and2 = and i32 %and1, %val2
|
| insert-06.ll | 174 %and1 = and i64 %a, 144115188075855872
176 %or = or i64 %and1, %and2
|
| /external/llvm/test/Transforms/Reassociate/ |
| xor_reassoc.ll | 27 %and1 = and i32 %x, 456
28 %xor2 = xor i32 %xor, %and1
|
