1 ; Test 32-bit ANDs in which the second operand is constant. 2 ; 3 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s 4 5 ; ANDs with 1 can use NILF. 6 define i32 @f1(i32 %a) { 7 ; CHECK-LABEL: f1: 8 ; CHECK: nilf %r2, 1 9 ; CHECK: br %r14 10 %and = and i32 %a, 1 11 ret i32 %and 12 } 13 14 ; ...but RISBLG is available as a three-address form. 15 define i32 @f2(i32 %a, i32 %b) { 16 ; CHECK-LABEL: f2: 17 ; CHECK: risblg %r2, %r3, 31, 159, 0 18 ; CHECK: br %r14 19 %and = and i32 %b, 1 20 ret i32 %and 21 } 22 23 ; ...same for 4. 24 define i32 @f3(i32 %a, i32 %b) { 25 ; CHECK-LABEL: f3: 26 ; CHECK: risblg %r2, %r3, 29, 157, 0 27 ; CHECK: br %r14 28 %and = and i32 %b, 4 29 ret i32 %and 30 } 31 32 ; ANDs with 5 must use NILF. 33 define i32 @f4(i32 %a) { 34 ; CHECK-LABEL: f4: 35 ; CHECK: nilf %r2, 5 36 ; CHECK: br %r14 37 %and = and i32 %a, 5 38 ret i32 %and 39 } 40 41 ; ...a single RISBLG isn't enough. 42 define i32 @f5(i32 %a, i32 %b) { 43 ; CHECK-LABEL: f5: 44 ; CHECK-NOT: risb 45 ; CHECK: br %r14 46 %and = and i32 %b, 5 47 ret i32 %and 48 } 49 50 ; Check the highest 16-bit constant that must be handled by NILF. 51 define i32 @f6(i32 %a) { 52 ; CHECK-LABEL: f6: 53 ; CHECK: nilf %r2, 65533 54 ; CHECK: br %r14 55 %and = and i32 %a, 65533 56 ret i32 %and 57 } 58 59 ; ...a single RISBLG isn't enough. 60 define i32 @f7(i32 %a, i32 %b) { 61 ; CHECK-LABEL: f7: 62 ; CHECK-NOT: risb 63 ; CHECK: br %r14 64 %and = and i32 %b, 65533 65 ret i32 %and 66 } 67 68 ; Check the next highest value, which can use NILF. 69 define i32 @f8(i32 %a) { 70 ; CHECK-LABEL: f8: 71 ; CHECK: nilf %r2, 65534 72 ; CHECK: br %r14 73 %and = and i32 %a, 65534 74 ret i32 %and 75 } 76 77 ; ...although the three-address case should use RISBLG. 78 define i32 @f9(i32 %a, i32 %b) { 79 ; CHECK-LABEL: f9: 80 ; CHECK: risblg %r2, %r3, 16, 158, 0 81 ; CHECK: br %r14 82 %and = and i32 %b, 65534 83 ret i32 %and 84 } 85 86 ; ANDs of 0xffff are zero extensions from i16. 87 define i32 @f10(i32 %a, i32 %b) { 88 ; CHECK-LABEL: f10: 89 ; CHECK: llhr %r2, %r3 90 ; CHECK: br %r14 91 %and = and i32 %b, 65535 92 ret i32 %and 93 } 94 95 ; Check the next value up, which must again use NILF. 96 define i32 @f11(i32 %a) { 97 ; CHECK-LABEL: f11: 98 ; CHECK: nilf %r2, 65536 99 ; CHECK: br %r14 100 %and = and i32 %a, 65536 101 ret i32 %and 102 } 103 104 ; ...but the three-address case can use RISBLG. 105 define i32 @f12(i32 %a, i32 %b) { 106 ; CHECK-LABEL: f12: 107 ; CHECK: risblg %r2, %r3, 15, 143, 0 108 ; CHECK: br %r14 109 %and = and i32 %b, 65536 110 ret i32 %and 111 } 112 113 ; Check the lowest useful NILH value. 114 define i32 @f13(i32 %a) { 115 ; CHECK-LABEL: f13: 116 ; CHECK: nilh %r2, 1 117 ; CHECK: br %r14 118 %and = and i32 %a, 131071 119 ret i32 %and 120 } 121 122 ; ...but RISBLG is OK in the three-address case. 123 define i32 @f14(i32 %a, i32 %b) { 124 ; CHECK-LABEL: f14: 125 ; CHECK: risblg %r2, %r3, 15, 159, 0 126 ; CHECK: br %r14 127 %and = and i32 %b, 131071 128 ret i32 %and 129 } 130 131 ; Check the highest useful NILF value. 132 define i32 @f15(i32 %a) { 133 ; CHECK-LABEL: f15: 134 ; CHECK: nilf %r2, 4294901758 135 ; CHECK: br %r14 136 %and = and i32 %a, -65538 137 ret i32 %and 138 } 139 140 ; Check the next value up, which is the highest useful NILH value. 141 define i32 @f16(i32 %a) { 142 ; CHECK-LABEL: f16: 143 ; CHECK: nilh %r2, 65534 144 ; CHECK: br %r14 145 %and = and i32 %a, -65537 146 ret i32 %and 147 } 148 149 ; Check the next value up, which is the first useful NILL value. 150 define i32 @f17(i32 %a) { 151 ; CHECK-LABEL: f17: 152 ; CHECK: nill %r2, 0 153 ; CHECK: br %r14 154 %and = and i32 %a, -65536 155 ret i32 %and 156 } 157 158 ; ...although the three-address case should use RISBLG. 159 define i32 @f18(i32 %a, i32 %b) { 160 ; CHECK-LABEL: f18: 161 ; CHECK: risblg %r2, %r3, 0, 143, 0 162 ; CHECK: br %r14 163 %and = and i32 %b, -65536 164 ret i32 %and 165 } 166 167 ; Check the next value up again, which can still use NILL. 168 define i32 @f19(i32 %a) { 169 ; CHECK-LABEL: f19: 170 ; CHECK: nill %r2, 1 171 ; CHECK: br %r14 172 %and = and i32 %a, -65535 173 ret i32 %and 174 } 175 176 ; Check the next value up again, which cannot use RISBLG. 177 define i32 @f20(i32 %a, i32 %b) { 178 ; CHECK-LABEL: f20: 179 ; CHECK-NOT: risb 180 ; CHECK: br %r14 181 %and = and i32 %b, -65534 182 ret i32 %and 183 } 184 185 ; Check the last useful mask, which can use NILL. 186 define i32 @f21(i32 %a) { 187 ; CHECK-LABEL: f21: 188 ; CHECK: nill %r2, 65534 189 ; CHECK: br %r14 190 %and = and i32 %a, -2 191 ret i32 %and 192 } 193 194 ; ...or RISBLG for the three-address case. 195 define i32 @f22(i32 %a, i32 %b) { 196 ; CHECK-LABEL: f22: 197 ; CHECK: risblg %r2, %r3, 0, 158, 0 198 ; CHECK: br %r14 199 %and = and i32 %b, -2 200 ret i32 %and 201 } 202 203 ; Test that RISBLG can be used when inserting a non-wraparound mask 204 ; into another register. 205 define i64 @f23(i64 %a, i32 %b) { 206 ; CHECK-LABEL: f23: 207 ; CHECK: risblg %r2, %r3, 30, 158, 0 208 ; CHECK: br %r14 209 %and1 = and i64 %a, -4294967296 210 %and2 = and i32 %b, 2 211 %ext = zext i32 %and2 to i64 212 %or = or i64 %and1, %ext 213 ret i64 %or 214 } 215 216 ; ...and when inserting a wrap-around mask. 217 define i64 @f24(i64 %a, i32 %b) { 218 ; CHECK-LABEL: f24: 219 ; CHECK: risblg %r2, %r3, 30, 156 220 ; CHECK: br %r14 221 %and1 = and i64 %a, -4294967296 222 %and2 = and i32 %b, -5 223 %ext = zext i32 %and2 to i64 224 %or = or i64 %and1, %ext 225 ret i64 %or 226 } 227
