| /external/llvm/test/CodeGen/Mips/ |
| inlineasm_constraint_ZC.ll | 13 ; ALL: lw $[[BASEPTR:[0-9]+]], %got(data)(
15 ; ALL: lw $1, 0($[[BASEPTR]])
27 ; ALL: lw $[[BASEPTR:[0-9]+]], %got(data)(
29 ; ALL: lw $1, -4($[[BASEPTR]])
41 ; ALL: lw $[[BASEPTR:[0-9]+]], %got(data)(
43 ; ALL: lw $1, 4($[[BASEPTR]])
55 ; ALL: lw $[[BASEPTR:[0-9]+]], %got(data)(
57 ; ALL: lw $1, 252($[[BASEPTR]])
69 ; ALL: lw $[[BASEPTR:[0-9]+]], %got(data)(
71 ; 09BIT: addiu $[[BASEPTR2:[0-9]+]], $[[BASEPTR]], 25
[all...] |
| inlineasm_constraint_R.ll | 11 ; CHECK: lw $[[BASEPTR:[0-9]+]], %got(data)(
13 ; CHECK: lw $1, 0($[[BASEPTR]])
25 ; CHECK: lw $[[BASEPTR:[0-9]+]], %got(data)(
27 ; CHECK: lw $1, 4($[[BASEPTR]])
39 ; CHECK-DAG: lw $[[BASEPTR:[0-9]+]], %got(data)(
41 ; CHECK: lw $1, 252($[[BASEPTR]])
53 ; CHECK-DAG: lw $[[BASEPTR:[0-9]+]], %got(data)(
54 ; CHECK: addiu $[[BASEPTR2:[0-9]+]], $[[BASEPTR]], 256
|
| inlineasm_constraint_m.ll | 11 ; CHECK: lw $[[BASEPTR:[0-9]+]], %got(data)(
13 ; CHECK: lw $1, 0($[[BASEPTR]])
25 ; CHECK: lw $[[BASEPTR:[0-9]+]], %got(data)(
27 ; CHECK: lw $1, 4($[[BASEPTR]])
39 ; CHECK-DAG: lw $[[BASEPTR:[0-9]+]], %got(data)(
41 ; CHECK: lw $1, 32764($[[BASEPTR]])
53 ; CHECK-DAG: lw $[[BASEPTR:[0-9]+]], %got(data)(
55 ; CHECK: addu $[[BASEPTR2:[0-9]+]], $[[BASEPTR]], $[[T0]]
|
| /external/boringssl/src/crypto/x509v3/ |
| v3_ncons.c | 397 char *baseptr = (char *)base->data;
400 if (!*baseptr)
409 if (*baseptr != '.' && dnsptr[-1] != '.')
413 if (OPENSSL_strcasecmp(baseptr, dnsptr))
422 const char *baseptr = (char *)base->data;
425 const char *baseat = strchr(baseptr, '@');
430 if (!baseat && (*baseptr == '.'))
435 if (!OPENSSL_strcasecmp(baseptr, emlptr))
445 if (baseat != baseptr)
447 if ((baseat - baseptr) != (emlat - emlptr)
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZRegisterInfo.cpp | 72 unsigned BasePtr = getFrameRegister(MF);
78 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, /*isDef*/ false);
88 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
110 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
118 .addReg(BasePtr).addImm(HighOffset).addReg(0);
124 .addReg(ScratchReg, RegState::Kill).addReg(BasePtr);
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCLoopPreIncPrep.cpp | 118 static bool IsPtrInBounds(Value *BasePtr) {
119 Value *StrippedBasePtr = BasePtr;
266 Value *BasePtr = GetPointerOperand(MemI);
267 assert(BasePtr && "No pointer operand");
271 BasePtr->getType()->getPointerAddressSpace());
309 PtrInc->setIsInBounds(IsPtrInBounds(BasePtr));
319 if (PtrInc->getType() != BasePtr->getType())
320 NewBasePtr = new BitCastInst(PtrInc, BasePtr->getType(),
325 if (Instruction *IDel = dyn_cast<Instruction>(BasePtr))
327 BasePtr->replaceAllUsesWith(NewBasePtr)
[all...] |
| /external/deqp/framework/delibs/decpp/ |
| deSharedPtr.cpp | 322 SharedPtr<Object> basePtr;
326 basePtr = derivedPtr;
339 SharedPtr<Object> basePtr (derivedPtr);
354 SharedPtr<Object> basePtr = (SharedPtr<Object>)(derivedPtr);
|
| /external/llvm/lib/Target/ARM/ |
| ARMBaseRegisterInfo.h | 81 /// BasePtr - ARM physical register used as a base ptr in complex stack
84 unsigned BasePtr;
153 unsigned getBaseRegister() const { return BasePtr; }
|
| ARMBaseRegisterInfo.cpp | 49 : ARMGenRegisterInfo(ARM::LR, 0, 0, ARM::PC), BasePtr(ARM::R6) {}
141 Reserved.set(BasePtr);
354 return MRI->canReserveReg(BasePtr);
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430RegisterInfo.cpp | 116 unsigned BasePtr = (TFI->hasFP(MF) ? MSP430::FP : MSP430::SP);
137 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
154 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
|
| /external/llvm/lib/Target/X86/ |
| X86RegisterInfo.h | 45 /// BasePtr - X86 physical register used as a base ptr in complex stack
48 unsigned BasePtr;
122 unsigned getBaseRegister() const { return BasePtr; }
|
| X86RegisterInfo.cpp | 79 BasePtr = Use64BitReg ? X86::RBX : X86::EBX;
84 BasePtr = X86::ESI;
374 unsigned BasePtr = getX86SubSuperRegister(getBaseRegister(), MVT::i64,
376 for (MCSubRegIterator I(BasePtr, this, /*IncludeSelf=*/true);
458 return MRI->canReserveReg(BasePtr);
492 unsigned BasePtr;
497 BasePtr = (FrameIndex < 0 ? FramePtr : getBaseRegister());
499 BasePtr = (FrameIndex < 0 ? FramePtr : StackPtr);
501 BasePtr = StackPtr;
503 BasePtr = (TFI->hasFP(MF) ? FramePtr : StackPtr)
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorOps.cpp | 481 SDValue BasePTR = LD->getBasePtr();
516 ScalarLoad = DAG.getLoad(WideVT, dl, Chain, BasePTR,
528 ScalarLoad = DAG.getExtLoad(ISD::EXTLOAD, dl, WideVT, Chain, BasePTR,
538 BasePTR = DAG.getNode(ISD::ADD, dl, BasePTR.getValueType(), BasePTR,
539 DAG.getConstant(LoadBytes, BasePTR.getValueType()));
601 Chain, BasePTR, LD->getPointerInfo().getWithOffset(Idx * Stride),
606 BasePTR = DAG.getNode(ISD::ADD, dl, BasePTR.getValueType(), BasePTR
[all...] |
| LegalizeVectorTypes.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| ShadowStackGCLowering.cpp | 56 Type *Ty, Value *BasePtr, int Idx1,
59 Type *Ty, Value *BasePtr, int Idx1, int Idx2,
347 Value *BasePtr, int Idx,
353 Value *Val = B.CreateGEP(Ty, BasePtr, Indices, Name);
361 IRBuilder<> &B, Type *Ty, Value *BasePtr,
365 Value *Val = B.CreateGEP(Ty, BasePtr, Indices, Name);
|
| /external/libxml2/ |
| error.c | 465 xmlNodePtr baseptr = NULL; local
523 baseptr = node;
530 if ((baseptr == NULL) && (node != NULL) &&
532 baseptr = node;
550 else if (baseptr != NULL) {
557 xmlNodePtr prev = baseptr;
581 to->file = (char *) xmlStrdup(baseptr->doc->URL);
|
| /external/deqp/modules/glshared/ |
| glsUniformBlockCase.cpp | 624 void generateValue (const UniformLayoutEntry& entry, void* basePtr, de::Random& rnd)
638 deUint8* elemPtr = (deUint8*)basePtr + entry.offset + (isArray ? elemNdx*entry.arrayStride : 0);
671 void* basePtr = blockPointers.find(blockNdx)->second;
677 generateValue(entry, basePtr, rnd);
942 void generateValueSrc (std::ostringstream& src, const UniformLayoutEntry& entry, const void* basePtr, int elementNdx)
947 const deUint8* elemPtr = (const deUint8*)basePtr + entry.offset + (isArray ? elementNdx*entry.arrayStride : 0);
1000 void generateCompareSrc (std::ostringstream& src, const char* resultVar, const VarType& type, const char* srcName, const char* apiName, const UniformLayout& layout, const void* basePtr, deUint32 unusedMask)
1017 generateValueSrc(src, entry, basePtr, elemNdx);
1024 generateValueSrc(src, entry, basePtr, 0);
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 444 SDValue BasePtr = LD->getBasePtr();
450 if (DAG.isBaseWithConstantOffset(BasePtr) &&
451 isWordAligned(BasePtr->getOperand(0), DAG)) {
452 SDValue NewBasePtr = BasePtr->getOperand(0);
453 Offset = cast<ConstantSDNode>(BasePtr->getOperand(1))->getSExtValue();
457 if (TLI.isGAPlusOffset(BasePtr.getNode(), GV, Offset) &&
460 BasePtr->getValueType(0));
468 BasePtr, LD->getPointerInfo(), MVT::i16,
471 SDValue HighAddr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr,
487 // Lower to a call to __misaligned_load(BasePtr)
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| SIISelLowering.cpp | 348 ConstantSDNode *BasePtr = dyn_cast<ConstantSDNode>(Ptr->getBasePtr());
349 assert(BasePtr);
364 uint64_t Index = BasePtr->getZExtValue();
|
| /external/llvm/lib/Transforms/Scalar/ |
| LoopIdiomRecognize.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelLowering.cpp | [all...] |
| /external/llvm/include/llvm/IR/ |
| Statepoint.h | 244 Value *basePtr() {
|
| /external/clang/lib/AST/ |
| CXXInheritance.cpp | 105 const void *BasePtr = static_cast<const void*>(Base->getCanonicalDecl());
107 const_cast<void *>(BasePtr),
|
