| /art/compiler/utils/mips64/ |
| assembler_mips64.h | 150 void Bgec(GpuRegister rs, GpuRegister rt, uint16_t imm16); // R6
207 void Bgec(GpuRegister rs, GpuRegister rt, Label* label); // R6
|
| assembler_mips64.cc | 459 void Mips64Assembler::Bgec(GpuRegister rs, GpuRegister rt, uint16_t imm16) {
876 Bgec(rs, rt, 2);
890 void Mips64Assembler::Bgec(GpuRegister rs, GpuRegister rt, Label* label) {
[all...] |
| /external/v8/src/mips/ |
| assembler-mips.h | 649 void bgec(Register rs, Register rt, int16_t offset);
650 void bgec(Register rs, Register rt, Label* L) { function in class:v8::internal::Assembler
651 bgec(rs, rt, branch_offset_compact(L, false)>>2);
[all...] |
| disasm-mips.cc | [all...] |
| assembler-mips.cc | 1204 void Assembler::bgec(Register rs, Register rt, int16_t offset) { function in class:v8::Assembler
[all...] |
| /external/v8/src/mips64/ |
| assembler-mips64.h | 640 void bgec(Register rs, Register rt, int16_t offset);
641 void bgec(Register rs, Register rt, Label* L) { function in class:v8::internal::Assembler
642 bgec(rs, rt, branch_offset_compact(L, false)>>2);
[all...] |
| disasm-mips64.cc | [all...] |
| assembler-mips64.cc | 1183 void Assembler::bgec(Register rs, Register rt, int16_t offset) { function in class:v8::Assembler
[all...] |
| /external/llvm/test/MC/Disassembler/Mips/mips32r6/ |
| valid-mips32r6-el.txt | 25 0x40 0x00 0x43 0x58 # CHECK: bgec $2, $3, 256
|
| valid-mips32r6.txt | 25 0x58 0x43 0x00 0x40 # CHECK: bgec $2, $3, 256
|
| /external/llvm/test/MC/Disassembler/Mips/ |
| mips32r6.txt | 33 0x58 0x43 0x00 0x40 # CHECK: bgec $2, $3, 256
|
| mips64r6.txt | 33 0x58 0x43 0x00 0x40 # CHECK: bgec $2, $3, 256
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| valid.s | 45 bgec $2, $3, 256 # CHECK: bgec $2, $3, 256 # encoding: [0x58,0x43,0x00,0x40]
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| valid.s | 45 bgec $2, $3, 256 # CHECK: bgec $2, $3, 256 # encoding: [0x58,0x43,0x00,0x40]
|
| /external/llvm/lib/Target/Mips/ |
| Mips32r6InstrInfo.td | 335 class BGEC_DESC : CMP_BC_DESC_BASE<"bgec", brtarget, GPR32Opnd>;
660 def BGEC : BGEC_ENC, BGEC_DESC, ISA_MIPS32R6;
[all...] |
| /art/disassembler/ |
| disassembler_mips.cc | 212 { kITypeMask, 22 << kOpcodeShift, "bgec", "STB" },
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
| valid-mips64r6-el.txt | 25 0x40 0x00 0x43 0x58 # CHECK: bgec $2, $3, 256
|
| valid-mips64r6.txt | 25 0x58 0x43 0x00 0x40 # CHECK: bgec $2, $3, 256
|
| /external/llvm/lib/Target/Mips/Disassembler/ |
| MipsDisassembler.cpp | 595 // BGEC if rs != rt && rs != 0 && rt != 0
610 MI.setOpcode(Mips::BGEC);
[all...] |
| /art/compiler/optimizing/ |
| code_generator_mips64.cc | [all...] |
| /prebuilts/android-emulator/linux-x86_64/qemu/linux-x86/ |
| qemu-system-mips64el | |
