| /external/clang/test/CodeGen/ |
| aarch64-neon-fcvt-intrinsics.c | 65 // CHECK: fcvtns {{[sw][0-9]+}}, {{s[0-9]+}}
71 // CHECK: fcvtns {{[dx][0-9]+}}, {{d[0-9]+}}
|
| arm64-scalar-test.c | 474 // CHECK: fcvtns {{w[0-9]+}}, {{s[0-9]+}}
486 // CHECK: fcvtns {{x[0-9]+}}, {{d[0-9]+}}
|
| aarch64-neon-misc.c | [all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-cvt.ll | 168 ;CHECK: fcvtns w0, s0
170 %tmp3 = call i32 @llvm.aarch64.neon.fcvtns.i32.f32(float %A)
176 ;CHECK: fcvtns x0, s0
178 %tmp3 = call i64 @llvm.aarch64.neon.fcvtns.i64.f32(float %A)
184 ;CHECK: fcvtns w0, d0
186 %tmp3 = call i32 @llvm.aarch64.neon.fcvtns.i32.f64(double %A)
192 ;CHECK: fcvtns x0, d0
194 %tmp3 = call i64 @llvm.aarch64.neon.fcvtns.i64.f64(double %A)
198 declare i32 @llvm.aarch64.neon.fcvtns.i32.f32(float) nounwind readnone
199 declare i64 @llvm.aarch64.neon.fcvtns.i64.f32(float) nounwind readnon
[all...] |
| arm64-vcvt.ll | 192 ;CHECK: fcvtns.2s v0, v0
194 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtns.v2i32.v2f32(<2 x float> %A)
201 ;CHECK: fcvtns.4s v0, v0
203 %tmp3 = call <4 x i32> @llvm.aarch64.neon.fcvtns.v4i32.v4f32(<4 x float> %A)
210 ;CHECK: fcvtns.2d v0, v0
212 %tmp3 = call <2 x i64> @llvm.aarch64.neon.fcvtns.v2i64.v2f64(<2 x double> %A)
216 declare <2 x i32> @llvm.aarch64.neon.fcvtns.v2i32.v2f32(<2 x float>) nounwind readnone
217 declare <4 x i32> @llvm.aarch64.neon.fcvtns.v4i32.v4f32(<4 x float>) nounwind readnone
218 declare <2 x i64> @llvm.aarch64.neon.fcvtns.v2i64.v2f64(<2 x double>) nounwind readnone
|
| /external/llvm/test/MC/AArch64/ |
| arm64-fp-encoding.s | 200 fcvtns w1, s2
201 fcvtns w1, d2
202 fcvtns x1, s2
203 fcvtns x1, d2
205 ; CHECK: fcvtns w1, s2 ; encoding: [0x41,0x00,0x20,0x1e]
206 ; CHECK: fcvtns w1, d2 ; encoding: [0x41,0x00,0x60,0x1e]
207 ; CHECK: fcvtns x1, s2 ; encoding: [0x41,0x00,0x20,0x9e]
208 ; CHECK: fcvtns x1, d2 ; encoding: [0x41,0x00,0x60,0x9e]
|
| neon-scalar-cvt.s | 123 fcvtns s22, s13
124 fcvtns d21, d14
126 // CHECK: fcvtns s22, s13 // encoding: [0xb6,0xa9,0x21,0x5e]
127 // CHECK: fcvtns d21, d14 // encoding: [0xd5,0xa9,0x61,0x5e]
|
| neon-simd-misc.s | 513 fcvtns v6.4s, v8.4s
514 fcvtns v6.2d, v8.2d
515 fcvtns v4.2s, v0.2s
517 // CHECK: fcvtns v6.4s, v8.4s // encoding: [0x06,0xa9,0x21,0x4e]
518 // CHECK: fcvtns v6.2d, v8.2d // encoding: [0x06,0xa9,0x61,0x4e]
519 // CHECK: fcvtns v4.2s, v0.2s // encoding: [0x04,0xa8,0x21,0x0e]
|
| arm64-advsimd.s | 687 fcvtns.2s v0, v0
688 fcvtns.4s v0, v0
689 fcvtns.2d v0, v0
690 fcvtns s0, s0
691 fcvtns d0, d0
693 ; CHECK: fcvtns.2s v0, v0 ; encoding: [0x00,0xa8,0x21,0x0e]
694 ; CHECK: fcvtns.4s v0, v0 ; encoding: [0x00,0xa8,0x21,0x4e]
695 ; CHECK: fcvtns.2d v0, v0 ; encoding: [0x00,0xa8,0x61,0x4e]
696 ; CHECK: fcvtns s0, s0 ; encoding: [0x00,0xa8,0x21,0x5e]
697 ; CHECK: fcvtns d0, d0 ; encoding: [0x00,0xa8,0x61,0x5e
[all...] |
| basic-a64-instructions.s | [all...] |
| /external/v8/src/arm64/ |
| constants-arm64.h | [all...] |
| macro-assembler-arm64-inl.h | 629 void MacroAssembler::Fcvtns(const Register& rd, const FPRegister& fn) {
632 fcvtns(rd, fn);
[all...] |
| disasm-arm64.cc | 1097 case FCVTNS_xd: mnemonic = "fcvtns"; form = form_rf; break;
[all...] |
| /external/v8/test/cctest/ |
| test-assembler-arm64.cc | [all...] |
| test-disasm-arm64.cc | [all...] |
| /external/vixl/src/vixl/a64/ |
| constants-a64.h | [all...] |
| macro-assembler-a64.h | [all...] |
| disasm-a64.cc | [all...] |
| /external/vixl/test/ |
| test-assembler-a64.cc | [all...] |
| test-simulator-traces-a64.h | 340 #include "traces/a64/sim-fcvtns-2d-trace-a64.h"
341 #include "traces/a64/sim-fcvtns-2s-trace-a64.h"
342 #include "traces/a64/sim-fcvtns-4s-trace-a64.h"
343 #include "traces/a64/sim-fcvtns-d-trace-a64.h"
344 #include "traces/a64/sim-fcvtns-s-trace-a64.h"
345 #include "traces/a64/sim-fcvtns-wd-trace-a64.h"
346 #include "traces/a64/sim-fcvtns-ws-trace-a64.h"
347 #include "traces/a64/sim-fcvtns-xd-trace-a64.h"
348 #include "traces/a64/sim-fcvtns-xs-trace-a64.h"
[all...] |
| test-disasm-a64.cc | [all...] |
| test-simulator-a64.cc | [all...] |
| /external/valgrind/none/tests/arm64/ |
| fp_and_simd.c | [all...] |
| fp_and_simd.stdout.exp | [all...] |
| /external/vixl/doc/ |
| supported-instructions.md | 1930 ### FCVTNS ###
1934 void fcvtns(const Register& rd, const VRegister& vn)
1937 ### FCVTNS ###
1941 void fcvtns(const VRegister& rd, const VRegister& vn)
[all...] |
